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b43legacy: fix MAC control and microcode init
[linux-2.6/next.git] / drivers / net / sonic.c
blob8069f3e32d83db988a33277073c1cd5d706b601a
1 /*
2 * sonic.c
3 *
4 * (C) 2005 Finn Thain
5 *
6 * Converted to DMA API, added zero-copy buffer handling, and
7 * (from the mac68k project) introduced dhd's support for 16-bit cards.
8 *
9 * (C) 1996,1998 by Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 *
11 * This driver is based on work from Andreas Busse, but most of
12 * the code is rewritten.
13 *
14 * (C) 1995 by Andreas Busse (andy@waldorf-gmbh.de)
15 *
16 * Core code included by system sonic drivers
17 *
18 * And... partially rewritten again by David Huggins-Daines in order
19 * to cope with screwed up Macintosh NICs that may or may not use
20 * 16-bit DMA.
21 *
22 * (C) 1999 David Huggins-Daines <dhd@debian.org>
23 *
24 */
25
26 /*
27 * Sources: Olivetti M700-10 Risc Personal Computer hardware handbook,
28 * National Semiconductors data sheet for the DP83932B Sonic Ethernet
29 * controller, and the files "8390.c" and "skeleton.c" in this directory.
30 *
31 * Additional sources: Nat Semi data sheet for the DP83932C and Nat Semi
32 * Application Note AN-746, the files "lance.c" and "ibmlana.c". See also
33 * the NetBSD file "sys/arch/mac68k/dev/if_sn.c".
34 */
35
36
37
38 /*
39 * Open/initialize the SONIC controller.
40 *
41 * This routine should set everything up anew at each open, even
42 * registers that "should" only need to be set once at boot, so that
43 * there is non-reboot way to recover if something goes wrong.
44 */
45 static int sonic_open(struct net_device *dev)
46 {
47 struct sonic_local *lp = netdev_priv(dev);
48 int i;
49
50 if (sonic_debug > 2)
51 printk("sonic_open: initializing sonic driver.\n");
52
53 for (i = 0; i < SONIC_NUM_RRS; i++) {
54 struct sk_buff *skb = dev_alloc_skb(SONIC_RBSIZE + 2);
55 if (skb == NULL) {
56 while(i > 0) { /* free any that were allocated successfully */
57 i--;
58 dev_kfree_skb(lp->rx_skb[i]);
59 lp->rx_skb[i] = NULL;
60 }
61 printk(KERN_ERR "%s: couldn't allocate receive buffers\n",
62 dev->name);
63 return -ENOMEM;
64 }
65 /* align IP header unless DMA requires otherwise */
66 if (SONIC_BUS_SCALE(lp->dma_bitmode) == 2)
67 skb_reserve(skb, 2);
68 lp->rx_skb[i] = skb;
69 }
70
71 for (i = 0; i < SONIC_NUM_RRS; i++) {
72 dma_addr_t laddr = dma_map_single(lp->device, skb_put(lp->rx_skb[i], SONIC_RBSIZE),
73 SONIC_RBSIZE, DMA_FROM_DEVICE);
74 if (!laddr) {
75 while(i > 0) { /* free any that were mapped successfully */
76 i--;
77 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);
78 lp->rx_laddr[i] = (dma_addr_t)0;
79 }
80 for (i = 0; i < SONIC_NUM_RRS; i++) {
81 dev_kfree_skb(lp->rx_skb[i]);
82 lp->rx_skb[i] = NULL;
83 }
84 printk(KERN_ERR "%s: couldn't map rx DMA buffers\n",
85 dev->name);
86 return -ENOMEM;
87 }
88 lp->rx_laddr[i] = laddr;
89 }
90
91 /*
92 * Initialize the SONIC
93 */
94 sonic_init(dev);
95
96 netif_start_queue(dev);
97
98 if (sonic_debug > 2)
99 printk("sonic_open: Initialization done.\n");
100
101 return 0;
102 }
103
104
105 /*
106 * Close the SONIC device
107 */
108 static int sonic_close(struct net_device *dev)
109 {
110 struct sonic_local *lp = netdev_priv(dev);
111 int i;
112
113 if (sonic_debug > 2)
114 printk("sonic_close\n");
115
116 netif_stop_queue(dev);
117
118 /*
119 * stop the SONIC, disable interrupts
120 */
121 SONIC_WRITE(SONIC_IMR, 0);
122 SONIC_WRITE(SONIC_ISR, 0x7fff);
123 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
124
125 /* unmap and free skbs that haven't been transmitted */
126 for (i = 0; i < SONIC_NUM_TDS; i++) {
127 if(lp->tx_laddr[i]) {
128 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE);
129 lp->tx_laddr[i] = (dma_addr_t)0;
130 }
131 if(lp->tx_skb[i]) {
132 dev_kfree_skb(lp->tx_skb[i]);
133 lp->tx_skb[i] = NULL;
134 }
135 }
136
137 /* unmap and free the receive buffers */
138 for (i = 0; i < SONIC_NUM_RRS; i++) {
139 if(lp->rx_laddr[i]) {
140 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);
141 lp->rx_laddr[i] = (dma_addr_t)0;
142 }
143 if(lp->rx_skb[i]) {
144 dev_kfree_skb(lp->rx_skb[i]);
145 lp->rx_skb[i] = NULL;
146 }
147 }
148
149 return 0;
150 }
151
152 static void sonic_tx_timeout(struct net_device *dev)
153 {
154 struct sonic_local *lp = netdev_priv(dev);
155 int i;
156 /*
157 * put the Sonic into software-reset mode and
158 * disable all interrupts before releasing DMA buffers
159 */
160 SONIC_WRITE(SONIC_IMR, 0);
161 SONIC_WRITE(SONIC_ISR, 0x7fff);
162 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
163 /* We could resend the original skbs. Easier to re-initialise. */
164 for (i = 0; i < SONIC_NUM_TDS; i++) {
165 if(lp->tx_laddr[i]) {
166 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE);
167 lp->tx_laddr[i] = (dma_addr_t)0;
168 }
169 if(lp->tx_skb[i]) {
170 dev_kfree_skb(lp->tx_skb[i]);
171 lp->tx_skb[i] = NULL;
172 }
173 }
174 /* Try to restart the adaptor. */
175 sonic_init(dev);
176 lp->stats.tx_errors++;
177 dev->trans_start = jiffies;
178 netif_wake_queue(dev);
179 }
180
181 /*
182 * transmit packet
183 *
184 * Appends new TD during transmission thus avoiding any TX interrupts
185 * until we run out of TDs.
186 * This routine interacts closely with the ISR in that it may,
187 * set tx_skb[i]
188 * reset the status flags of the new TD
189 * set and reset EOL flags
190 * stop the tx queue
191 * The ISR interacts with this routine in various ways. It may,
192 * reset tx_skb[i]
193 * test the EOL and status flags of the TDs
194 * wake the tx queue
195 * Concurrently with all of this, the SONIC is potentially writing to
196 * the status flags of the TDs.
197 * Until some mutual exclusion is added, this code will not work with SMP. However,
198 * MIPS Jazz machines and m68k Macs were all uni-processor machines.
199 */
200
201 static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev)
202 {
203 struct sonic_local *lp = netdev_priv(dev);
204 dma_addr_t laddr;
205 int length;
206 int entry = lp->next_tx;
207
208 if (sonic_debug > 2)
209 printk("sonic_send_packet: skb=%p, dev=%p\n", skb, dev);
210
211 length = skb->len;
212 if (length < ETH_ZLEN) {
213 if (skb_padto(skb, ETH_ZLEN))
214 return 0;
215 length = ETH_ZLEN;
216 }
217
218 /*
219 * Map the packet data into the logical DMA address space
220 */
221
222 laddr = dma_map_single(lp->device, skb->data, length, DMA_TO_DEVICE);
223 if (!laddr) {
224 printk(KERN_ERR "%s: failed to map tx DMA buffer.\n", dev->name);
225 dev_kfree_skb(skb);
226 return 1;
227 }
228
229 sonic_tda_put(dev, entry, SONIC_TD_STATUS, 0); /* clear status */
230 sonic_tda_put(dev, entry, SONIC_TD_FRAG_COUNT, 1); /* single fragment */
231 sonic_tda_put(dev, entry, SONIC_TD_PKTSIZE, length); /* length of packet */
232 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_L, laddr & 0xffff);
233 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_H, laddr >> 16);
234 sonic_tda_put(dev, entry, SONIC_TD_FRAG_SIZE, length);
235 sonic_tda_put(dev, entry, SONIC_TD_LINK,
236 sonic_tda_get(dev, entry, SONIC_TD_LINK) | SONIC_EOL);
237
238 /*
239 * Must set tx_skb[entry] only after clearing status, and
240 * before clearing EOL and before stopping queue
241 */
242 wmb();
243 lp->tx_len[entry] = length;
244 lp->tx_laddr[entry] = laddr;
245 lp->tx_skb[entry] = skb;
246
247 wmb();
248 sonic_tda_put(dev, lp->eol_tx, SONIC_TD_LINK,
249 sonic_tda_get(dev, lp->eol_tx, SONIC_TD_LINK) & ~SONIC_EOL);
250 lp->eol_tx = entry;
251
252 lp->next_tx = (entry + 1) & SONIC_TDS_MASK;
253 if (lp->tx_skb[lp->next_tx] != NULL) {
254 /* The ring is full, the ISR has yet to process the next TD. */
255 if (sonic_debug > 3)
256 printk("%s: stopping queue\n", dev->name);
257 netif_stop_queue(dev);
258 /* after this packet, wait for ISR to free up some TDAs */
259 } else netif_start_queue(dev);
260
261 if (sonic_debug > 2)
262 printk("sonic_send_packet: issuing Tx command\n");
263
264 SONIC_WRITE(SONIC_CMD, SONIC_CR_TXP);
265
266 dev->trans_start = jiffies;
267
268 return 0;
269 }
270
271 /*
272 * The typical workload of the driver:
273 * Handle the network interface interrupts.
274 */
275 static irqreturn_t sonic_interrupt(int irq, void *dev_id)
276 {
277 struct net_device *dev = dev_id;
278 struct sonic_local *lp = netdev_priv(dev);
279 int status;
280
281 if (!(status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT))
282 return IRQ_NONE;
283
284 do {
285 if (status & SONIC_INT_PKTRX) {
286 if (sonic_debug > 2)
287 printk("%s: packet rx\n", dev->name);
288 sonic_rx(dev); /* got packet(s) */
289 SONIC_WRITE(SONIC_ISR, SONIC_INT_PKTRX); /* clear the interrupt */
290 }
291
292 if (status & SONIC_INT_TXDN) {
293 int entry = lp->cur_tx;
294 int td_status;
295 int freed_some = 0;
296
297 /* At this point, cur_tx is the index of a TD that is one of:
298 * unallocated/freed (status set & tx_skb[entry] clear)
299 * allocated and sent (status set & tx_skb[entry] set )
300 * allocated and not yet sent (status clear & tx_skb[entry] set )
301 * still being allocated by sonic_send_packet (status clear & tx_skb[entry] clear)
302 */
303
304 if (sonic_debug > 2)
305 printk("%s: tx done\n", dev->name);
306
307 while (lp->tx_skb[entry] != NULL) {
308 if ((td_status = sonic_tda_get(dev, entry, SONIC_TD_STATUS)) == 0)
309 break;
310
311 if (td_status & 0x0001) {
312 lp->stats.tx_packets++;
313 lp->stats.tx_bytes += sonic_tda_get(dev, entry, SONIC_TD_PKTSIZE);
314 } else {
315 lp->stats.tx_errors++;
316 if (td_status & 0x0642)
317 lp->stats.tx_aborted_errors++;
318 if (td_status & 0x0180)
319 lp->stats.tx_carrier_errors++;
320 if (td_status & 0x0020)
321 lp->stats.tx_window_errors++;
322 if (td_status & 0x0004)
323 lp->stats.tx_fifo_errors++;
324 }
325
326 /* We must free the original skb */
327 dev_kfree_skb_irq(lp->tx_skb[entry]);
328 lp->tx_skb[entry] = NULL;
329 /* and unmap DMA buffer */
330 dma_unmap_single(lp->device, lp->tx_laddr[entry], lp->tx_len[entry], DMA_TO_DEVICE);
331 lp->tx_laddr[entry] = (dma_addr_t)0;
332 freed_some = 1;
333
334 if (sonic_tda_get(dev, entry, SONIC_TD_LINK) & SONIC_EOL) {
335 entry = (entry + 1) & SONIC_TDS_MASK;
336 break;
337 }
338 entry = (entry + 1) & SONIC_TDS_MASK;
339 }
340
341 if (freed_some || lp->tx_skb[entry] == NULL)
342 netif_wake_queue(dev); /* The ring is no longer full */
343 lp->cur_tx = entry;
344 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXDN); /* clear the interrupt */
345 }
346
347 /*
348 * check error conditions
349 */
350 if (status & SONIC_INT_RFO) {
351 if (sonic_debug > 1)
352 printk("%s: rx fifo overrun\n", dev->name);
353 lp->stats.rx_fifo_errors++;
354 SONIC_WRITE(SONIC_ISR, SONIC_INT_RFO); /* clear the interrupt */
355 }
356 if (status & SONIC_INT_RDE) {
357 if (sonic_debug > 1)
358 printk("%s: rx descriptors exhausted\n", dev->name);
359 lp->stats.rx_dropped++;
360 SONIC_WRITE(SONIC_ISR, SONIC_INT_RDE); /* clear the interrupt */
361 }
362 if (status & SONIC_INT_RBAE) {
363 if (sonic_debug > 1)
364 printk("%s: rx buffer area exceeded\n", dev->name);
365 lp->stats.rx_dropped++;
366 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBAE); /* clear the interrupt */
367 }
368
369 /* counter overruns; all counters are 16bit wide */
370 if (status & SONIC_INT_FAE) {
371 lp->stats.rx_frame_errors += 65536;
372 SONIC_WRITE(SONIC_ISR, SONIC_INT_FAE); /* clear the interrupt */
373 }
374 if (status & SONIC_INT_CRC) {
375 lp->stats.rx_crc_errors += 65536;
376 SONIC_WRITE(SONIC_ISR, SONIC_INT_CRC); /* clear the interrupt */
377 }
378 if (status & SONIC_INT_MP) {
379 lp->stats.rx_missed_errors += 65536;
380 SONIC_WRITE(SONIC_ISR, SONIC_INT_MP); /* clear the interrupt */
381 }
382
383 /* transmit error */
384 if (status & SONIC_INT_TXER) {
385 if ((SONIC_READ(SONIC_TCR) & SONIC_TCR_FU) && (sonic_debug > 2))
386 printk(KERN_ERR "%s: tx fifo underrun\n", dev->name);
387 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXER); /* clear the interrupt */
388 }
389
390 /* bus retry */
391 if (status & SONIC_INT_BR) {
392 printk(KERN_ERR "%s: Bus retry occurred! Device interrupt disabled.\n",
393 dev->name);
394 /* ... to help debug DMA problems causing endless interrupts. */
395 /* Bounce the eth interface to turn on the interrupt again. */
396 SONIC_WRITE(SONIC_IMR, 0);
397 SONIC_WRITE(SONIC_ISR, SONIC_INT_BR); /* clear the interrupt */
398 }
399
400 /* load CAM done */
401 if (status & SONIC_INT_LCD)
402 SONIC_WRITE(SONIC_ISR, SONIC_INT_LCD); /* clear the interrupt */
403 } while((status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT));
404 return IRQ_HANDLED;
405 }
406
407 /*
408 * We have a good packet(s), pass it/them up the network stack.
409 */
410 static void sonic_rx(struct net_device *dev)
411 {
412 struct sonic_local *lp = netdev_priv(dev);
413 int status;
414 int entry = lp->cur_rx;
415
416 while (sonic_rda_get(dev, entry, SONIC_RD_IN_USE) == 0) {
417 struct sk_buff *used_skb;
418 struct sk_buff *new_skb;
419 dma_addr_t new_laddr;
420 u16 bufadr_l;
421 u16 bufadr_h;
422 int pkt_len;
423
424 status = sonic_rda_get(dev, entry, SONIC_RD_STATUS);
425 if (status & SONIC_RCR_PRX) {
426 /* Malloc up new buffer. */
427 new_skb = dev_alloc_skb(SONIC_RBSIZE + 2);
428 if (new_skb == NULL) {
429 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name);
430 lp->stats.rx_dropped++;
431 break;
432 }
433 /* provide 16 byte IP header alignment unless DMA requires otherwise */
434 if(SONIC_BUS_SCALE(lp->dma_bitmode) == 2)
435 skb_reserve(new_skb, 2);
436
437 new_laddr = dma_map_single(lp->device, skb_put(new_skb, SONIC_RBSIZE),
438 SONIC_RBSIZE, DMA_FROM_DEVICE);
439 if (!new_laddr) {
440 dev_kfree_skb(new_skb);
441 printk(KERN_ERR "%s: Failed to map rx buffer, dropping packet.\n", dev->name);
442 lp->stats.rx_dropped++;
443 break;
444 }
445
446 /* now we have a new skb to replace it, pass the used one up the stack */
447 dma_unmap_single(lp->device, lp->rx_laddr[entry], SONIC_RBSIZE, DMA_FROM_DEVICE);
448 used_skb = lp->rx_skb[entry];
449 pkt_len = sonic_rda_get(dev, entry, SONIC_RD_PKTLEN);
450 skb_trim(used_skb, pkt_len);
451 used_skb->protocol = eth_type_trans(used_skb, dev);
452 netif_rx(used_skb);
453 dev->last_rx = jiffies;
454 lp->stats.rx_packets++;
455 lp->stats.rx_bytes += pkt_len;
456
457 /* and insert the new skb */
458 lp->rx_laddr[entry] = new_laddr;
459 lp->rx_skb[entry] = new_skb;
460
461 bufadr_l = (unsigned long)new_laddr & 0xffff;
462 bufadr_h = (unsigned long)new_laddr >> 16;
463 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_L, bufadr_l);
464 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_H, bufadr_h);
465 } else {
466 /* This should only happen, if we enable accepting broken packets. */
467 lp->stats.rx_errors++;
468 if (status & SONIC_RCR_FAER)
469 lp->stats.rx_frame_errors++;
470 if (status & SONIC_RCR_CRCR)
471 lp->stats.rx_crc_errors++;
472 }
473 if (status & SONIC_RCR_LPKT) {
474 /*
475 * this was the last packet out of the current receive buffer
476 * give the buffer back to the SONIC
477 */
478 lp->cur_rwp += SIZEOF_SONIC_RR * SONIC_BUS_SCALE(lp->dma_bitmode);
479 if (lp->cur_rwp >= lp->rra_end) lp->cur_rwp = lp->rra_laddr & 0xffff;
480 SONIC_WRITE(SONIC_RWP, lp->cur_rwp);
481 if (SONIC_READ(SONIC_ISR) & SONIC_INT_RBE) {
482 if (sonic_debug > 2)
483 printk("%s: rx buffer exhausted\n", dev->name);
484 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBE); /* clear the flag */
485 }
486 } else
487 printk(KERN_ERR "%s: rx desc without RCR_LPKT. Shouldn't happen !?\n",
488 dev->name);
489 /*
490 * give back the descriptor
491 */
492 sonic_rda_put(dev, entry, SONIC_RD_LINK,
493 sonic_rda_get(dev, entry, SONIC_RD_LINK) | SONIC_EOL);
494 sonic_rda_put(dev, entry, SONIC_RD_IN_USE, 1);
495 sonic_rda_put(dev, lp->eol_rx, SONIC_RD_LINK,
496 sonic_rda_get(dev, lp->eol_rx, SONIC_RD_LINK) & ~SONIC_EOL);
497 lp->eol_rx = entry;
498 lp->cur_rx = entry = (entry + 1) & SONIC_RDS_MASK;
499 }
500 /*
501 * If any worth-while packets have been received, netif_rx()
502 * has done a mark_bh(NET_BH) for us and will work on them
503 * when we get to the bottom-half routine.
504 */
505 }
506
507
508 /*
509 * Get the current statistics.
510 * This may be called with the device open or closed.
511 */
512 static struct net_device_stats *sonic_get_stats(struct net_device *dev)
513 {
514 struct sonic_local *lp = netdev_priv(dev);
515
516 /* read the tally counter from the SONIC and reset them */
517 lp->stats.rx_crc_errors += SONIC_READ(SONIC_CRCT);
518 SONIC_WRITE(SONIC_CRCT, 0xffff);
519 lp->stats.rx_frame_errors += SONIC_READ(SONIC_FAET);
520 SONIC_WRITE(SONIC_FAET, 0xffff);
521 lp->stats.rx_missed_errors += SONIC_READ(SONIC_MPT);
522 SONIC_WRITE(SONIC_MPT, 0xffff);
523
524 return &lp->stats;
525 }
526
527
528 /*
529 * Set or clear the multicast filter for this adaptor.
530 */
531 static void sonic_multicast_list(struct net_device *dev)
532 {
533 struct sonic_local *lp = netdev_priv(dev);
534 unsigned int rcr;
535 struct dev_mc_list *dmi = dev->mc_list;
536 unsigned char *addr;
537 int i;
538
539 rcr = SONIC_READ(SONIC_RCR) & ~(SONIC_RCR_PRO | SONIC_RCR_AMC);
540 rcr |= SONIC_RCR_BRD; /* accept broadcast packets */
541
542 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
543 rcr |= SONIC_RCR_PRO;
544 } else {
545 if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 15)) {
546 rcr |= SONIC_RCR_AMC;
547 } else {
548 if (sonic_debug > 2)
549 printk("sonic_multicast_list: mc_count %d\n", dev->mc_count);
550 sonic_set_cam_enable(dev, 1); /* always enable our own address */
551 for (i = 1; i <= dev->mc_count; i++) {
552 addr = dmi->dmi_addr;
553 dmi = dmi->next;
554 sonic_cda_put(dev, i, SONIC_CD_CAP0, addr[1] << 8 | addr[0]);
555 sonic_cda_put(dev, i, SONIC_CD_CAP1, addr[3] << 8 | addr[2]);
556 sonic_cda_put(dev, i, SONIC_CD_CAP2, addr[5] << 8 | addr[4]);
557 sonic_set_cam_enable(dev, sonic_get_cam_enable(dev) | (1 << i));
558 }
559 SONIC_WRITE(SONIC_CDC, 16);
560 /* issue Load CAM command */
561 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff);
562 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM);
563 }
564 }
565
566 if (sonic_debug > 2)
567 printk("sonic_multicast_list: setting RCR=%x\n", rcr);
568
569 SONIC_WRITE(SONIC_RCR, rcr);
570 }
571
572
573 /*
574 * Initialize the SONIC ethernet controller.
575 */
576 static int sonic_init(struct net_device *dev)
577 {
578 unsigned int cmd;
579 struct sonic_local *lp = netdev_priv(dev);
580 int i;
581
582 /*
583 * put the Sonic into software-reset mode and
584 * disable all interrupts
585 */
586 SONIC_WRITE(SONIC_IMR, 0);
587 SONIC_WRITE(SONIC_ISR, 0x7fff);
588 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
589
590 /*
591 * clear software reset flag, disable receiver, clear and
592 * enable interrupts, then completely initialize the SONIC
593 */
594 SONIC_WRITE(SONIC_CMD, 0);
595 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXDIS);
596
597 /*
598 * initialize the receive resource area
599 */
600 if (sonic_debug > 2)
601 printk("sonic_init: initialize receive resource area\n");
602
603 for (i = 0; i < SONIC_NUM_RRS; i++) {
604 u16 bufadr_l = (unsigned long)lp->rx_laddr[i] & 0xffff;
605 u16 bufadr_h = (unsigned long)lp->rx_laddr[i] >> 16;
606 sonic_rra_put(dev, i, SONIC_RR_BUFADR_L, bufadr_l);
607 sonic_rra_put(dev, i, SONIC_RR_BUFADR_H, bufadr_h);
608 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_L, SONIC_RBSIZE >> 1);
609 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_H, 0);
610 }
611
612 /* initialize all RRA registers */
613 lp->rra_end = (lp->rra_laddr + SONIC_NUM_RRS * SIZEOF_SONIC_RR *
614 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff;
615 lp->cur_rwp = (lp->rra_laddr + (SONIC_NUM_RRS - 1) * SIZEOF_SONIC_RR *
616 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff;
617
618 SONIC_WRITE(SONIC_RSA, lp->rra_laddr & 0xffff);
619 SONIC_WRITE(SONIC_REA, lp->rra_end);
620 SONIC_WRITE(SONIC_RRP, lp->rra_laddr & 0xffff);
621 SONIC_WRITE(SONIC_RWP, lp->cur_rwp);
622 SONIC_WRITE(SONIC_URRA, lp->rra_laddr >> 16);
623 SONIC_WRITE(SONIC_EOBC, (SONIC_RBSIZE >> 1) - (lp->dma_bitmode ? 2 : 1));
624
625 /* load the resource pointers */
626 if (sonic_debug > 3)
627 printk("sonic_init: issuing RRRA command\n");
628
629 SONIC_WRITE(SONIC_CMD, SONIC_CR_RRRA);
630 i = 0;
631 while (i++ < 100) {
632 if (SONIC_READ(SONIC_CMD) & SONIC_CR_RRRA)
633 break;
634 }
635
636 if (sonic_debug > 2)
637 printk("sonic_init: status=%x i=%d\n", SONIC_READ(SONIC_CMD), i);
638
639 /*
640 * Initialize the receive descriptors so that they
641 * become a circular linked list, ie. let the last
642 * descriptor point to the first again.
643 */
644 if (sonic_debug > 2)
645 printk("sonic_init: initialize receive descriptors\n");
646 for (i=0; i<SONIC_NUM_RDS; i++) {
647 sonic_rda_put(dev, i, SONIC_RD_STATUS, 0);
648 sonic_rda_put(dev, i, SONIC_RD_PKTLEN, 0);
649 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_L, 0);
650 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_H, 0);
651 sonic_rda_put(dev, i, SONIC_RD_SEQNO, 0);
652 sonic_rda_put(dev, i, SONIC_RD_IN_USE, 1);
653 sonic_rda_put(dev, i, SONIC_RD_LINK,
654 lp->rda_laddr +
655 ((i+1) * SIZEOF_SONIC_RD * SONIC_BUS_SCALE(lp->dma_bitmode)));
656 }
657 /* fix last descriptor */
658 sonic_rda_put(dev, SONIC_NUM_RDS - 1, SONIC_RD_LINK,
659 (lp->rda_laddr & 0xffff) | SONIC_EOL);
660 lp->eol_rx = SONIC_NUM_RDS - 1;
661 lp->cur_rx = 0;
662 SONIC_WRITE(SONIC_URDA, lp->rda_laddr >> 16);
663 SONIC_WRITE(SONIC_CRDA, lp->rda_laddr & 0xffff);
664
665 /*
666 * initialize transmit descriptors
667 */
668 if (sonic_debug > 2)
669 printk("sonic_init: initialize transmit descriptors\n");
670 for (i = 0; i < SONIC_NUM_TDS; i++) {
671 sonic_tda_put(dev, i, SONIC_TD_STATUS, 0);
672 sonic_tda_put(dev, i, SONIC_TD_CONFIG, 0);
673 sonic_tda_put(dev, i, SONIC_TD_PKTSIZE, 0);
674 sonic_tda_put(dev, i, SONIC_TD_FRAG_COUNT, 0);
675 sonic_tda_put(dev, i, SONIC_TD_LINK,
676 (lp->tda_laddr & 0xffff) +
677 (i + 1) * SIZEOF_SONIC_TD * SONIC_BUS_SCALE(lp->dma_bitmode));
678 lp->tx_skb[i] = NULL;
679 }
680 /* fix last descriptor */
681 sonic_tda_put(dev, SONIC_NUM_TDS - 1, SONIC_TD_LINK,
682 (lp->tda_laddr & 0xffff));
683
684 SONIC_WRITE(SONIC_UTDA, lp->tda_laddr >> 16);
685 SONIC_WRITE(SONIC_CTDA, lp->tda_laddr & 0xffff);
686 lp->cur_tx = lp->next_tx = 0;
687 lp->eol_tx = SONIC_NUM_TDS - 1;
688
689 /*
690 * put our own address to CAM desc[0]
691 */
692 sonic_cda_put(dev, 0, SONIC_CD_CAP0, dev->dev_addr[1] << 8 | dev->dev_addr[0]);
693 sonic_cda_put(dev, 0, SONIC_CD_CAP1, dev->dev_addr[3] << 8 | dev->dev_addr[2]);
694 sonic_cda_put(dev, 0, SONIC_CD_CAP2, dev->dev_addr[5] << 8 | dev->dev_addr[4]);
695 sonic_set_cam_enable(dev, 1);
696
697 for (i = 0; i < 16; i++)
698 sonic_cda_put(dev, i, SONIC_CD_ENTRY_POINTER, i);
699
700 /*
701 * initialize CAM registers
702 */
703 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff);
704 SONIC_WRITE(SONIC_CDC, 16);
705
706 /*
707 * load the CAM
708 */
709 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM);
710
711 i = 0;
712 while (i++ < 100) {
713 if (SONIC_READ(SONIC_ISR) & SONIC_INT_LCD)
714 break;
715 }
716 if (sonic_debug > 2) {
717 printk("sonic_init: CMD=%x, ISR=%x\n, i=%d",
718 SONIC_READ(SONIC_CMD), SONIC_READ(SONIC_ISR), i);
719 }
720
721 /*
722 * enable receiver, disable loopback
723 * and enable all interrupts
724 */
725 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXEN | SONIC_CR_STP);
726 SONIC_WRITE(SONIC_RCR, SONIC_RCR_DEFAULT);
727 SONIC_WRITE(SONIC_TCR, SONIC_TCR_DEFAULT);
728 SONIC_WRITE(SONIC_ISR, 0x7fff);
729 SONIC_WRITE(SONIC_IMR, SONIC_IMR_DEFAULT);
730
731 cmd = SONIC_READ(SONIC_CMD);
732 if ((cmd & SONIC_CR_RXEN) == 0 || (cmd & SONIC_CR_STP) == 0)
733 printk(KERN_ERR "sonic_init: failed, status=%x\n", cmd);
734
735 if (sonic_debug > 2)
736 printk("sonic_init: new status=%x\n",
737 SONIC_READ(SONIC_CMD));
738
739 return 0;
740 }
741
742 MODULE_LICENSE("GPL");
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