drivers/media/dvb/frontends/lgdt330x.c

   1 /*
   2  *    Support for LGDT3302 and LGDT3303 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  *
  16  *    You should have received a copy of the GNU General Public License
  17  *    along with this program; if not, write to the Free Software
  18  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  */
  21
  22 /*
  23  *                      NOTES ABOUT THIS DRIVER
  24  *
  25  * This Linux driver supports:
  26  *   DViCO FusionHDTV 3 Gold-Q
  27  *   DViCO FusionHDTV 3 Gold-T
  28  *   DViCO FusionHDTV 5 Gold
  29  *   DViCO FusionHDTV 5 Lite
  30  *   DViCO FusionHDTV 5 USB Gold
  31  *   Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
  32  *   pcHDTV HD5500
  33  *
  34  * TODO:
  35  * signal strength always returns 0.
  36  *
  37  */
  38
  39 #include <linux/kernel.h>
  40 #include <linux/module.h>
  41 #include <linux/moduleparam.h>
  42 #include <linux/init.h>
  43 #include <linux/delay.h>
  44 #include <linux/string.h>
  45 #include <linux/slab.h>
  46 #include <asm/byteorder.h>
  47
  48 #include "dvb_frontend.h"
  49 #include "lgdt330x_priv.h"
  50 #include "lgdt330x.h"
  51
  52 static int debug = 0;
  53 module_param(debug, int, 0644);
  54 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
  55 #define dprintk(args...) \
  56 do { \
  57 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
  58 } while (0)
  59
  60 struct lgdt330x_state
  61 {
  62         struct i2c_adapter* i2c;
  63
  64         /* Configuration settings */
  65         const struct lgdt330x_config* config;
  66
  67         struct dvb_frontend frontend;
  68
  69         /* Demodulator private data */
  70         fe_modulation_t current_modulation;
  71
  72         /* Tuner private data */
  73         u32 current_frequency;
  74 };
  75
  76 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
  77                                   u8 *buf, /* data bytes to send */
  78                                   int len  /* number of bytes to send */ )
  79 {
  80         struct i2c_msg msg =
  81                 { .addr = state->config->demod_address,
  82                   .flags = 0,
  83                   .buf = buf,
  84                   .len = 2 };
  85         int i;
  86         int err;
  87
  88         for (i=0; i<len-1; i+=2){
  89                 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  90                         printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
  91                         if (err < 0)
  92                                 return err;
  93                         else
  94                                 return -EREMOTEIO;
  95                 }
  96                 msg.buf += 2;
  97         }
  98         return 0;
  99 }
 100
 101 /*
 102  * This routine writes the register (reg) to the demod bus
 103  * then reads the data returned for (len) bytes.
 104  */
 105
 106 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
 107                                enum I2C_REG reg, u8* buf, int len)
 108 {
 109         u8 wr [] = { reg };
 110         struct i2c_msg msg [] = {
 111                 { .addr = state->config->demod_address,
 112                   .flags = 0, .buf = wr,  .len = 1 },
 113                 { .addr = state->config->demod_address,
 114                   .flags = I2C_M_RD, .buf = buf, .len = len },
 115         };
 116         int ret;
 117         ret = i2c_transfer(state->i2c, msg, 2);
 118         if (ret != 2) {
 119                 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
 120         } else {
 121                 ret = 0;
 122         }
 123         return ret;
 124 }
 125
 126 /* Software reset */
 127 static int lgdt3302_SwReset(struct lgdt330x_state* state)
 128 {
 129         u8 ret;
 130         u8 reset[] = {
 131                 IRQ_MASK,
 132                 0x00 /* bit 6 is active low software reset
 133                       * bits 5-0 are 1 to mask interrupts */
 134         };
 135
 136         ret = i2c_write_demod_bytes(state,
 137                                     reset, sizeof(reset));
 138         if (ret == 0) {
 139
 140                 /* force reset high (inactive) and unmask interrupts */
 141                 reset[1] = 0x7f;
 142                 ret = i2c_write_demod_bytes(state,
 143                                             reset, sizeof(reset));
 144         }
 145         return ret;
 146 }
 147
 148 static int lgdt3303_SwReset(struct lgdt330x_state* state)
 149 {
 150         u8 ret;
 151         u8 reset[] = {
 152                 0x02,
 153                 0x00 /* bit 0 is active low software reset */
 154         };
 155
 156         ret = i2c_write_demod_bytes(state,
 157                                     reset, sizeof(reset));
 158         if (ret == 0) {
 159
 160                 /* force reset high (inactive) */
 161                 reset[1] = 0x01;
 162                 ret = i2c_write_demod_bytes(state,
 163                                             reset, sizeof(reset));
 164         }
 165         return ret;
 166 }
 167
 168 static int lgdt330x_SwReset(struct lgdt330x_state* state)
 169 {
 170         switch (state->config->demod_chip) {
 171         case LGDT3302:
 172                 return lgdt3302_SwReset(state);
 173         case LGDT3303:
 174                 return lgdt3303_SwReset(state);
 175         default:
 176                 return -ENODEV;
 177         }
 178 }
 179
 180 static int lgdt330x_init(struct dvb_frontend* fe)
 181 {
 182         /* Hardware reset is done using gpio[0] of cx23880x chip.
 183          * I'd like to do it here, but don't know how to find chip address.
 184          * cx88-cards.c arranges for the reset bit to be inactive (high).
 185          * Maybe there needs to be a callable function in cx88-core or
 186          * the caller of this function needs to do it. */
 187
 188         /*
 189          * Array of byte pairs <address, value>
 190          * to initialize each different chip
 191          */
 192         static u8 lgdt3302_init_data[] = {
 193                 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
 194                 /* Change the value of NCOCTFV[25:0] of carrier
 195                    recovery center frequency register */
 196                 VSB_CARRIER_FREQ0, 0x00,
 197                 VSB_CARRIER_FREQ1, 0x87,
 198                 VSB_CARRIER_FREQ2, 0x8e,
 199                 VSB_CARRIER_FREQ3, 0x01,
 200                 /* Change the TPCLK pin polarity
 201                    data is valid on falling clock */
 202                 DEMUX_CONTROL, 0xfb,
 203                 /* Change the value of IFBW[11:0] of
 204                    AGC IF/RF loop filter bandwidth register */
 205                 AGC_RF_BANDWIDTH0, 0x40,
 206                 AGC_RF_BANDWIDTH1, 0x93,
 207                 AGC_RF_BANDWIDTH2, 0x00,
 208                 /* Change the value of bit 6, 'nINAGCBY' and
 209                    'NSSEL[1:0] of ACG function control register 2 */
 210                 AGC_FUNC_CTRL2, 0xc6,
 211                 /* Change the value of bit 6 'RFFIX'
 212                    of AGC function control register 3 */
 213                 AGC_FUNC_CTRL3, 0x40,
 214                 /* Set the value of 'INLVTHD' register 0x2a/0x2c
 215                    to 0x7fe */
 216                 AGC_DELAY0, 0x07,
 217                 AGC_DELAY2, 0xfe,
 218                 /* Change the value of IAGCBW[15:8]
 219                    of inner AGC loop filter bandwith */
 220                 AGC_LOOP_BANDWIDTH0, 0x08,
 221                 AGC_LOOP_BANDWIDTH1, 0x9a
 222         };
 223
 224         static u8 lgdt3303_init_data[] = {
 225                 0x4c, 0x14
 226         };
 227
 228         static u8 flip_lgdt3303_init_data[] = {
 229                 0x4c, 0x14,
 230                 0x87, 0xf3
 231         };
 232
 233         struct lgdt330x_state* state = fe->demodulator_priv;
 234         char  *chip_name;
 235         int    err;
 236
 237         switch (state->config->demod_chip) {
 238         case LGDT3302:
 239                 chip_name = "LGDT3302";
 240                 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
 241                                             sizeof(lgdt3302_init_data));
 242                 break;
 243         case LGDT3303:
 244                 chip_name = "LGDT3303";
 245                 if (state->config->clock_polarity_flip) {
 246                         err = i2c_write_demod_bytes(state, flip_lgdt3303_init_data,
 247                                                     sizeof(flip_lgdt3303_init_data));
 248                 } else {
 249                         err = i2c_write_demod_bytes(state, lgdt3303_init_data,
 250                                                     sizeof(lgdt3303_init_data));
 251                 }
 252                 break;
 253         default:
 254                 chip_name = "undefined";
 255                 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
 256                 err = -ENODEV;
 257         }
 258         dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
 259         if (err < 0)
 260                 return err;
 261         return lgdt330x_SwReset(state);
 262 }
 263
 264 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
 265 {
 266         *ber = 0; /* Not supplied by the demod chips */
 267         return 0;
 268 }
 269
 270 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 271 {
 272         struct lgdt330x_state* state = fe->demodulator_priv;
 273         int err;
 274         u8 buf[2];
 275
 276         switch (state->config->demod_chip) {
 277         case LGDT3302:
 278                 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
 279                                            buf, sizeof(buf));
 280                 break;
 281         case LGDT3303:
 282                 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
 283                                            buf, sizeof(buf));
 284                 break;
 285         default:
 286                 printk(KERN_WARNING
 287                        "Only LGDT3302 and LGDT3303 are supported chips.\n");
 288                 err = -ENODEV;
 289         }
 290
 291         *ucblocks = (buf[0] << 8) | buf[1];
 292         return 0;
 293 }
 294
 295 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
 296                                    struct dvb_frontend_parameters *param)
 297 {
 298         /*
 299          * Array of byte pairs <address, value>
 300          * to initialize 8VSB for lgdt3303 chip 50 MHz IF
 301          */
 302         static u8 lgdt3303_8vsb_44_data[] = {
 303                 0x04, 0x00,
 304                 0x0d, 0x40,
 305         0x0e, 0x87,
 306         0x0f, 0x8e,
 307         0x10, 0x01,
 308         0x47, 0x8b };
 309
 310         /*
 311          * Array of byte pairs <address, value>
 312          * to initialize QAM for lgdt3303 chip
 313          */
 314         static u8 lgdt3303_qam_data[] = {
 315                 0x04, 0x00,
 316                 0x0d, 0x00,
 317                 0x0e, 0x00,
 318                 0x0f, 0x00,
 319                 0x10, 0x00,
 320                 0x51, 0x63,
 321                 0x47, 0x66,
 322                 0x48, 0x66,
 323                 0x4d, 0x1a,
 324                 0x49, 0x08,
 325                 0x4a, 0x9b };
 326
 327         struct lgdt330x_state* state = fe->demodulator_priv;
 328
 329         static u8 top_ctrl_cfg[]   = { TOP_CONTROL, 0x03 };
 330
 331         int err;
 332         /* Change only if we are actually changing the modulation */
 333         if (state->current_modulation != param->u.vsb.modulation) {
 334                 switch(param->u.vsb.modulation) {
 335                 case VSB_8:
 336                         dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
 337
 338                         /* Select VSB mode */
 339                         top_ctrl_cfg[1] = 0x03;
 340
 341                         /* Select ANT connector if supported by card */
 342                         if (state->config->pll_rf_set)
 343                                 state->config->pll_rf_set(fe, 1);
 344
 345                         if (state->config->demod_chip == LGDT3303) {
 346                                 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
 347                                                             sizeof(lgdt3303_8vsb_44_data));
 348                         }
 349                         break;
 350
 351                 case QAM_64:
 352                         dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
 353
 354                         /* Select QAM_64 mode */
 355                         top_ctrl_cfg[1] = 0x00;
 356
 357                         /* Select CABLE connector if supported by card */
 358                         if (state->config->pll_rf_set)
 359                                 state->config->pll_rf_set(fe, 0);
 360
 361                         if (state->config->demod_chip == LGDT3303) {
 362                                 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
 363                                                                                         sizeof(lgdt3303_qam_data));
 364                         }
 365                         break;
 366
 367                 case QAM_256:
 368                         dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
 369
 370                         /* Select QAM_256 mode */
 371                         top_ctrl_cfg[1] = 0x01;
 372
 373                         /* Select CABLE connector if supported by card */
 374                         if (state->config->pll_rf_set)
 375                                 state->config->pll_rf_set(fe, 0);
 376
 377                         if (state->config->demod_chip == LGDT3303) {
 378                                 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
 379                                                                                         sizeof(lgdt3303_qam_data));
 380                         }
 381                         break;
 382                 default:
 383                         printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
 384                         return -1;
 385                 }
 386                 /*
 387                  * select serial or parallel MPEG harware interface
 388                  * Serial:   0x04 for LGDT3302 or 0x40 for LGDT3303
 389                  * Parallel: 0x00
 390                  */
 391                 top_ctrl_cfg[1] |= state->config->serial_mpeg;
 392
 393                 /* Select the requested mode */
 394                 i2c_write_demod_bytes(state, top_ctrl_cfg,
 395                                       sizeof(top_ctrl_cfg));
 396                 if (state->config->set_ts_params)
 397                         state->config->set_ts_params(fe, 0);
 398                 state->current_modulation = param->u.vsb.modulation;
 399         }
 400
 401         /* Tune to the specified frequency */
 402         if (fe->ops.tuner_ops.set_params) {
 403                 fe->ops.tuner_ops.set_params(fe, param);
 404                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 405         }
 406
 407         /* Keep track of the new frequency */
 408         /* FIXME this is the wrong way to do this...           */
 409         /* The tuner is shared with the video4linux analog API */
 410         state->current_frequency = param->frequency;
 411
 412         lgdt330x_SwReset(state);
 413         return 0;
 414 }
 415
 416 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
 417                                  struct dvb_frontend_parameters* param)
 418 {
 419         struct lgdt330x_state *state = fe->demodulator_priv;
 420         param->frequency = state->current_frequency;
 421         return 0;
 422 }
 423
 424 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
 425 {
 426         struct lgdt330x_state* state = fe->demodulator_priv;
 427         u8 buf[3];
 428
 429         *status = 0; /* Reset status result */
 430
 431         /* AGC status register */
 432         i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
 433         dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
 434         if ((buf[0] & 0x0c) == 0x8){
 435                 /* Test signal does not exist flag */
 436                 /* as well as the AGC lock flag.   */
 437                 *status |= FE_HAS_SIGNAL;
 438         } else {
 439                 /* Without a signal all other status bits are meaningless */
 440                 return 0;
 441         }
 442
 443         /*
 444          * You must set the Mask bits to 1 in the IRQ_MASK in order
 445          * to see that status bit in the IRQ_STATUS register.
 446          * This is done in SwReset();
 447          */
 448         /* signal status */
 449         i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
 450         dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
 451
 452
 453         /* sync status */
 454         if ((buf[2] & 0x03) == 0x01) {
 455                 *status |= FE_HAS_SYNC;
 456         }
 457
 458         /* FEC error status */
 459         if ((buf[2] & 0x0c) == 0x08) {
 460                 *status |= FE_HAS_LOCK;
 461                 *status |= FE_HAS_VITERBI;
 462         }
 463
 464         /* Carrier Recovery Lock Status Register */
 465         i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
 466         dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
 467         switch (state->current_modulation) {
 468         case QAM_256:
 469         case QAM_64:
 470                 /* Need to undestand why there are 3 lock levels here */
 471                 if ((buf[0] & 0x07) == 0x07)
 472                         *status |= FE_HAS_CARRIER;
 473                 break;
 474         case VSB_8:
 475                 if ((buf[0] & 0x80) == 0x80)
 476                         *status |= FE_HAS_CARRIER;
 477                 break;
 478         default:
 479                 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
 480         }
 481
 482         return 0;
 483 }
 484
 485 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
 486 {
 487         struct lgdt330x_state* state = fe->demodulator_priv;
 488         int err;
 489         u8 buf[3];
 490
 491         *status = 0; /* Reset status result */
 492
 493         /* lgdt3303 AGC status register */
 494         err = i2c_read_demod_bytes(state, 0x58, buf, 1);
 495         if (err < 0)
 496                 return err;
 497
 498         dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
 499         if ((buf[0] & 0x21) == 0x01){
 500                 /* Test input signal does not exist flag */
 501                 /* as well as the AGC lock flag.   */
 502                 *status |= FE_HAS_SIGNAL;
 503         } else {
 504                 /* Without a signal all other status bits are meaningless */
 505                 return 0;
 506         }
 507
 508         /* Carrier Recovery Lock Status Register */
 509         i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
 510         dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
 511         switch (state->current_modulation) {
 512         case QAM_256:
 513         case QAM_64:
 514                 /* Need to undestand why there are 3 lock levels here */
 515                 if ((buf[0] & 0x07) == 0x07)
 516                         *status |= FE_HAS_CARRIER;
 517                 else
 518                         break;
 519                 i2c_read_demod_bytes(state, 0x8a, buf, 1);
 520                 if ((buf[0] & 0x04) == 0x04)
 521                         *status |= FE_HAS_SYNC;
 522                 if ((buf[0] & 0x01) == 0x01)
 523                         *status |= FE_HAS_LOCK;
 524                 if ((buf[0] & 0x08) == 0x08)
 525                         *status |= FE_HAS_VITERBI;
 526                 break;
 527         case VSB_8:
 528                 if ((buf[0] & 0x80) == 0x80)
 529                         *status |= FE_HAS_CARRIER;
 530                 else
 531                         break;
 532                 i2c_read_demod_bytes(state, 0x38, buf, 1);
 533                 if ((buf[0] & 0x02) == 0x00)
 534                         *status |= FE_HAS_SYNC;
 535                 if ((buf[0] & 0x01) == 0x01) {
 536                         *status |= FE_HAS_LOCK;
 537                         *status |= FE_HAS_VITERBI;
 538                 }
 539                 break;
 540         default:
 541                 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
 542         }
 543         return 0;
 544 }
 545
 546 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 547 {
 548         /* not directly available. */
 549         *strength = 0;
 550         return 0;
 551 }
 552
 553 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
 554 {
 555 #ifdef SNR_IN_DB
 556         /*
 557          * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
 558          * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
 559          * respectively. The following tables are built on these formulas.
 560          * The usual definition is SNR = 20 log10(signal/noise)
 561          * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
 562          *
 563          * This table is a an ordered list of noise values computed by the
 564          * formula from the spec sheet such that the index into the table
 565          * starting at 43 or 45 is the SNR value in db. There are duplicate noise
 566          * value entries at the beginning because the SNR varies more than
 567          * 1 db for a change of 1 digit in noise at very small values of noise.
 568          *
 569          * Examples from SNR_EQ table:
 570          * noise SNR
 571          *   0    43
 572          *   1    42
 573          *   2    39
 574          *   3    37
 575          *   4    36
 576          *   5    35
 577          *   6    34
 578          *   7    33
 579          *   8    33
 580          *   9    32
 581          *   10   32
 582          *   11   31
 583          *   12   31
 584          *   13   30
 585          */
 586
 587         static const u32 SNR_EQ[] =
 588                 { 1,     2,      2,      2, 3,      3,      4,     4,     5,     7,
 589                   9,     11,     13,     17, 21,     26,     33,    41,    52,    65,
 590                   81,    102,    129,    162, 204,    257,    323,   406,   511,   644,
 591                   810,   1020,   1284,   1616, 2035,   2561,   3224,  4059,  5110,  6433,
 592                   8098,  10195,  12835,  16158, 20341,  25608,  32238, 40585, 51094, 64323,
 593                   80978, 101945, 128341, 161571, 203406, 256073, 0x40000
 594                 };
 595
 596         static const u32 SNR_PH[] =
 597                 { 1,     2,      2,      2,      3,      3,     4,     5,     6,     8,
 598                   10,    12,     15,     19,     23,     29, 37,    46,    58,    73,
 599                   91,    115,    144,    182,    229,    288, 362,   456,   574,   722,
 600                   909,   1144,   1440,   1813,   2282,   2873, 3617,  4553,  5732,  7216,
 601                   9084,  11436,  14396,  18124,  22817,  28724,  36161, 45524, 57312, 72151,
 602                   90833, 114351, 143960, 181235, 228161, 0x080000
 603                 };
 604
 605         static u8 buf[5];/* read data buffer */
 606         static u32 noise;   /* noise value */
 607         static u32 snr_db;  /* index into SNR_EQ[] */
 608         struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
 609
 610         /* read both equalizer and phase tracker noise data */
 611         i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
 612
 613         if (state->current_modulation == VSB_8) {
 614                 /* Equalizer Mean-Square Error Register for VSB */
 615                 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
 616
 617                 /*
 618                  * Look up noise value in table.
 619                  * A better search algorithm could be used...
 620                  * watch out there are duplicate entries.
 621                  */
 622                 for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
 623                         if (noise < SNR_EQ[snr_db]) {
 624                                 *snr = 43 - snr_db;
 625                                 break;
 626                         }
 627                 }
 628         } else {
 629                 /* Phase Tracker Mean-Square Error Register for QAM */
 630                 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
 631
 632                 /* Look up noise value in table. */
 633                 for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
 634                         if (noise < SNR_PH[snr_db]) {
 635                                 *snr = 45 - snr_db;
 636                                 break;
 637                         }
 638                 }
 639         }
 640 #else
 641         /* Return the raw noise value */
 642         static u8 buf[5];/* read data buffer */
 643         static u32 noise;   /* noise value */
 644         struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
 645
 646         /* read both equalizer and pase tracker noise data */
 647         i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
 648
 649         if (state->current_modulation == VSB_8) {
 650                 /* Phase Tracker Mean-Square Error Register for VSB */
 651                 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
 652         } else {
 653
 654                 /* Carrier Recovery Mean-Square Error for QAM */
 655                 i2c_read_demod_bytes(state, 0x1a, buf, 2);
 656                 noise = ((buf[0] & 3) << 8) | buf[1];
 657         }
 658
 659         /* Small values for noise mean signal is better so invert noise */
 660         *snr = ~noise;
 661 #endif
 662
 663         dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
 664
 665         return 0;
 666 }
 667
 668 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
 669 {
 670         /* Return the raw noise value */
 671         static u8 buf[5];/* read data buffer */
 672         static u32 noise;   /* noise value */
 673         struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
 674
 675         if (state->current_modulation == VSB_8) {
 676
 677                 i2c_read_demod_bytes(state, 0x6e, buf, 5);
 678                 /* Phase Tracker Mean-Square Error Register for VSB */
 679                 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
 680         } else {
 681
 682                 /* Carrier Recovery Mean-Square Error for QAM */
 683                 i2c_read_demod_bytes(state, 0x1a, buf, 2);
 684                 noise = (buf[0] << 8) | buf[1];
 685         }
 686
 687         /* Small values for noise mean signal is better so invert noise */
 688         *snr = ~noise;
 689
 690         dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
 691
 692         return 0;
 693 }
 694
 695 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
 696 {
 697         /* I have no idea about this - it may not be needed */
 698         fe_tune_settings->min_delay_ms = 500;
 699         fe_tune_settings->step_size = 0;
 700         fe_tune_settings->max_drift = 0;
 701         return 0;
 702 }
 703
 704 static void lgdt330x_release(struct dvb_frontend* fe)
 705 {
 706         struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
 707         kfree(state);
 708 }
 709
 710 static struct dvb_frontend_ops lgdt3302_ops;
 711 static struct dvb_frontend_ops lgdt3303_ops;
 712
 713 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
 714                                      struct i2c_adapter* i2c)
 715 {
 716         struct lgdt330x_state* state = NULL;
 717         u8 buf[1];
 718
 719         /* Allocate memory for the internal state */
 720         state = kzalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
 721         if (state == NULL)
 722                 goto error;
 723
 724         /* Setup the state */
 725         state->config = config;
 726         state->i2c = i2c;
 727
 728         /* Create dvb_frontend */
 729         switch (config->demod_chip) {
 730         case LGDT3302:
 731                 memcpy(&state->frontend.ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
 732                 break;
 733         case LGDT3303:
 734                 memcpy(&state->frontend.ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
 735                 break;
 736         default:
 737                 goto error;
 738         }
 739         state->frontend.demodulator_priv = state;
 740
 741         /* Verify communication with demod chip */
 742         if (i2c_read_demod_bytes(state, 2, buf, 1))
 743                 goto error;
 744
 745         state->current_frequency = -1;
 746         state->current_modulation = -1;
 747
 748         return &state->frontend;
 749
 750 error:
 751         kfree(state);
 752         dprintk("%s: ERROR\n",__FUNCTION__);
 753         return NULL;
 754 }
 755
 756 static struct dvb_frontend_ops lgdt3302_ops = {
 757         .info = {
 758                 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
 759                 .type = FE_ATSC,
 760                 .frequency_min= 54000000,
 761                 .frequency_max= 858000000,
 762                 .frequency_stepsize= 62500,
 763                 .symbol_rate_min    = 5056941,  /* QAM 64 */
 764                 .symbol_rate_max    = 10762000, /* VSB 8  */
 765                 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
 766         },
 767         .init                 = lgdt330x_init,
 768         .set_frontend         = lgdt330x_set_parameters,
 769         .get_frontend         = lgdt330x_get_frontend,
 770         .get_tune_settings    = lgdt330x_get_tune_settings,
 771         .read_status          = lgdt3302_read_status,
 772         .read_ber             = lgdt330x_read_ber,
 773         .read_signal_strength = lgdt330x_read_signal_strength,
 774         .read_snr             = lgdt3302_read_snr,
 775         .read_ucblocks        = lgdt330x_read_ucblocks,
 776         .release              = lgdt330x_release,
 777 };
 778
 779 static struct dvb_frontend_ops lgdt3303_ops = {
 780         .info = {
 781                 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
 782                 .type = FE_ATSC,
 783                 .frequency_min= 54000000,
 784                 .frequency_max= 858000000,
 785                 .frequency_stepsize= 62500,
 786                 .symbol_rate_min    = 5056941,  /* QAM 64 */
 787                 .symbol_rate_max    = 10762000, /* VSB 8  */
 788                 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
 789         },
 790         .init                 = lgdt330x_init,
 791         .set_frontend         = lgdt330x_set_parameters,
 792         .get_frontend         = lgdt330x_get_frontend,
 793         .get_tune_settings    = lgdt330x_get_tune_settings,
 794         .read_status          = lgdt3303_read_status,
 795         .read_ber             = lgdt330x_read_ber,
 796         .read_signal_strength = lgdt330x_read_signal_strength,
 797         .read_snr             = lgdt3303_read_snr,
 798         .read_ucblocks        = lgdt330x_read_ucblocks,
 799         .release              = lgdt330x_release,
 800 };
 801
 802 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
 803 MODULE_AUTHOR("Wilson Michaels");
 804 MODULE_LICENSE("GPL");
 805
 806 EXPORT_SYMBOL(lgdt330x_attach);
 807
 808 /*
 809  * Local variables:
 810  * c-basic-offset: 8
 811  * End:
 812  */