2 * Driver for NEC VR4100 series Serial Interface Unit.
4 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
6 * Based on drivers/serial/8250.c, by Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/config.h>
24 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/console.h>
29 #include <linux/platform_device.h>
30 #include <linux/err.h>
31 #include <linux/ioport.h>
32 #include <linux/init.h>
33 #include <linux/interrupt.h>
34 #include <linux/module.h>
35 #include <linux/serial.h>
36 #include <linux/serial_core.h>
37 #include <linux/serial_reg.h>
38 #include <linux/tty.h>
39 #include <linux/tty_flip.h>
42 #include <asm/vr41xx/siu.h>
43 #include <asm/vr41xx/vr41xx.h>
45 #define SIU_PORTS_MAX 2
46 #define SIU_BAUD_BASE 1152000
48 #define SIU_MINOR_BASE 82
50 #define RX_MAX_COUNT 256
51 #define TX_MAX_COUNT 15
57 #define IRMSEL_HP 0x08
58 #define IRMSEL_TEMIC 0x04
59 #define IRMSEL_SHARP 0x00
69 static const struct siu_port siu_type1_ports
[] = {
70 { .type
= PORT_VR41XX_SIU
,
72 .start
= 0x0c000000UL
, },
75 #define SIU_TYPE1_NR_PORTS (sizeof(siu_type1_ports) / sizeof(struct siu_port))
77 static const struct siu_port siu_type2_ports
[] = {
78 { .type
= PORT_VR41XX_SIU
,
80 .start
= 0x0f000800UL
, },
81 { .type
= PORT_VR41XX_DSIU
,
83 .start
= 0x0f000820UL
, },
86 #define SIU_TYPE2_NR_PORTS (sizeof(siu_type2_ports) / sizeof(struct siu_port))
88 static struct uart_port siu_uart_ports
[SIU_PORTS_MAX
];
89 static uint8_t lsr_break_flag
[SIU_PORTS_MAX
];
91 #define siu_read(port, offset) readb((port)->membase + (offset))
92 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
94 void vr41xx_select_siu_interface(siu_interface_t interface
)
96 struct uart_port
*port
;
100 port
= &siu_uart_ports
[0];
102 spin_lock_irqsave(&port
->lock
, flags
);
104 irsel
= siu_read(port
, SIUIRSEL
);
105 if (interface
== SIU_INTERFACE_IRDA
)
109 siu_write(port
, SIUIRSEL
, irsel
);
111 spin_unlock_irqrestore(&port
->lock
, flags
);
114 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface
);
116 void vr41xx_use_irda(irda_use_t use
)
118 struct uart_port
*port
;
122 port
= &siu_uart_ports
[0];
124 spin_lock_irqsave(&port
->lock
, flags
);
126 irsel
= siu_read(port
, SIUIRSEL
);
127 if (use
== FIR_USE_IRDA
)
131 siu_write(port
, SIUIRSEL
, irsel
);
133 spin_unlock_irqrestore(&port
->lock
, flags
);
136 EXPORT_SYMBOL_GPL(vr41xx_use_irda
);
138 void vr41xx_select_irda_module(irda_module_t module
, irda_speed_t speed
)
140 struct uart_port
*port
;
144 port
= &siu_uart_ports
[0];
146 spin_lock_irqsave(&port
->lock
, flags
);
148 irsel
= siu_read(port
, SIUIRSEL
);
149 irsel
&= ~(IRMSEL
| TMICTX
| TMICMODE
);
152 irsel
|= IRMSEL_SHARP
;
155 irsel
|= IRMSEL_TEMIC
| TMICMODE
;
156 if (speed
== IRDA_TX_4MBPS
)
165 siu_write(port
, SIUIRSEL
, irsel
);
167 spin_unlock_irqrestore(&port
->lock
, flags
);
170 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module
);
172 static inline void siu_clear_fifo(struct uart_port
*port
)
174 siu_write(port
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
175 siu_write(port
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR_CLEAR_RCVR
|
176 UART_FCR_CLEAR_XMIT
);
177 siu_write(port
, UART_FCR
, 0);
180 static inline int siu_probe_ports(void)
182 switch (current_cpu_data
.cputype
) {
185 return SIU_TYPE1_NR_PORTS
;
189 return SIU_TYPE2_NR_PORTS
;
195 static inline unsigned long siu_port_size(struct uart_port
*port
)
197 switch (port
->type
) {
198 case PORT_VR41XX_SIU
:
200 case PORT_VR41XX_DSIU
:
207 static inline unsigned int siu_check_type(struct uart_port
*port
)
209 switch (current_cpu_data
.cputype
) {
213 return PORT_VR41XX_SIU
;
219 return PORT_VR41XX_SIU
;
220 else if (port
->line
== 1)
221 return PORT_VR41XX_DSIU
;
228 static inline const char *siu_type_name(struct uart_port
*port
)
230 switch (port
->type
) {
231 case PORT_VR41XX_SIU
:
233 case PORT_VR41XX_DSIU
:
240 static unsigned int siu_tx_empty(struct uart_port
*port
)
244 lsr
= siu_read(port
, UART_LSR
);
245 if (lsr
& UART_LSR_TEMT
)
251 static void siu_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
255 if (mctrl
& TIOCM_DTR
)
257 if (mctrl
& TIOCM_RTS
)
259 if (mctrl
& TIOCM_OUT1
)
260 mcr
|= UART_MCR_OUT1
;
261 if (mctrl
& TIOCM_OUT2
)
262 mcr
|= UART_MCR_OUT2
;
263 if (mctrl
& TIOCM_LOOP
)
264 mcr
|= UART_MCR_LOOP
;
266 siu_write(port
, UART_MCR
, mcr
);
269 static unsigned int siu_get_mctrl(struct uart_port
*port
)
272 unsigned int mctrl
= 0;
274 msr
= siu_read(port
, UART_MSR
);
275 if (msr
& UART_MSR_DCD
)
277 if (msr
& UART_MSR_RI
)
279 if (msr
& UART_MSR_DSR
)
281 if (msr
& UART_MSR_CTS
)
287 static void siu_stop_tx(struct uart_port
*port
)
292 spin_lock_irqsave(&port
->lock
, flags
);
294 ier
= siu_read(port
, UART_IER
);
295 ier
&= ~UART_IER_THRI
;
296 siu_write(port
, UART_IER
, ier
);
298 spin_unlock_irqrestore(&port
->lock
, flags
);
301 static void siu_start_tx(struct uart_port
*port
)
306 spin_lock_irqsave(&port
->lock
, flags
);
308 ier
= siu_read(port
, UART_IER
);
309 ier
|= UART_IER_THRI
;
310 siu_write(port
, UART_IER
, ier
);
312 spin_unlock_irqrestore(&port
->lock
, flags
);
315 static void siu_stop_rx(struct uart_port
*port
)
320 spin_lock_irqsave(&port
->lock
, flags
);
322 ier
= siu_read(port
, UART_IER
);
323 ier
&= ~UART_IER_RLSI
;
324 siu_write(port
, UART_IER
, ier
);
326 port
->read_status_mask
&= ~UART_LSR_DR
;
328 spin_unlock_irqrestore(&port
->lock
, flags
);
331 static void siu_enable_ms(struct uart_port
*port
)
336 spin_lock_irqsave(&port
->lock
, flags
);
338 ier
= siu_read(port
, UART_IER
);
340 siu_write(port
, UART_IER
, ier
);
342 spin_unlock_irqrestore(&port
->lock
, flags
);
345 static void siu_break_ctl(struct uart_port
*port
, int ctl
)
350 spin_lock_irqsave(&port
->lock
, flags
);
352 lcr
= siu_read(port
, UART_LCR
);
356 lcr
&= ~UART_LCR_SBC
;
357 siu_write(port
, UART_LCR
, lcr
);
359 spin_unlock_irqrestore(&port
->lock
, flags
);
362 static inline void receive_chars(struct uart_port
*port
, uint8_t *status
,
363 struct pt_regs
*regs
)
365 struct tty_struct
*tty
;
368 int max_count
= RX_MAX_COUNT
;
370 tty
= port
->info
->tty
;
374 ch
= siu_read(port
, UART_RX
);
378 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
379 lsr
|= lsr_break_flag
[port
->line
];
380 lsr_break_flag
[port
->line
] = 0;
382 if (unlikely(lsr
& (UART_LSR_BI
| UART_LSR_FE
|
383 UART_LSR_PE
| UART_LSR_OE
))) {
384 if (lsr
& UART_LSR_BI
) {
385 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
388 if (uart_handle_break(port
))
392 if (lsr
& UART_LSR_FE
)
393 port
->icount
.frame
++;
394 if (lsr
& UART_LSR_PE
)
395 port
->icount
.parity
++;
396 if (lsr
& UART_LSR_OE
)
397 port
->icount
.overrun
++;
399 lsr
&= port
->read_status_mask
;
400 if (lsr
& UART_LSR_BI
)
402 if (lsr
& UART_LSR_FE
)
404 if (lsr
& UART_LSR_PE
)
408 if (uart_handle_sysrq_char(port
, ch
, regs
))
411 uart_insert_char(port
, lsr
, UART_LSR_OE
, ch
, flag
);
414 lsr
= siu_read(port
, UART_LSR
);
415 } while ((lsr
& UART_LSR_DR
) && (max_count
-- > 0));
417 tty_flip_buffer_push(tty
);
422 static inline void check_modem_status(struct uart_port
*port
)
426 msr
= siu_read(port
, UART_MSR
);
427 if ((msr
& UART_MSR_ANY_DELTA
) == 0)
429 if (msr
& UART_MSR_DDCD
)
430 uart_handle_dcd_change(port
, msr
& UART_MSR_DCD
);
431 if (msr
& UART_MSR_TERI
)
433 if (msr
& UART_MSR_DDSR
)
435 if (msr
& UART_MSR_DCTS
)
436 uart_handle_cts_change(port
, msr
& UART_MSR_CTS
);
438 wake_up_interruptible(&port
->info
->delta_msr_wait
);
441 static inline void transmit_chars(struct uart_port
*port
)
443 struct circ_buf
*xmit
;
444 int max_count
= TX_MAX_COUNT
;
446 xmit
= &port
->info
->xmit
;
449 siu_write(port
, UART_TX
, port
->x_char
);
455 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
461 siu_write(port
, UART_TX
, xmit
->buf
[xmit
->tail
]);
462 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
464 if (uart_circ_empty(xmit
))
466 } while (max_count
-- > 0);
468 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
469 uart_write_wakeup(port
);
471 if (uart_circ_empty(xmit
))
475 static irqreturn_t
siu_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
477 struct uart_port
*port
;
480 port
= (struct uart_port
*)dev_id
;
482 iir
= siu_read(port
, UART_IIR
);
483 if (iir
& UART_IIR_NO_INT
)
486 lsr
= siu_read(port
, UART_LSR
);
487 if (lsr
& UART_LSR_DR
)
488 receive_chars(port
, &lsr
, regs
);
490 check_modem_status(port
);
492 if (lsr
& UART_LSR_THRE
)
493 transmit_chars(port
);
498 static int siu_startup(struct uart_port
*port
)
502 if (port
->membase
== NULL
)
505 siu_clear_fifo(port
);
507 (void)siu_read(port
, UART_LSR
);
508 (void)siu_read(port
, UART_RX
);
509 (void)siu_read(port
, UART_IIR
);
510 (void)siu_read(port
, UART_MSR
);
512 if (siu_read(port
, UART_LSR
) == 0xff)
515 retval
= request_irq(port
->irq
, siu_interrupt
, 0, siu_type_name(port
), port
);
519 if (port
->type
== PORT_VR41XX_DSIU
)
520 vr41xx_enable_dsiuint(DSIUINT_ALL
);
522 siu_write(port
, UART_LCR
, UART_LCR_WLEN8
);
524 spin_lock_irq(&port
->lock
);
525 siu_set_mctrl(port
, port
->mctrl
);
526 spin_unlock_irq(&port
->lock
);
528 siu_write(port
, UART_IER
, UART_IER_RLSI
| UART_IER_RDI
);
530 (void)siu_read(port
, UART_LSR
);
531 (void)siu_read(port
, UART_RX
);
532 (void)siu_read(port
, UART_IIR
);
533 (void)siu_read(port
, UART_MSR
);
538 static void siu_shutdown(struct uart_port
*port
)
543 siu_write(port
, UART_IER
, 0);
545 spin_lock_irqsave(&port
->lock
, flags
);
547 port
->mctrl
&= ~TIOCM_OUT2
;
548 siu_set_mctrl(port
, port
->mctrl
);
550 spin_unlock_irqrestore(&port
->lock
, flags
);
552 lcr
= siu_read(port
, UART_LCR
);
553 lcr
&= ~UART_LCR_SBC
;
554 siu_write(port
, UART_LCR
, lcr
);
556 siu_clear_fifo(port
);
558 (void)siu_read(port
, UART_RX
);
560 if (port
->type
== PORT_VR41XX_DSIU
)
561 vr41xx_disable_dsiuint(DSIUINT_ALL
);
563 free_irq(port
->irq
, port
);
566 static void siu_set_termios(struct uart_port
*port
, struct termios
*new,
569 tcflag_t c_cflag
, c_iflag
;
570 uint8_t lcr
, fcr
, ier
;
571 unsigned int baud
, quot
;
574 c_cflag
= new->c_cflag
;
575 switch (c_cflag
& CSIZE
) {
577 lcr
= UART_LCR_WLEN5
;
580 lcr
= UART_LCR_WLEN6
;
583 lcr
= UART_LCR_WLEN7
;
586 lcr
= UART_LCR_WLEN8
;
590 if (c_cflag
& CSTOPB
)
591 lcr
|= UART_LCR_STOP
;
592 if (c_cflag
& PARENB
)
593 lcr
|= UART_LCR_PARITY
;
594 if ((c_cflag
& PARODD
) != PARODD
)
595 lcr
|= UART_LCR_EPAR
;
596 if (c_cflag
& CMSPAR
)
597 lcr
|= UART_LCR_SPAR
;
599 baud
= uart_get_baud_rate(port
, new, old
, 0, port
->uartclk
/16);
600 quot
= uart_get_divisor(port
, baud
);
602 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
;
604 spin_lock_irqsave(&port
->lock
, flags
);
606 uart_update_timeout(port
, c_cflag
, baud
);
608 c_iflag
= new->c_iflag
;
610 port
->read_status_mask
= UART_LSR_THRE
| UART_LSR_OE
| UART_LSR_DR
;
612 port
->read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
613 if (c_iflag
& (BRKINT
| PARMRK
))
614 port
->read_status_mask
|= UART_LSR_BI
;
616 port
->ignore_status_mask
= 0;
617 if (c_iflag
& IGNPAR
)
618 port
->ignore_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
619 if (c_iflag
& IGNBRK
) {
620 port
->ignore_status_mask
|= UART_LSR_BI
;
621 if (c_iflag
& IGNPAR
)
622 port
->ignore_status_mask
|= UART_LSR_OE
;
625 if ((c_cflag
& CREAD
) == 0)
626 port
->ignore_status_mask
|= UART_LSR_DR
;
628 ier
= siu_read(port
, UART_IER
);
629 ier
&= ~UART_IER_MSI
;
630 if (UART_ENABLE_MS(port
, c_cflag
))
632 siu_write(port
, UART_IER
, ier
);
634 siu_write(port
, UART_LCR
, lcr
| UART_LCR_DLAB
);
636 siu_write(port
, UART_DLL
, (uint8_t)quot
);
637 siu_write(port
, UART_DLM
, (uint8_t)(quot
>> 8));
639 siu_write(port
, UART_LCR
, lcr
);
641 siu_write(port
, UART_FCR
, fcr
);
643 siu_set_mctrl(port
, port
->mctrl
);
645 spin_unlock_irqrestore(&port
->lock
, flags
);
648 static void siu_pm(struct uart_port
*port
, unsigned int state
, unsigned int oldstate
)
652 switch (port
->type
) {
653 case PORT_VR41XX_SIU
:
654 vr41xx_supply_clock(SIU_CLOCK
);
656 case PORT_VR41XX_DSIU
:
657 vr41xx_supply_clock(DSIU_CLOCK
);
662 switch (port
->type
) {
663 case PORT_VR41XX_SIU
:
664 vr41xx_mask_clock(SIU_CLOCK
);
666 case PORT_VR41XX_DSIU
:
667 vr41xx_mask_clock(DSIU_CLOCK
);
674 static const char *siu_type(struct uart_port
*port
)
676 return siu_type_name(port
);
679 static void siu_release_port(struct uart_port
*port
)
683 if (port
->flags
& UPF_IOREMAP
) {
684 iounmap(port
->membase
);
685 port
->membase
= NULL
;
688 size
= siu_port_size(port
);
689 release_mem_region(port
->mapbase
, size
);
692 static int siu_request_port(struct uart_port
*port
)
695 struct resource
*res
;
697 size
= siu_port_size(port
);
698 res
= request_mem_region(port
->mapbase
, size
, siu_type_name(port
));
702 if (port
->flags
& UPF_IOREMAP
) {
703 port
->membase
= ioremap(port
->mapbase
, size
);
704 if (port
->membase
== NULL
) {
705 release_resource(res
);
713 static void siu_config_port(struct uart_port
*port
, int flags
)
715 if (flags
& UART_CONFIG_TYPE
) {
716 port
->type
= siu_check_type(port
);
717 (void)siu_request_port(port
);
721 static int siu_verify_port(struct uart_port
*port
, struct serial_struct
*serial
)
723 if (port
->type
!= PORT_VR41XX_SIU
&& port
->type
!= PORT_VR41XX_DSIU
)
725 if (port
->irq
!= serial
->irq
)
727 if (port
->iotype
!= serial
->io_type
)
729 if (port
->mapbase
!= (unsigned long)serial
->iomem_base
)
735 static struct uart_ops siu_uart_ops
= {
736 .tx_empty
= siu_tx_empty
,
737 .set_mctrl
= siu_set_mctrl
,
738 .get_mctrl
= siu_get_mctrl
,
739 .stop_tx
= siu_stop_tx
,
740 .start_tx
= siu_start_tx
,
741 .stop_rx
= siu_stop_rx
,
742 .enable_ms
= siu_enable_ms
,
743 .break_ctl
= siu_break_ctl
,
744 .startup
= siu_startup
,
745 .shutdown
= siu_shutdown
,
746 .set_termios
= siu_set_termios
,
749 .release_port
= siu_release_port
,
750 .request_port
= siu_request_port
,
751 .config_port
= siu_config_port
,
752 .verify_port
= siu_verify_port
,
755 static int siu_init_ports(void)
757 const struct siu_port
*siu
;
758 struct uart_port
*port
;
761 switch (current_cpu_data
.cputype
) {
764 siu
= siu_type1_ports
;
769 siu
= siu_type2_ports
;
775 port
= siu_uart_ports
;
776 num
= siu_probe_ports();
777 for (i
= 0; i
< num
; i
++) {
778 spin_lock_init(&port
->lock
);
779 port
->irq
= siu
->irq
;
780 port
->uartclk
= SIU_BAUD_BASE
* 16;
783 port
->iotype
= UPIO_MEM
;
784 port
->flags
= UPF_IOREMAP
| UPF_BOOT_AUTOCONF
;
785 port
->type
= siu
->type
;
787 port
->mapbase
= siu
->start
;
795 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
797 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
799 static void wait_for_xmitr(struct uart_port
*port
)
805 lsr
= siu_read(port
, UART_LSR
);
806 if (lsr
& UART_LSR_BI
)
807 lsr_break_flag
[port
->line
] = UART_LSR_BI
;
809 if ((lsr
& BOTH_EMPTY
) == BOTH_EMPTY
)
811 } while (timeout
-- > 0);
813 if (port
->flags
& UPF_CONS_FLOW
) {
817 msr
= siu_read(port
, UART_MSR
);
818 if ((msr
& UART_MSR_CTS
) != 0)
820 } while (timeout
-- > 0);
824 static void siu_console_putchar(struct uart_port
*port
, int ch
)
826 wait_for_xmitr(port
);
827 siu_write(port
, UART_TX
, ch
);
830 static void siu_console_write(struct console
*con
, const char *s
, unsigned count
)
832 struct uart_port
*port
;
835 port
= &siu_uart_ports
[con
->index
];
837 ier
= siu_read(port
, UART_IER
);
838 siu_write(port
, UART_IER
, 0);
840 uart_console_write(port
, s
, count
, siu_console_putchar
);
842 wait_for_xmitr(port
);
843 siu_write(port
, UART_IER
, ier
);
846 static int siu_console_setup(struct console
*con
, char *options
)
848 struct uart_port
*port
;
854 if (con
->index
>= SIU_PORTS_MAX
)
857 port
= &siu_uart_ports
[con
->index
];
858 if (port
->membase
== NULL
) {
859 if (port
->mapbase
== 0)
861 port
->membase
= ioremap(port
->mapbase
, siu_port_size(port
));
864 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C
);
867 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
869 return uart_set_options(port
, con
, baud
, parity
, bits
, flow
);
872 static struct uart_driver siu_uart_driver
;
874 static struct console siu_console
= {
876 .write
= siu_console_write
,
877 .device
= uart_console_device
,
878 .setup
= siu_console_setup
,
879 .flags
= CON_PRINTBUFFER
,
881 .data
= &siu_uart_driver
,
884 static int __devinit
siu_console_init(void)
886 struct uart_port
*port
;
889 num
= siu_init_ports();
893 for (i
= 0; i
< num
; i
++) {
894 port
= &siu_uart_ports
[i
];
895 port
->ops
= &siu_uart_ops
;
898 register_console(&siu_console
);
903 console_initcall(siu_console_init
);
905 #define SERIAL_VR41XX_CONSOLE &siu_console
907 #define SERIAL_VR41XX_CONSOLE NULL
910 static struct uart_driver siu_uart_driver
= {
911 .owner
= THIS_MODULE
,
912 .driver_name
= "SIU",
915 .minor
= SIU_MINOR_BASE
,
916 .cons
= SERIAL_VR41XX_CONSOLE
,
919 static int __devinit
siu_probe(struct platform_device
*dev
)
921 struct uart_port
*port
;
924 num
= siu_init_ports();
928 siu_uart_driver
.nr
= num
;
929 retval
= uart_register_driver(&siu_uart_driver
);
933 for (i
= 0; i
< num
; i
++) {
934 port
= &siu_uart_ports
[i
];
935 port
->ops
= &siu_uart_ops
;
936 port
->dev
= &dev
->dev
;
938 retval
= uart_add_one_port(&siu_uart_driver
, port
);
945 if (i
== 0 && retval
< 0) {
946 uart_unregister_driver(&siu_uart_driver
);
953 static int __devexit
siu_remove(struct platform_device
*dev
)
955 struct uart_port
*port
;
958 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
959 port
= &siu_uart_ports
[i
];
960 if (port
->dev
== &dev
->dev
) {
961 uart_remove_one_port(&siu_uart_driver
, port
);
966 uart_unregister_driver(&siu_uart_driver
);
971 static int siu_suspend(struct platform_device
*dev
, pm_message_t state
)
973 struct uart_port
*port
;
976 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
977 port
= &siu_uart_ports
[i
];
978 if ((port
->type
== PORT_VR41XX_SIU
||
979 port
->type
== PORT_VR41XX_DSIU
) && port
->dev
== &dev
->dev
)
980 uart_suspend_port(&siu_uart_driver
, port
);
987 static int siu_resume(struct platform_device
*dev
)
989 struct uart_port
*port
;
992 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
993 port
= &siu_uart_ports
[i
];
994 if ((port
->type
== PORT_VR41XX_SIU
||
995 port
->type
== PORT_VR41XX_DSIU
) && port
->dev
== &dev
->dev
)
996 uart_resume_port(&siu_uart_driver
, port
);
1002 static struct platform_device
*siu_platform_device
;
1004 static struct platform_driver siu_device_driver
= {
1006 .remove
= __devexit_p(siu_remove
),
1007 .suspend
= siu_suspend
,
1008 .resume
= siu_resume
,
1011 .owner
= THIS_MODULE
,
1015 static int __init
vr41xx_siu_init(void)
1019 siu_platform_device
= platform_device_alloc("SIU", -1);
1020 if (!siu_platform_device
)
1023 retval
= platform_device_add(siu_platform_device
);
1025 platform_device_put(siu_platform_device
);
1029 retval
= platform_driver_register(&siu_device_driver
);
1031 platform_device_unregister(siu_platform_device
);
1036 static void __exit
vr41xx_siu_exit(void)
1038 platform_driver_unregister(&siu_device_driver
);
1039 platform_device_unregister(siu_platform_device
);
1042 module_init(vr41xx_siu_init
);
1043 module_exit(vr41xx_siu_exit
);