regression: cifs endianness bug
[linux-2.6/openmoko-kernel/knife-kernel.git] / drivers / i2c / busses / i2c-nforce2.c
blob1bf590c741660a752d6f69e5592a20b5c94eadf9
1 /*
2 SMBus driver for nVidia nForce2 MCP
4 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
5 Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
6 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
7 Based on
8 SMBus 2.0 driver for AMD-8111 IO-Hub
9 Copyright (c) 2002 Vojtech Pavlik
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 SUPPORTED DEVICES PCI ID
28 nForce2 MCP 0064
29 nForce2 Ultra 400 MCP 0084
30 nForce3 Pro150 MCP 00D4
31 nForce3 250Gb MCP 00E4
32 nForce4 MCP 0052
33 nForce4 MCP-04 0034
34 nForce4 MCP51 0264
35 nForce4 MCP55 0368
36 nForce MCP61 03EB
37 nForce MCP65 0446
39 This driver supports the 2 SMBuses that are included in the MCP of the
40 nForce2/3/4/5xx chipsets.
43 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/kernel.h>
48 #include <linux/stddef.h>
49 #include <linux/ioport.h>
50 #include <linux/init.h>
51 #include <linux/i2c.h>
52 #include <linux/delay.h>
53 #include <asm/io.h>
55 MODULE_LICENSE("GPL");
56 MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
57 MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
60 struct nforce2_smbus {
61 struct i2c_adapter adapter;
62 int base;
63 int size;
64 int blockops;
65 int can_abort;
70 * nVidia nForce2 SMBus control register definitions
71 * (Newer incarnations use standard BARs 4 and 5 instead)
73 #define NFORCE_PCI_SMB1 0x50
74 #define NFORCE_PCI_SMB2 0x54
78 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
80 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
81 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
82 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
83 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
84 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
85 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
86 bytes */
87 #define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to
88 check the status of
89 the abort command */
90 #define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */
92 #define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that
93 abort succeeded */
94 #define NVIDIA_SMB_CTRL_ABORT 0x20
95 #define NVIDIA_SMB_STS_DONE 0x80
96 #define NVIDIA_SMB_STS_ALRM 0x40
97 #define NVIDIA_SMB_STS_RES 0x20
98 #define NVIDIA_SMB_STS_STATUS 0x1f
100 #define NVIDIA_SMB_PRTCL_WRITE 0x00
101 #define NVIDIA_SMB_PRTCL_READ 0x01
102 #define NVIDIA_SMB_PRTCL_QUICK 0x02
103 #define NVIDIA_SMB_PRTCL_BYTE 0x04
104 #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
105 #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
106 #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
107 #define NVIDIA_SMB_PRTCL_PEC 0x80
109 /* Misc definitions */
110 #define MAX_TIMEOUT 100
112 static struct pci_driver nforce2_driver;
114 static void nforce2_abort(struct i2c_adapter *adap)
116 struct nforce2_smbus *smbus = adap->algo_data;
117 int timeout = 0;
118 unsigned char temp;
120 dev_dbg(&adap->dev, "Aborting current transaction\n");
122 outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
123 do {
124 msleep(1);
125 temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
126 } while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
127 (timeout++ < MAX_TIMEOUT));
128 if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
129 dev_err(&adap->dev, "Can't reset the smbus\n");
130 outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
133 static int nforce2_check_status(struct i2c_adapter *adap)
135 struct nforce2_smbus *smbus = adap->algo_data;
136 int timeout = 0;
137 unsigned char temp;
139 do {
140 msleep(1);
141 temp = inb_p(NVIDIA_SMB_STS);
142 } while ((!temp) && (timeout++ < MAX_TIMEOUT));
144 if (timeout >= MAX_TIMEOUT) {
145 dev_dbg(&adap->dev, "SMBus Timeout!\n");
146 if (smbus->can_abort)
147 nforce2_abort(adap);
148 return -1;
150 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
151 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
152 return -1;
154 return 0;
157 /* Return -1 on error */
158 static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
159 unsigned short flags, char read_write,
160 u8 command, int size, union i2c_smbus_data * data)
162 struct nforce2_smbus *smbus = adap->algo_data;
163 unsigned char protocol, pec;
164 u8 len;
165 int i;
167 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
168 NVIDIA_SMB_PRTCL_WRITE;
169 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
171 switch (size) {
173 case I2C_SMBUS_QUICK:
174 protocol |= NVIDIA_SMB_PRTCL_QUICK;
175 read_write = I2C_SMBUS_WRITE;
176 break;
178 case I2C_SMBUS_BYTE:
179 if (read_write == I2C_SMBUS_WRITE)
180 outb_p(command, NVIDIA_SMB_CMD);
181 protocol |= NVIDIA_SMB_PRTCL_BYTE;
182 break;
184 case I2C_SMBUS_BYTE_DATA:
185 outb_p(command, NVIDIA_SMB_CMD);
186 if (read_write == I2C_SMBUS_WRITE)
187 outb_p(data->byte, NVIDIA_SMB_DATA);
188 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
189 break;
191 case I2C_SMBUS_WORD_DATA:
192 outb_p(command, NVIDIA_SMB_CMD);
193 if (read_write == I2C_SMBUS_WRITE) {
194 outb_p(data->word, NVIDIA_SMB_DATA);
195 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
197 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
198 break;
200 case I2C_SMBUS_BLOCK_DATA:
201 outb_p(command, NVIDIA_SMB_CMD);
202 if (read_write == I2C_SMBUS_WRITE) {
203 len = data->block[0];
204 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
205 dev_err(&adap->dev,
206 "Transaction failed "
207 "(requested block size: %d)\n",
208 len);
209 return -1;
211 outb_p(len, NVIDIA_SMB_BCNT);
212 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
213 outb_p(data->block[i + 1],
214 NVIDIA_SMB_DATA+i);
216 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
217 break;
219 default:
220 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
221 return -1;
224 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
225 outb_p(protocol, NVIDIA_SMB_PRTCL);
227 if (nforce2_check_status(adap))
228 return -1;
230 if (read_write == I2C_SMBUS_WRITE)
231 return 0;
233 switch (size) {
235 case I2C_SMBUS_BYTE:
236 case I2C_SMBUS_BYTE_DATA:
237 data->byte = inb_p(NVIDIA_SMB_DATA);
238 break;
240 case I2C_SMBUS_WORD_DATA:
241 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
242 break;
244 case I2C_SMBUS_BLOCK_DATA:
245 len = inb_p(NVIDIA_SMB_BCNT);
246 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
247 dev_err(&adap->dev, "Transaction failed "
248 "(received block size: 0x%02x)\n",
249 len);
250 return -1;
252 for (i = 0; i < len; i++)
253 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
254 data->block[0] = len;
255 break;
258 return 0;
262 static u32 nforce2_func(struct i2c_adapter *adapter)
264 /* other functionality might be possible, but is not tested */
265 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
266 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
267 I2C_FUNC_SMBUS_PEC |
268 (((struct nforce2_smbus*)adapter->algo_data)->blockops ?
269 I2C_FUNC_SMBUS_BLOCK_DATA : 0);
272 static struct i2c_algorithm smbus_algorithm = {
273 .smbus_xfer = nforce2_access,
274 .functionality = nforce2_func,
278 static struct pci_device_id nforce2_ids[] = {
279 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
280 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
281 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
282 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
283 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
284 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
285 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
286 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
287 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
288 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
289 { 0 }
292 MODULE_DEVICE_TABLE (pci, nforce2_ids);
295 static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
296 int alt_reg, struct nforce2_smbus *smbus, const char *name)
298 int error;
300 smbus->base = pci_resource_start(dev, bar);
301 if (smbus->base) {
302 smbus->size = pci_resource_len(dev, bar);
303 } else {
304 /* Older incarnations of the device used non-standard BARs */
305 u16 iobase;
307 if (pci_read_config_word(dev, alt_reg, &iobase)
308 != PCIBIOS_SUCCESSFUL) {
309 dev_err(&dev->dev, "Error reading PCI config for %s\n",
310 name);
311 return -1;
314 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
315 smbus->size = 64;
318 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
319 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
320 smbus->base, smbus->base+smbus->size-1, name);
321 return -1;
323 smbus->adapter.owner = THIS_MODULE;
324 smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
325 smbus->adapter.class = I2C_CLASS_HWMON;
326 smbus->adapter.algo = &smbus_algorithm;
327 smbus->adapter.algo_data = smbus;
328 smbus->adapter.dev.parent = &dev->dev;
329 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
330 "SMBus nForce2 adapter at %04x", smbus->base);
332 error = i2c_add_adapter(&smbus->adapter);
333 if (error) {
334 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
335 release_region(smbus->base, smbus->size);
336 return -1;
338 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
339 return 0;
343 static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
345 struct nforce2_smbus *smbuses;
346 int res1, res2;
348 /* we support 2 SMBus adapters */
349 if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
350 return -ENOMEM;
351 pci_set_drvdata(dev, smbuses);
353 switch(dev->device) {
354 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
355 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
356 smbuses[0].blockops = 1;
357 smbuses[1].blockops = 1;
358 smbuses[0].can_abort = 1;
359 smbuses[1].can_abort = 1;
362 /* SMBus adapter 1 */
363 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
364 if (res1 < 0) {
365 dev_err(&dev->dev, "Error probing SMB1.\n");
366 smbuses[0].base = 0; /* to have a check value */
368 /* SMBus adapter 2 */
369 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
370 if (res2 < 0) {
371 dev_err(&dev->dev, "Error probing SMB2.\n");
372 smbuses[1].base = 0; /* to have a check value */
374 if ((res1 < 0) && (res2 < 0)) {
375 /* we did not find even one of the SMBuses, so we give up */
376 kfree(smbuses);
377 return -ENODEV;
380 return 0;
384 static void __devexit nforce2_remove(struct pci_dev *dev)
386 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
388 if (smbuses[0].base) {
389 i2c_del_adapter(&smbuses[0].adapter);
390 release_region(smbuses[0].base, smbuses[0].size);
392 if (smbuses[1].base) {
393 i2c_del_adapter(&smbuses[1].adapter);
394 release_region(smbuses[1].base, smbuses[1].size);
396 kfree(smbuses);
399 static struct pci_driver nforce2_driver = {
400 .name = "nForce2_smbus",
401 .id_table = nforce2_ids,
402 .probe = nforce2_probe,
403 .remove = __devexit_p(nforce2_remove),
406 static int __init nforce2_init(void)
408 return pci_register_driver(&nforce2_driver);
411 static void __exit nforce2_exit(void)
413 pci_unregister_driver(&nforce2_driver);
416 module_init(nforce2_init);
417 module_exit(nforce2_exit);