[ARM] 3550/1: OSIRIS: fix serial port map for 1:1
[linux-2.6/openmoko-kernel/knife-kernel.git] / arch / cris / arch-v32 / drivers / i2c.c
blob440c20a9496345253d6a290e08bf321f233feb66
1 /*!***************************************************************************
2 *!
3 *! FILE NAME : i2c.c
4 *!
5 *! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
6 *! kernel modules (i2c_writereg/readreg) and from userspace using
7 *! ioctl()'s
8 *!
9 *! Nov 30 1998 Torbjorn Eliasson Initial version.
10 *! Bjorn Wesen Elinux kernel version.
11 *! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
12 *! don't use PB_I2C if DS1302 uses same bits,
13 *! use PB.
14 *| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
15 *| generates nack on last received byte,
16 *| instead of ack.
17 *| i2c_getack changed data level while clock
18 *| was high, causing DS75 to see a stop condition
20 *! ---------------------------------------------------------------------------
22 *! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN
24 *!***************************************************************************/
25 /* $Id: i2c.c,v 1.2 2005/05/09 15:29:49 starvik Exp $ */
26 /****************** INCLUDE FILES SECTION ***********************************/
28 #include <linux/module.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/kernel.h>
33 #include <linux/fs.h>
34 #include <linux/string.h>
35 #include <linux/init.h>
36 #include <linux/config.h>
38 #include <asm/etraxi2c.h>
40 #include <asm/system.h>
41 #include <asm/io.h>
42 #include <asm/delay.h>
44 #include "i2c.h"
46 /****************** I2C DEFINITION SECTION *************************/
48 #define D(x)
50 #define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
51 static const char i2c_name[] = "i2c";
53 #define CLOCK_LOW_TIME 8
54 #define CLOCK_HIGH_TIME 8
55 #define START_CONDITION_HOLD_TIME 8
56 #define STOP_CONDITION_HOLD_TIME 8
57 #define ENABLE_OUTPUT 0x01
58 #define ENABLE_INPUT 0x00
59 #define I2C_CLOCK_HIGH 1
60 #define I2C_CLOCK_LOW 0
61 #define I2C_DATA_HIGH 1
62 #define I2C_DATA_LOW 0
64 #define i2c_enable()
65 #define i2c_disable()
67 /* enable or disable output-enable, to select output or input on the i2c bus */
69 #define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out)
70 #define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in)
72 /* control the i2c clock and data signals */
74 #define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x)
75 #define i2c_data(x) crisv32_io_set(&cris_i2c_data, x)
77 /* read a bit from the i2c interface */
79 #define i2c_getbit() crisv32_io_rd(&cris_i2c_data)
81 #define i2c_delay(usecs) udelay(usecs)
83 /****************** VARIABLE SECTION ************************************/
85 static struct crisv32_iopin cris_i2c_clk;
86 static struct crisv32_iopin cris_i2c_data;
88 /****************** FUNCTION DEFINITION SECTION *************************/
91 /* generate i2c start condition */
93 void
94 i2c_start(void)
97 * SCL=1 SDA=1
99 i2c_dir_out();
100 i2c_delay(CLOCK_HIGH_TIME/6);
101 i2c_data(I2C_DATA_HIGH);
102 i2c_clk(I2C_CLOCK_HIGH);
103 i2c_delay(CLOCK_HIGH_TIME);
105 * SCL=1 SDA=0
107 i2c_data(I2C_DATA_LOW);
108 i2c_delay(START_CONDITION_HOLD_TIME);
110 * SCL=0 SDA=0
112 i2c_clk(I2C_CLOCK_LOW);
113 i2c_delay(CLOCK_LOW_TIME);
116 /* generate i2c stop condition */
118 void
119 i2c_stop(void)
121 i2c_dir_out();
124 * SCL=0 SDA=0
126 i2c_clk(I2C_CLOCK_LOW);
127 i2c_data(I2C_DATA_LOW);
128 i2c_delay(CLOCK_LOW_TIME*2);
130 * SCL=1 SDA=0
132 i2c_clk(I2C_CLOCK_HIGH);
133 i2c_delay(CLOCK_HIGH_TIME*2);
135 * SCL=1 SDA=1
137 i2c_data(I2C_DATA_HIGH);
138 i2c_delay(STOP_CONDITION_HOLD_TIME);
140 i2c_dir_in();
143 /* write a byte to the i2c interface */
145 void
146 i2c_outbyte(unsigned char x)
148 int i;
150 i2c_dir_out();
152 for (i = 0; i < 8; i++) {
153 if (x & 0x80) {
154 i2c_data(I2C_DATA_HIGH);
155 } else {
156 i2c_data(I2C_DATA_LOW);
159 i2c_delay(CLOCK_LOW_TIME/2);
160 i2c_clk(I2C_CLOCK_HIGH);
161 i2c_delay(CLOCK_HIGH_TIME);
162 i2c_clk(I2C_CLOCK_LOW);
163 i2c_delay(CLOCK_LOW_TIME/2);
164 x <<= 1;
166 i2c_data(I2C_DATA_LOW);
167 i2c_delay(CLOCK_LOW_TIME/2);
170 * enable input
172 i2c_dir_in();
175 /* read a byte from the i2c interface */
177 unsigned char
178 i2c_inbyte(void)
180 unsigned char aBitByte = 0;
181 int i;
183 /* Switch off I2C to get bit */
184 i2c_disable();
185 i2c_dir_in();
186 i2c_delay(CLOCK_HIGH_TIME/2);
188 /* Get bit */
189 aBitByte |= i2c_getbit();
191 /* Enable I2C */
192 i2c_enable();
193 i2c_delay(CLOCK_LOW_TIME/2);
195 for (i = 1; i < 8; i++) {
196 aBitByte <<= 1;
197 /* Clock pulse */
198 i2c_clk(I2C_CLOCK_HIGH);
199 i2c_delay(CLOCK_HIGH_TIME);
200 i2c_clk(I2C_CLOCK_LOW);
201 i2c_delay(CLOCK_LOW_TIME);
203 /* Switch off I2C to get bit */
204 i2c_disable();
205 i2c_dir_in();
206 i2c_delay(CLOCK_HIGH_TIME/2);
208 /* Get bit */
209 aBitByte |= i2c_getbit();
211 /* Enable I2C */
212 i2c_enable();
213 i2c_delay(CLOCK_LOW_TIME/2);
215 i2c_clk(I2C_CLOCK_HIGH);
216 i2c_delay(CLOCK_HIGH_TIME);
219 * we leave the clock low, getbyte is usually followed
220 * by sendack/nack, they assume the clock to be low
222 i2c_clk(I2C_CLOCK_LOW);
223 return aBitByte;
226 /*#---------------------------------------------------------------------------
228 *# FUNCTION NAME: i2c_getack
230 *# DESCRIPTION : checks if ack was received from ic2
232 *#--------------------------------------------------------------------------*/
235 i2c_getack(void)
237 int ack = 1;
239 * enable output
241 i2c_dir_out();
243 * Release data bus by setting
244 * data high
246 i2c_data(I2C_DATA_HIGH);
248 * enable input
250 i2c_dir_in();
251 i2c_delay(CLOCK_HIGH_TIME/4);
253 * generate ACK clock pulse
255 i2c_clk(I2C_CLOCK_HIGH);
257 * Use PORT PB instead of I2C
258 * for input. (I2C not working)
260 i2c_clk(1);
261 i2c_data(1);
263 * switch off I2C
265 i2c_data(1);
266 i2c_disable();
267 i2c_dir_in();
269 * now wait for ack
271 i2c_delay(CLOCK_HIGH_TIME/2);
273 * check for ack
275 if(i2c_getbit())
276 ack = 0;
277 i2c_delay(CLOCK_HIGH_TIME/2);
278 if(!ack){
279 if(!i2c_getbit()) /* receiver pulld SDA low */
280 ack = 1;
281 i2c_delay(CLOCK_HIGH_TIME/2);
285 * our clock is high now, make sure data is low
286 * before we enable our output. If we keep data high
287 * and enable output, we would generate a stop condition.
289 i2c_data(I2C_DATA_LOW);
292 * end clock pulse
294 i2c_enable();
295 i2c_dir_out();
296 i2c_clk(I2C_CLOCK_LOW);
297 i2c_delay(CLOCK_HIGH_TIME/4);
299 * enable output
301 i2c_dir_out();
303 * remove ACK clock pulse
305 i2c_data(I2C_DATA_HIGH);
306 i2c_delay(CLOCK_LOW_TIME/2);
307 return ack;
310 /*#---------------------------------------------------------------------------
312 *# FUNCTION NAME: I2C::sendAck
314 *# DESCRIPTION : Send ACK on received data
316 *#--------------------------------------------------------------------------*/
317 void
318 i2c_sendack(void)
321 * enable output
323 i2c_delay(CLOCK_LOW_TIME);
324 i2c_dir_out();
326 * set ack pulse high
328 i2c_data(I2C_DATA_LOW);
330 * generate clock pulse
332 i2c_delay(CLOCK_HIGH_TIME/6);
333 i2c_clk(I2C_CLOCK_HIGH);
334 i2c_delay(CLOCK_HIGH_TIME);
335 i2c_clk(I2C_CLOCK_LOW);
336 i2c_delay(CLOCK_LOW_TIME/6);
338 * reset data out
340 i2c_data(I2C_DATA_HIGH);
341 i2c_delay(CLOCK_LOW_TIME);
343 i2c_dir_in();
346 /*#---------------------------------------------------------------------------
348 *# FUNCTION NAME: i2c_sendnack
350 *# DESCRIPTION : Sends NACK on received data
352 *#--------------------------------------------------------------------------*/
353 void
354 i2c_sendnack(void)
357 * enable output
359 i2c_delay(CLOCK_LOW_TIME);
360 i2c_dir_out();
362 * set data high
364 i2c_data(I2C_DATA_HIGH);
366 * generate clock pulse
368 i2c_delay(CLOCK_HIGH_TIME/6);
369 i2c_clk(I2C_CLOCK_HIGH);
370 i2c_delay(CLOCK_HIGH_TIME);
371 i2c_clk(I2C_CLOCK_LOW);
372 i2c_delay(CLOCK_LOW_TIME);
374 i2c_dir_in();
377 /*#---------------------------------------------------------------------------
379 *# FUNCTION NAME: i2c_writereg
381 *# DESCRIPTION : Writes a value to an I2C device
383 *#--------------------------------------------------------------------------*/
385 i2c_writereg(unsigned char theSlave, unsigned char theReg,
386 unsigned char theValue)
388 int error, cntr = 3;
389 unsigned long flags;
391 do {
392 error = 0;
394 * we don't like to be interrupted
396 local_irq_save(flags);
398 i2c_start();
400 * send slave address
402 i2c_outbyte((theSlave & 0xfe));
404 * wait for ack
406 if(!i2c_getack())
407 error = 1;
409 * now select register
411 i2c_dir_out();
412 i2c_outbyte(theReg);
414 * now it's time to wait for ack
416 if(!i2c_getack())
417 error |= 2;
419 * send register register data
421 i2c_outbyte(theValue);
423 * now it's time to wait for ack
425 if(!i2c_getack())
426 error |= 4;
428 * end byte stream
430 i2c_stop();
432 * enable interrupt again
434 local_irq_restore(flags);
436 } while(error && cntr--);
438 i2c_delay(CLOCK_LOW_TIME);
440 return -error;
443 /*#---------------------------------------------------------------------------
445 *# FUNCTION NAME: i2c_readreg
447 *# DESCRIPTION : Reads a value from the decoder registers.
449 *#--------------------------------------------------------------------------*/
450 unsigned char
451 i2c_readreg(unsigned char theSlave, unsigned char theReg)
453 unsigned char b = 0;
454 int error, cntr = 3;
455 unsigned long flags;
457 do {
458 error = 0;
460 * we don't like to be interrupted
462 local_irq_save(flags);
464 * generate start condition
466 i2c_start();
469 * send slave address
471 i2c_outbyte((theSlave & 0xfe));
473 * wait for ack
475 if(!i2c_getack())
476 error = 1;
478 * now select register
480 i2c_dir_out();
481 i2c_outbyte(theReg);
483 * now it's time to wait for ack
485 if(!i2c_getack())
486 error = 1;
488 * repeat start condition
490 i2c_delay(CLOCK_LOW_TIME);
491 i2c_start();
493 * send slave address
495 i2c_outbyte(theSlave | 0x01);
497 * wait for ack
499 if(!i2c_getack())
500 error = 1;
502 * fetch register
504 b = i2c_inbyte();
506 * last received byte needs to be nacked
507 * instead of acked
509 i2c_sendnack();
511 * end sequence
513 i2c_stop();
515 * enable interrupt again
517 local_irq_restore(flags);
519 } while(error && cntr--);
521 return b;
524 static int
525 i2c_open(struct inode *inode, struct file *filp)
527 return 0;
530 static int
531 i2c_release(struct inode *inode, struct file *filp)
533 return 0;
536 /* Main device API. ioctl's to write or read to/from i2c registers.
539 static int
540 i2c_ioctl(struct inode *inode, struct file *file,
541 unsigned int cmd, unsigned long arg)
543 if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
544 return -EINVAL;
547 switch (_IOC_NR(cmd)) {
548 case I2C_WRITEREG:
549 /* write to an i2c slave */
550 D(printk("i2cw %d %d %d\n",
551 I2C_ARGSLAVE(arg),
552 I2C_ARGREG(arg),
553 I2C_ARGVALUE(arg)));
555 return i2c_writereg(I2C_ARGSLAVE(arg),
556 I2C_ARGREG(arg),
557 I2C_ARGVALUE(arg));
558 case I2C_READREG:
560 unsigned char val;
561 /* read from an i2c slave */
562 D(printk("i2cr %d %d ",
563 I2C_ARGSLAVE(arg),
564 I2C_ARGREG(arg)));
565 val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
566 D(printk("= %d\n", val));
567 return val;
569 default:
570 return -EINVAL;
574 return 0;
577 static struct file_operations i2c_fops = {
578 owner: THIS_MODULE,
579 ioctl: i2c_ioctl,
580 open: i2c_open,
581 release: i2c_release,
584 int __init
585 i2c_init(void)
587 int res;
589 /* Setup and enable the Port B I2C interface */
591 crisv32_io_get_name(&cris_i2c_data, CONFIG_ETRAX_I2C_DATA_PORT);
592 crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_I2C_CLK_PORT);
594 /* register char device */
596 res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
597 if(res < 0) {
598 printk(KERN_ERR "i2c: couldn't get a major number.\n");
599 return res;
602 printk(KERN_INFO "I2C driver v2.2, (c) 1999-2001 Axis Communications AB\n");
604 return 0;
607 /* this makes sure that i2c_init is called during boot */
609 module_init(i2c_init);
611 /****************** END OF FILE i2c.c ********************************/