arch/mips/sgi-ip22/ip22-time.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Time operations for IP22 machines. Original code may come from
   7  * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure)
   8  *
   9  * Copyright (C) 2001 by Ladislav Michl
  10  * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org)
  11  */
  12 #include <linux/bcd.h>
  13 #include <linux/ds1286.h>
  14 #include <linux/init.h>
  15 #include <linux/irq.h>
  16 #include <linux/kernel.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/kernel_stat.h>
  19 #include <linux/time.h>
  20
  21 #include <asm/cpu.h>
  22 #include <asm/mipsregs.h>
  23 #include <asm/io.h>
  24 #include <asm/irq.h>
  25 #include <asm/time.h>
  26 #include <asm/sgialib.h>
  27 #include <asm/sgi/ioc.h>
  28 #include <asm/sgi/hpc3.h>
  29 #include <asm/sgi/ip22.h>
  30
  31 /*
  32  * note that mktime uses month from 1 to 12 while to_tm
  33  * uses 0 to 11.
  34  */
  35 static unsigned long indy_rtc_get_time(void)
  36 {
  37         unsigned int yrs, mon, day, hrs, min, sec;
  38         unsigned int save_control;
  39         unsigned long flags;
  40
  41         spin_lock_irqsave(&rtc_lock, flags);
  42         save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
  43         hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
  44
  45         sec = BCD2BIN(hpc3c0->rtcregs[RTC_SECONDS] & 0xff);
  46         min = BCD2BIN(hpc3c0->rtcregs[RTC_MINUTES] & 0xff);
  47         hrs = BCD2BIN(hpc3c0->rtcregs[RTC_HOURS] & 0x3f);
  48         day = BCD2BIN(hpc3c0->rtcregs[RTC_DATE] & 0xff);
  49         mon = BCD2BIN(hpc3c0->rtcregs[RTC_MONTH] & 0x1f);
  50         yrs = BCD2BIN(hpc3c0->rtcregs[RTC_YEAR] & 0xff);
  51
  52         hpc3c0->rtcregs[RTC_CMD] = save_control;
  53         spin_unlock_irqrestore(&rtc_lock, flags);
  54
  55         if (yrs < 45)
  56                 yrs += 30;
  57         if ((yrs += 40) < 70)
  58                 yrs += 100;
  59
  60         return mktime(yrs + 1900, mon, day, hrs, min, sec);
  61 }
  62
  63 static int indy_rtc_set_time(unsigned long tim)
  64 {
  65         struct rtc_time tm;
  66         unsigned int save_control;
  67         unsigned long flags;
  68
  69         to_tm(tim, &tm);
  70
  71         tm.tm_mon += 1;         /* tm_mon starts at zero */
  72         tm.tm_year -= 1940;
  73         if (tm.tm_year >= 100)
  74                 tm.tm_year -= 100;
  75
  76         spin_lock_irqsave(&rtc_lock, flags);
  77         save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
  78         hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
  79
  80         hpc3c0->rtcregs[RTC_YEAR] = BIN2BCD(tm.tm_year);
  81         hpc3c0->rtcregs[RTC_MONTH] = BIN2BCD(tm.tm_mon);
  82         hpc3c0->rtcregs[RTC_DATE] = BIN2BCD(tm.tm_mday);
  83         hpc3c0->rtcregs[RTC_HOURS] = BIN2BCD(tm.tm_hour);
  84         hpc3c0->rtcregs[RTC_MINUTES] = BIN2BCD(tm.tm_min);
  85         hpc3c0->rtcregs[RTC_SECONDS] = BIN2BCD(tm.tm_sec);
  86         hpc3c0->rtcregs[RTC_HUNDREDTH_SECOND] = 0;
  87
  88         hpc3c0->rtcregs[RTC_CMD] = save_control;
  89         spin_unlock_irqrestore(&rtc_lock, flags);
  90
  91         return 0;
  92 }
  93
  94 static unsigned long dosample(void)
  95 {
  96         u32 ct0, ct1;
  97         volatile u8 msb, lsb;
  98
  99         /* Start the counter. */
 100         sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
 101                          SGINT_TCWORD_MRGEN);
 102         sgint->tcnt2 = SGINT_TCSAMP_COUNTER & 0xff;
 103         sgint->tcnt2 = SGINT_TCSAMP_COUNTER >> 8;
 104
 105         /* Get initial counter invariant */
 106         ct0 = read_c0_count();
 107
 108         /* Latch and spin until top byte of counter2 is zero */
 109         do {
 110                 sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT;
 111                 lsb = sgint->tcnt2;
 112                 msb = sgint->tcnt2;
 113                 ct1 = read_c0_count();
 114         } while (msb);
 115
 116         /* Stop the counter. */
 117         sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
 118                          SGINT_TCWORD_MSWST);
 119         /*
 120          * Return the difference, this is how far the r4k counter increments
 121          * for every 1/HZ seconds. We round off the nearest 1 MHz of master
 122          * clock (= 1000000 / HZ / 2).
 123          */
 124         /*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/
 125         return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
 126 }
 127
 128 /*
 129  * Here we need to calibrate the cycle counter to at least be close.
 130  */
 131 static __init void indy_time_init(void)
 132 {
 133         unsigned long r4k_ticks[3];
 134         unsigned long r4k_tick;
 135
 136         /*
 137          * Figure out the r4k offset, the algorithm is very simple and works in
 138          * _all_ cases as long as the 8254 counter register itself works ok (as
 139          * an interrupt driving timer it does not because of bug, this is why
 140          * we are using the onchip r4k counter/compare register to serve this
 141          * purpose, but for r4k_offset calculation it will work ok for us).
 142          * There are other very complicated ways of performing this calculation
 143          * but this one works just fine so I am not going to futz around. ;-)
 144          */
 145         printk(KERN_INFO "Calibrating system timer... ");
 146         dosample();     /* Prime cache. */
 147         dosample();     /* Prime cache. */
 148         /* Zero is NOT an option. */
 149         do {
 150                 r4k_ticks[0] = dosample();
 151         } while (!r4k_ticks[0]);
 152         do {
 153                 r4k_ticks[1] = dosample();
 154         } while (!r4k_ticks[1]);
 155
 156         if (r4k_ticks[0] != r4k_ticks[1]) {
 157                 printk("warning: timer counts differ, retrying... ");
 158                 r4k_ticks[2] = dosample();
 159                 if (r4k_ticks[2] == r4k_ticks[0]
 160                     || r4k_ticks[2] == r4k_ticks[1])
 161                         r4k_tick = r4k_ticks[2];
 162                 else {
 163                         printk("disagreement, using average... ");
 164                         r4k_tick = (r4k_ticks[0] + r4k_ticks[1]
 165                                    + r4k_ticks[2]) / 3;
 166                 }
 167         } else
 168                 r4k_tick = r4k_ticks[0];
 169
 170         printk("%d [%d.%04d MHz CPU]\n", (int) r4k_tick,
 171                 (int) (r4k_tick / (500000 / HZ)),
 172                 (int) (r4k_tick % (500000 / HZ)));
 173
 174         mips_hpt_frequency = r4k_tick * HZ;
 175 }
 176
 177 /* Generic SGI handler for (spurious) 8254 interrupts */
 178 void indy_8254timer_irq(void)
 179 {
 180         int irq = SGI_8254_0_IRQ;
 181         ULONG cnt;
 182         char c;
 183
 184         irq_enter();
 185         kstat_this_cpu.irqs[irq]++;
 186         printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
 187         ArcRead(0, &c, 1, &cnt);
 188         ArcEnterInteractiveMode();
 189         irq_exit();
 190 }
 191
 192 void indy_r4k_timer_interrupt(void)
 193 {
 194         int irq = SGI_TIMER_IRQ;
 195
 196         irq_enter();
 197         kstat_this_cpu.irqs[irq]++;
 198         timer_interrupt(irq, NULL);
 199         irq_exit();
 200 }
 201
 202 void __init plat_timer_setup(struct irqaction *irq)
 203 {
 204         /* over-write the handler, we use our own way */
 205         irq->handler = no_action;
 206
 207         /* setup irqaction */
 208         setup_irq(SGI_TIMER_IRQ, irq);
 209 }
 210
 211 void __init ip22_time_init(void)
 212 {
 213         /* setup hookup functions */
 214         rtc_mips_get_time = indy_rtc_get_time;
 215         rtc_mips_set_time = indy_rtc_set_time;
 216
 217         board_time_init = indy_time_init;
 218 }