arch/arm/mach-pxa/pxa95x.c

   1 /*
   2  * linux/arch/arm/mach-pxa/pxa95x.c
   3  *
   4  * code specific to PXA95x aka MGx
   5  *
   6  * Copyright (C) 2009-2010 Marvell International Ltd.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/pm.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/i2c/pxa-i2c.h>
  19 #include <linux/irq.h>
  20 #include <linux/io.h>
  21 #include <linux/syscore_ops.h>
  22
  23 #include <mach/hardware.h>
  24 #include <mach/gpio.h>
  25 #include <mach/pxa3xx-regs.h>
  26 #include <mach/pxa930.h>
  27 #include <mach/reset.h>
  28 #include <mach/pm.h>
  29 #include <mach/dma.h>
  30
  31 #include "generic.h"
  32 #include "devices.h"
  33 #include "clock.h"
  34
  35 static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = {
  36
  37         MFP_ADDR(GPIO0, 0x02e0),
  38         MFP_ADDR(GPIO1, 0x02dc),
  39         MFP_ADDR(GPIO2, 0x02e8),
  40         MFP_ADDR(GPIO3, 0x02d8),
  41         MFP_ADDR(GPIO4, 0x02e4),
  42         MFP_ADDR(GPIO5, 0x02ec),
  43         MFP_ADDR(GPIO6, 0x02f8),
  44         MFP_ADDR(GPIO7, 0x02fc),
  45         MFP_ADDR(GPIO8, 0x0300),
  46         MFP_ADDR(GPIO9, 0x02d4),
  47         MFP_ADDR(GPIO10, 0x02f4),
  48         MFP_ADDR(GPIO11, 0x02f0),
  49         MFP_ADDR(GPIO12, 0x0304),
  50         MFP_ADDR(GPIO13, 0x0310),
  51         MFP_ADDR(GPIO14, 0x0308),
  52         MFP_ADDR(GPIO15, 0x030c),
  53         MFP_ADDR(GPIO16, 0x04e8),
  54         MFP_ADDR(GPIO17, 0x04f4),
  55         MFP_ADDR(GPIO18, 0x04f8),
  56         MFP_ADDR(GPIO19, 0x04fc),
  57         MFP_ADDR(GPIO20, 0x0518),
  58         MFP_ADDR(GPIO21, 0x051c),
  59         MFP_ADDR(GPIO22, 0x04ec),
  60         MFP_ADDR(GPIO23, 0x0500),
  61         MFP_ADDR(GPIO24, 0x04f0),
  62         MFP_ADDR(GPIO25, 0x0504),
  63         MFP_ADDR(GPIO26, 0x0510),
  64         MFP_ADDR(GPIO27, 0x0514),
  65         MFP_ADDR(GPIO28, 0x0520),
  66         MFP_ADDR(GPIO29, 0x0600),
  67         MFP_ADDR(GPIO30, 0x0618),
  68         MFP_ADDR(GPIO31, 0x0610),
  69         MFP_ADDR(GPIO32, 0x060c),
  70         MFP_ADDR(GPIO33, 0x061c),
  71         MFP_ADDR(GPIO34, 0x0620),
  72         MFP_ADDR(GPIO35, 0x0628),
  73         MFP_ADDR(GPIO36, 0x062c),
  74         MFP_ADDR(GPIO37, 0x0630),
  75         MFP_ADDR(GPIO38, 0x0634),
  76         MFP_ADDR(GPIO39, 0x0638),
  77         MFP_ADDR(GPIO40, 0x063c),
  78         MFP_ADDR(GPIO41, 0x0614),
  79         MFP_ADDR(GPIO42, 0x0624),
  80         MFP_ADDR(GPIO43, 0x0608),
  81         MFP_ADDR(GPIO44, 0x0604),
  82         MFP_ADDR(GPIO45, 0x050c),
  83         MFP_ADDR(GPIO46, 0x0508),
  84         MFP_ADDR(GPIO47, 0x02bc),
  85         MFP_ADDR(GPIO48, 0x02b4),
  86         MFP_ADDR(GPIO49, 0x02b8),
  87         MFP_ADDR(GPIO50, 0x02c8),
  88         MFP_ADDR(GPIO51, 0x02c0),
  89         MFP_ADDR(GPIO52, 0x02c4),
  90         MFP_ADDR(GPIO53, 0x02d0),
  91         MFP_ADDR(GPIO54, 0x02cc),
  92         MFP_ADDR(GPIO55, 0x029c),
  93         MFP_ADDR(GPIO56, 0x02a0),
  94         MFP_ADDR(GPIO57, 0x0294),
  95         MFP_ADDR(GPIO58, 0x0298),
  96         MFP_ADDR(GPIO59, 0x02a4),
  97         MFP_ADDR(GPIO60, 0x02a8),
  98         MFP_ADDR(GPIO61, 0x02b0),
  99         MFP_ADDR(GPIO62, 0x02ac),
 100         MFP_ADDR(GPIO63, 0x0640),
 101         MFP_ADDR(GPIO64, 0x065c),
 102         MFP_ADDR(GPIO65, 0x0648),
 103         MFP_ADDR(GPIO66, 0x0644),
 104         MFP_ADDR(GPIO67, 0x0674),
 105         MFP_ADDR(GPIO68, 0x0658),
 106         MFP_ADDR(GPIO69, 0x0654),
 107         MFP_ADDR(GPIO70, 0x0660),
 108         MFP_ADDR(GPIO71, 0x0668),
 109         MFP_ADDR(GPIO72, 0x0664),
 110         MFP_ADDR(GPIO73, 0x0650),
 111         MFP_ADDR(GPIO74, 0x066c),
 112         MFP_ADDR(GPIO75, 0x064c),
 113         MFP_ADDR(GPIO76, 0x0670),
 114         MFP_ADDR(GPIO77, 0x0678),
 115         MFP_ADDR(GPIO78, 0x067c),
 116         MFP_ADDR(GPIO79, 0x0694),
 117         MFP_ADDR(GPIO80, 0x069c),
 118         MFP_ADDR(GPIO81, 0x06a0),
 119         MFP_ADDR(GPIO82, 0x06a4),
 120         MFP_ADDR(GPIO83, 0x0698),
 121         MFP_ADDR(GPIO84, 0x06bc),
 122         MFP_ADDR(GPIO85, 0x06b4),
 123         MFP_ADDR(GPIO86, 0x06b0),
 124         MFP_ADDR(GPIO87, 0x06c0),
 125         MFP_ADDR(GPIO88, 0x06c4),
 126         MFP_ADDR(GPIO89, 0x06ac),
 127         MFP_ADDR(GPIO90, 0x0680),
 128         MFP_ADDR(GPIO91, 0x0684),
 129         MFP_ADDR(GPIO92, 0x0688),
 130         MFP_ADDR(GPIO93, 0x0690),
 131         MFP_ADDR(GPIO94, 0x068c),
 132         MFP_ADDR(GPIO95, 0x06a8),
 133         MFP_ADDR(GPIO96, 0x06b8),
 134         MFP_ADDR(GPIO97, 0x0410),
 135         MFP_ADDR(GPIO98, 0x0418),
 136         MFP_ADDR(GPIO99, 0x041c),
 137         MFP_ADDR(GPIO100, 0x0414),
 138         MFP_ADDR(GPIO101, 0x0408),
 139         MFP_ADDR(GPIO102, 0x0324),
 140         MFP_ADDR(GPIO103, 0x040c),
 141         MFP_ADDR(GPIO104, 0x0400),
 142         MFP_ADDR(GPIO105, 0x0328),
 143         MFP_ADDR(GPIO106, 0x0404),
 144
 145         MFP_ADDR(GPIO159, 0x0524),
 146         MFP_ADDR(GPIO163, 0x0534),
 147         MFP_ADDR(GPIO167, 0x0544),
 148         MFP_ADDR(GPIO168, 0x0548),
 149         MFP_ADDR(GPIO169, 0x054c),
 150         MFP_ADDR(GPIO170, 0x0550),
 151         MFP_ADDR(GPIO171, 0x0554),
 152         MFP_ADDR(GPIO172, 0x0558),
 153         MFP_ADDR(GPIO173, 0x055c),
 154
 155         MFP_ADDR(nXCVREN, 0x0204),
 156         MFP_ADDR(DF_CLE_nOE, 0x020c),
 157         MFP_ADDR(DF_nADV1_ALE, 0x0218),
 158         MFP_ADDR(DF_SCLK_E, 0x0214),
 159         MFP_ADDR(DF_SCLK_S, 0x0210),
 160         MFP_ADDR(nBE0, 0x021c),
 161         MFP_ADDR(nBE1, 0x0220),
 162         MFP_ADDR(DF_nADV2_ALE, 0x0224),
 163         MFP_ADDR(DF_INT_RnB, 0x0228),
 164         MFP_ADDR(DF_nCS0, 0x022c),
 165         MFP_ADDR(DF_nCS1, 0x0230),
 166         MFP_ADDR(nLUA, 0x0254),
 167         MFP_ADDR(nLLA, 0x0258),
 168         MFP_ADDR(DF_nWE, 0x0234),
 169         MFP_ADDR(DF_nRE_nOE, 0x0238),
 170         MFP_ADDR(DF_ADDR0, 0x024c),
 171         MFP_ADDR(DF_ADDR1, 0x0250),
 172         MFP_ADDR(DF_ADDR2, 0x025c),
 173         MFP_ADDR(DF_ADDR3, 0x0260),
 174         MFP_ADDR(DF_IO0, 0x023c),
 175         MFP_ADDR(DF_IO1, 0x0240),
 176         MFP_ADDR(DF_IO2, 0x0244),
 177         MFP_ADDR(DF_IO3, 0x0248),
 178         MFP_ADDR(DF_IO4, 0x0264),
 179         MFP_ADDR(DF_IO5, 0x0268),
 180         MFP_ADDR(DF_IO6, 0x026c),
 181         MFP_ADDR(DF_IO7, 0x0270),
 182         MFP_ADDR(DF_IO8, 0x0274),
 183         MFP_ADDR(DF_IO9, 0x0278),
 184         MFP_ADDR(DF_IO10, 0x027c),
 185         MFP_ADDR(DF_IO11, 0x0280),
 186         MFP_ADDR(DF_IO12, 0x0284),
 187         MFP_ADDR(DF_IO13, 0x0288),
 188         MFP_ADDR(DF_IO14, 0x028c),
 189         MFP_ADDR(DF_IO15, 0x0290),
 190
 191         MFP_ADDR(GSIM_UIO, 0x0314),
 192         MFP_ADDR(GSIM_UCLK, 0x0318),
 193         MFP_ADDR(GSIM_UDET, 0x031c),
 194         MFP_ADDR(GSIM_nURST, 0x0320),
 195
 196         MFP_ADDR(PMIC_INT, 0x06c8),
 197
 198         MFP_ADDR(RDY, 0x0200),
 199
 200         MFP_ADDR_END,
 201 };
 202
 203 static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops);
 204 static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
 205 static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1);
 206 static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1);
 207 static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1);
 208 static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0);
 209 static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0);
 210 static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0);
 211 static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0);
 212 static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
 213 static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
 214 static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
 215 static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
 216
 217 static struct clk_lookup pxa95x_clkregs[] = {
 218         INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
 219         /* Power I2C clock is always on */
 220         INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
 221         INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
 222         INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
 223         INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
 224         INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL),
 225         INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"),
 226         INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL),
 227         INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL),
 228         INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL),
 229         INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL),
 230         INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL),
 231         INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
 232         INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
 233         INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
 234 };
 235
 236 void __init pxa95x_init_irq(void)
 237 {
 238         pxa_init_irq(96, NULL);
 239         pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
 240 }
 241
 242 /*
 243  * device registration specific to PXA93x.
 244  */
 245
 246 void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 247 {
 248         pxa_register_device(&pxa3xx_device_i2c_power, info);
 249 }
 250
 251 static struct platform_device *devices[] __initdata = {
 252         &sa1100_device_rtc,
 253         &pxa_device_rtc,
 254         &pxa27x_device_ssp1,
 255         &pxa27x_device_ssp2,
 256         &pxa27x_device_ssp3,
 257         &pxa3xx_device_ssp4,
 258         &pxa27x_device_pwm0,
 259         &pxa27x_device_pwm1,
 260 };
 261
 262 static int __init pxa95x_init(void)
 263 {
 264         int ret = 0, i;
 265
 266         if (cpu_is_pxa95x()) {
 267                 mfp_init_base(io_p2v(MFPR_BASE));
 268                 mfp_init_addr(pxa95x_mfp_addr_map);
 269
 270                 reset_status = ARSR;
 271
 272                 /*
 273                  * clear RDH bit every time after reset
 274                  *
 275                  * Note: the last 3 bits DxS are write-1-to-clear so carefully
 276                  * preserve them here in case they will be referenced later
 277                  */
 278                 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
 279
 280                 clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
 281
 282                 if ((ret = pxa_init_dma(IRQ_DMA, 32)))
 283                         return ret;
 284
 285                 register_syscore_ops(&pxa_irq_syscore_ops);
 286                 register_syscore_ops(&pxa_gpio_syscore_ops);
 287                 register_syscore_ops(&pxa3xx_clock_syscore_ops);
 288
 289                 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
 290         }
 291
 292         return ret;
 293 }
 294
 295 postcore_initcall(pxa95x_init);