1 /* linux/arch/arm/mach-s3c2410/s3c2410.c
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * http://www.simtec.co.uk/products/EB2410ITX/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/gpio.h>
20 #include <linux/clk.h>
21 #include <linux/sysdev.h>
22 #include <linux/syscore_ops.h>
23 #include <linux/serial_core.h>
24 #include <linux/platform_device.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/irq.h>
31 #include <mach/hardware.h>
34 #include <plat/cpu-freq.h>
36 #include <mach/regs-clock.h>
37 #include <plat/regs-serial.h>
39 #include <plat/s3c2410.h>
41 #include <plat/devs.h>
42 #include <plat/clock.h>
46 #include <plat/gpio-core.h>
47 #include <plat/gpio-cfg.h>
48 #include <plat/gpio-cfg-helpers.h>
50 /* Initial IO mappings */
52 static struct map_desc s3c2410_iodesc
[] __initdata
= {
58 /* our uart devices */
60 /* uart registration process */
62 void __init
s3c2410_init_uarts(struct s3c2410_uartcfg
*cfg
, int no
)
64 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources
, cfg
, no
);
69 * register the standard cpu IO areas, and any passed in from the
70 * machine specific initialisation.
73 void __init
s3c2410_map_io(void)
75 s3c24xx_gpiocfg_default
.set_pull
= s3c_gpio_setpull_1up
;
76 s3c24xx_gpiocfg_default
.get_pull
= s3c_gpio_getpull_1up
;
78 iotable_init(s3c2410_iodesc
, ARRAY_SIZE(s3c2410_iodesc
));
81 void __init_or_cpufreq
s3c2410_setup_clocks(void)
90 xtal_clk
= clk_get(NULL
, "xtal");
91 xtal
= clk_get_rate(xtal_clk
);
94 /* now we've got our machine bits initialised, work out what
97 fclk
= s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON
), xtal
);
99 tmp
= __raw_readl(S3C2410_CLKDIVN
);
101 /* work out clock scalings */
103 hclk
= fclk
/ ((tmp
& S3C2410_CLKDIVN_HDIVN
) ? 2 : 1);
104 pclk
= hclk
/ ((tmp
& S3C2410_CLKDIVN_PDIVN
) ? 2 : 1);
106 /* print brieft summary of clocks, etc */
108 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
109 print_mhz(fclk
), print_mhz(hclk
), print_mhz(pclk
));
111 /* initialise the clocks here, to allow other things like the
112 * console to use them
115 s3c24xx_setup_clocks(fclk
, hclk
, pclk
);
118 /* fake ARMCLK for use with cpufreq, etc. */
120 static struct clk s3c2410_armclk
= {
126 void __init
s3c2410_init_clocks(int xtal
)
128 s3c24xx_register_baseclocks(xtal
);
129 s3c2410_setup_clocks();
130 s3c2410_baseclk_add();
131 s3c24xx_register_clock(&s3c2410_armclk
);
134 struct sysdev_class s3c2410_sysclass
= {
135 .name
= "s3c2410-core",
138 /* Note, we would have liked to name this s3c2410-core, but we cannot
139 * register two sysdev_class with the same name.
141 struct sysdev_class s3c2410a_sysclass
= {
142 .name
= "s3c2410a-core",
145 static struct sys_device s3c2410_sysdev
= {
146 .cls
= &s3c2410_sysclass
,
149 /* need to register class before we actually register the device, and
150 * we also need to ensure that it has been initialised before any of the
151 * drivers even try to use it (even if not on an s3c2410 based system)
152 * as a driver which may support both 2410 and 2440 may try and use it.
155 static int __init
s3c2410_core_init(void)
157 return sysdev_class_register(&s3c2410_sysclass
);
160 core_initcall(s3c2410_core_init
);
162 static int __init
s3c2410a_core_init(void)
164 return sysdev_class_register(&s3c2410a_sysclass
);
167 core_initcall(s3c2410a_core_init
);
169 int __init
s3c2410_init(void)
171 printk("S3C2410: Initialising architecture\n");
174 register_syscore_ops(&s3c2410_pm_syscore_ops
);
176 register_syscore_ops(&s3c24xx_irq_syscore_ops
);
178 return sysdev_register(&s3c2410_sysdev
);
181 int __init
s3c2410a_init(void)
183 s3c2410_sysdev
.cls
= &s3c2410a_sysclass
;
184 return s3c2410_init();