sound/soc/samsung/s3c-i2s-v2.h

   1 /* sound/soc/samsung/s3c-i2s-v2.h
   2  *
   3  * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
   4  *
   5  * Copyright (c) 2007 Simtec Electronics
   6  *      http://armlinux.simtec.co.uk/
   7  *      Ben Dooks <ben@simtec.co.uk>
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13 */
  14
  15 /* This code is the core support for the I2S block found in a number of
  16  * Samsung SoC devices which is unofficially named I2S-V2. Currently the
  17  * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
  18  * channels via configurable GPIO.
  19  */
  20
  21 #ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H
  22 #define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__
  23
  24 #define S3C_I2SV2_DIV_BCLK      (1)
  25 #define S3C_I2SV2_DIV_RCLK      (2)
  26 #define S3C_I2SV2_DIV_PRESCALER (3)
  27
  28 #define S3C_I2SV2_CLKSRC_PCLK           0
  29 #define S3C_I2SV2_CLKSRC_AUDIOBUS       1
  30 #define S3C_I2SV2_CLKSRC_CDCLK          2
  31
  32 /* Set this flag for I2S controllers that have the bit IISMOD[12]
  33  * bridge/break RCLK signal and external Xi2sCDCLK pin.
  34  */
  35 #define S3C_FEATURE_CDCLKCON    (1 << 0)
  36
  37 /**
  38  * struct s3c_i2sv2_info - S3C I2S-V2 information
  39  * @dev: The parent device passed to use from the probe.
  40  * @regs: The pointer to the device registe block.
  41  * @feature: Set of bit-flags indicating features of the controller.
  42  * @master: True if the I2S core is the I2S bit clock master.
  43  * @dma_playback: DMA information for playback channel.
  44  * @dma_capture: DMA information for capture channel.
  45  * @suspend_iismod: PM save for the IISMOD register.
  46  * @suspend_iiscon: PM save for the IISCON register.
  47  * @suspend_iispsr: PM save for the IISPSR register.
  48  *
  49  * This is the private codec state for the hardware associated with an
  50  * I2S channel such as the register mappings and clock sources.
  51  */
  52 struct s3c_i2sv2_info {
  53         struct device   *dev;
  54         void __iomem    *regs;
  55
  56         u32             feature;
  57
  58         struct clk      *iis_pclk;
  59         struct clk      *iis_cclk;
  60
  61         unsigned char    master;
  62
  63         struct s3c_dma_params   *dma_playback;
  64         struct s3c_dma_params   *dma_capture;
  65
  66         u32              suspend_iismod;
  67         u32              suspend_iiscon;
  68         u32              suspend_iispsr;
  69
  70         unsigned long   base;
  71 };
  72
  73 extern struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai);
  74
  75 struct s3c_i2sv2_rate_calc {
  76         unsigned int    clk_div;        /* for prescaler */
  77         unsigned int    fs_div;         /* for root frame clock */
  78 };
  79
  80 extern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
  81                                    unsigned int *fstab,
  82                                    unsigned int rate, struct clk *clk);
  83
  84 /**
  85  * s3c_i2sv2_probe - probe for i2s device helper
  86  * @dai: The ASoC DAI structure supplied to the original probe.
  87  * @i2s: Our local i2s structure to fill in.
  88  * @base: The base address for the registers.
  89  */
  90 extern int s3c_i2sv2_probe(struct snd_soc_dai *dai,
  91                            struct s3c_i2sv2_info *i2s,
  92                            unsigned long base);
  93
  94 /**
  95  * s3c_i2sv2_register_dai - register dai with soc core
  96  * @dev: DAI device
  97  * @id: DAI ID
  98  * @drv: The driver structure to register
  99  *
 100  * Fill in any missing fields and then register the given dai with the
 101  * soc core.
 102  */
 103 extern int s3c_i2sv2_register_dai(struct device *dev, int id,
 104                 struct snd_soc_dai_driver *drv);
 105
 106 #endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */