Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / arch / arm / mach-s3c64xx / pm.c
blob055e2858b0dd9a31c027ecd8d7032d6ecefbddc7
1 /* linux/arch/arm/plat-s3c64xx/pm.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C64XX CPU PM support.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/suspend.h>
17 #include <linux/serial_core.h>
18 #include <linux/io.h>
19 #include <linux/gpio.h>
21 #include <mach/map.h>
22 #include <mach/irqs.h>
24 #include <plat/pm.h>
25 #include <plat/wakeup-mask.h>
27 #include <mach/regs-sys.h>
28 #include <mach/regs-gpio.h>
29 #include <mach/regs-clock.h>
30 #include <mach/regs-syscon-power.h>
31 #include <mach/regs-gpio-memport.h>
33 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
34 void s3c_pm_debug_smdkled(u32 set, u32 clear)
36 unsigned long flags;
37 int i;
39 local_irq_save(flags);
40 for (i = 0; i < 4; i++) {
41 if (clear & (1 << i))
42 gpio_set_value(S3C64XX_GPN(12 + i), 0);
43 if (set & (1 << i))
44 gpio_set_value(S3C64XX_GPN(12 + i), 1);
46 local_irq_restore(flags);
48 #endif
50 static struct sleep_save core_save[] = {
51 SAVE_ITEM(S3C_APLL_LOCK),
52 SAVE_ITEM(S3C_MPLL_LOCK),
53 SAVE_ITEM(S3C_EPLL_LOCK),
54 SAVE_ITEM(S3C_CLK_SRC),
55 SAVE_ITEM(S3C_CLK_DIV0),
56 SAVE_ITEM(S3C_CLK_DIV1),
57 SAVE_ITEM(S3C_CLK_DIV2),
58 SAVE_ITEM(S3C_CLK_OUT),
59 SAVE_ITEM(S3C_HCLK_GATE),
60 SAVE_ITEM(S3C_PCLK_GATE),
61 SAVE_ITEM(S3C_SCLK_GATE),
62 SAVE_ITEM(S3C_MEM0_GATE),
64 SAVE_ITEM(S3C_EPLL_CON1),
65 SAVE_ITEM(S3C_EPLL_CON0),
67 SAVE_ITEM(S3C64XX_MEM0DRVCON),
68 SAVE_ITEM(S3C64XX_MEM1DRVCON),
70 #ifndef CONFIG_CPU_FREQ
71 SAVE_ITEM(S3C_APLL_CON),
72 SAVE_ITEM(S3C_MPLL_CON),
73 #endif
76 static struct sleep_save misc_save[] = {
77 SAVE_ITEM(S3C64XX_AHB_CON0),
78 SAVE_ITEM(S3C64XX_AHB_CON1),
79 SAVE_ITEM(S3C64XX_AHB_CON2),
81 SAVE_ITEM(S3C64XX_SPCON),
83 SAVE_ITEM(S3C64XX_MEM0CONSTOP),
84 SAVE_ITEM(S3C64XX_MEM1CONSTOP),
85 SAVE_ITEM(S3C64XX_MEM0CONSLP0),
86 SAVE_ITEM(S3C64XX_MEM0CONSLP1),
87 SAVE_ITEM(S3C64XX_MEM1CONSLP),
90 void s3c_pm_configure_extint(void)
92 __raw_writel(s3c_irqwake_eintmask, S3C64XX_EINT_MASK);
95 void s3c_pm_restore_core(void)
97 __raw_writel(0, S3C64XX_EINT_MASK);
99 s3c_pm_debug_smdkled(1 << 2, 0);
101 s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
102 s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
105 void s3c_pm_save_core(void)
107 s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
108 s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
111 /* since both s3c6400 and s3c6410 share the same sleep pm calls, we
112 * put the per-cpu code in here until any new cpu comes along and changes
113 * this.
116 static int s3c64xx_cpu_suspend(unsigned long arg)
118 unsigned long tmp;
120 /* set our standby method to sleep */
122 tmp = __raw_readl(S3C64XX_PWR_CFG);
123 tmp &= ~S3C64XX_PWRCFG_CFG_WFI_MASK;
124 tmp |= S3C64XX_PWRCFG_CFG_WFI_SLEEP;
125 __raw_writel(tmp, S3C64XX_PWR_CFG);
127 /* clear any old wakeup */
129 __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT),
130 S3C64XX_WAKEUP_STAT);
132 /* set the LED state to 0110 over sleep */
133 s3c_pm_debug_smdkled(3 << 1, 0xf);
135 /* issue the standby signal into the pm unit. Note, we
136 * issue a write-buffer drain just in case */
138 tmp = 0;
140 asm("b 1f\n\t"
141 ".align 5\n\t"
142 "1:\n\t"
143 "mcr p15, 0, %0, c7, c10, 5\n\t"
144 "mcr p15, 0, %0, c7, c10, 4\n\t"
145 "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp));
147 /* we should never get past here */
149 panic("sleep resumed to originator?");
152 /* mapping of interrupts to parts of the wakeup mask */
153 static struct samsung_wakeup_mask wake_irqs[] = {
154 { .irq = IRQ_RTC_ALARM, .bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, },
155 { .irq = IRQ_RTC_TIC, .bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, },
156 { .irq = IRQ_PENDN, .bit = S3C64XX_PWRCFG_TS_DISABLE, },
157 { .irq = IRQ_HSMMC0, .bit = S3C64XX_PWRCFG_MMC0_DISABLE, },
158 { .irq = IRQ_HSMMC1, .bit = S3C64XX_PWRCFG_MMC1_DISABLE, },
159 { .irq = IRQ_HSMMC2, .bit = S3C64XX_PWRCFG_MMC2_DISABLE, },
160 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_BATF_DISABLE},
161 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
162 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_HSI_DISABLE },
163 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
166 static void s3c64xx_pm_prepare(void)
168 samsung_sync_wakemask(S3C64XX_PWR_CFG,
169 wake_irqs, ARRAY_SIZE(wake_irqs));
171 /* store address of resume. */
172 __raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0);
174 /* ensure previous wakeup state is cleared before sleeping */
175 __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT);
178 static int s3c64xx_pm_init(void)
180 pm_cpu_prep = s3c64xx_pm_prepare;
181 pm_cpu_sleep = s3c64xx_cpu_suspend;
182 pm_uart_udivslot = 1;
184 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
185 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
186 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
187 gpio_request(S3C64XX_GPN(14), "DEBUG_LED2");
188 gpio_request(S3C64XX_GPN(15), "DEBUG_LED3");
189 gpio_direction_output(S3C64XX_GPN(12), 0);
190 gpio_direction_output(S3C64XX_GPN(13), 0);
191 gpio_direction_output(S3C64XX_GPN(14), 0);
192 gpio_direction_output(S3C64XX_GPN(15), 0);
193 #endif
195 return 0;
198 arch_initcall(s3c64xx_pm_init);