Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / drivers / staging / rtl8192e / r8192E_phyreg.h
blob7899dd538dcd734164334914e0fb86f1dbe000e1
1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18 ******************************************************************************/
19 #ifndef _R819XU_PHYREG_H
20 #define _R819XU_PHYREG_H
23 #define RF_DATA 0x1d4
25 #define rPMAC_Reset 0x100
26 #define rPMAC_TxStart 0x104
27 #define rPMAC_TxLegacySIG 0x108
28 #define rPMAC_TxHTSIG1 0x10c
29 #define rPMAC_TxHTSIG2 0x110
30 #define rPMAC_PHYDebug 0x114
31 #define rPMAC_TxPacketNum 0x118
32 #define rPMAC_TxIdle 0x11c
33 #define rPMAC_TxMACHeader0 0x120
34 #define rPMAC_TxMACHeader1 0x124
35 #define rPMAC_TxMACHeader2 0x128
36 #define rPMAC_TxMACHeader3 0x12c
37 #define rPMAC_TxMACHeader4 0x130
38 #define rPMAC_TxMACHeader5 0x134
39 #define rPMAC_TxDataType 0x138
40 #define rPMAC_TxRandomSeed 0x13c
41 #define rPMAC_CCKPLCPPreamble 0x140
42 #define rPMAC_CCKPLCPHeader 0x144
43 #define rPMAC_CCKCRC16 0x148
44 #define rPMAC_OFDMRxCRC32OK 0x170
45 #define rPMAC_OFDMRxCRC32Er 0x174
46 #define rPMAC_OFDMRxParityEr 0x178
47 #define rPMAC_OFDMRxCRC8Er 0x17c
48 #define rPMAC_CCKCRxRC16Er 0x180
49 #define rPMAC_CCKCRxRC32Er 0x184
50 #define rPMAC_CCKCRxRC32OK 0x188
51 #define rPMAC_TxStatus 0x18c
53 #define MCS_TXAGC 0x340
54 #define CCK_TXAGC 0x348
56 /*---------------------0x400~0x4ff----------------------*/
57 #define MacBlkCtrl 0x403
59 #define rFPGA0_RFMOD 0x800
60 #define rFPGA0_TxInfo 0x804
61 #define rFPGA0_PSDFunction 0x808
62 #define rFPGA0_TxGainStage 0x80c
63 #define rFPGA0_RFTiming1 0x810
64 #define rFPGA0_RFTiming2 0x814
65 #define rFPGA0_XA_HSSIParameter1 0x820
66 #define rFPGA0_XA_HSSIParameter2 0x824
67 #define rFPGA0_XB_HSSIParameter1 0x828
68 #define rFPGA0_XB_HSSIParameter2 0x82c
69 #define rFPGA0_XC_HSSIParameter1 0x830
70 #define rFPGA0_XC_HSSIParameter2 0x834
71 #define rFPGA0_XD_HSSIParameter1 0x838
72 #define rFPGA0_XD_HSSIParameter2 0x83c
73 #define rFPGA0_XA_LSSIParameter 0x840
74 #define rFPGA0_XB_LSSIParameter 0x844
75 #define rFPGA0_XC_LSSIParameter 0x848
76 #define rFPGA0_XD_LSSIParameter 0x84c
77 #define rFPGA0_RFWakeUpParameter 0x850
78 #define rFPGA0_RFSleepUpParameter 0x854
79 #define rFPGA0_XAB_SwitchControl 0x858
80 #define rFPGA0_XCD_SwitchControl 0x85c
81 #define rFPGA0_XA_RFInterfaceOE 0x860
82 #define rFPGA0_XB_RFInterfaceOE 0x864
83 #define rFPGA0_XC_RFInterfaceOE 0x868
84 #define rFPGA0_XD_RFInterfaceOE 0x86c
85 #define rFPGA0_XAB_RFInterfaceSW 0x870
86 #define rFPGA0_XCD_RFInterfaceSW 0x874
87 #define rFPGA0_XAB_RFParameter 0x878
88 #define rFPGA0_XCD_RFParameter 0x87c
89 #define rFPGA0_AnalogParameter1 0x880
90 #define rFPGA0_AnalogParameter2 0x884
91 #define rFPGA0_AnalogParameter3 0x888
92 #define rFPGA0_AnalogParameter4 0x88c
93 #define rFPGA0_XA_LSSIReadBack 0x8a0
94 #define rFPGA0_XB_LSSIReadBack 0x8a4
95 #define rFPGA0_XC_LSSIReadBack 0x8a8
96 #define rFPGA0_XD_LSSIReadBack 0x8ac
97 #define rFPGA0_PSDReport 0x8b4
98 #define rFPGA0_XAB_RFInterfaceRB 0x8e0
99 #define rFPGA0_XCD_RFInterfaceRB 0x8e4
101 #define rFPGA1_RFMOD 0x900
102 #define rFPGA1_TxBlock 0x904
103 #define rFPGA1_DebugSelect 0x908
104 #define rFPGA1_TxInfo 0x90c
106 #define rCCK0_System 0xa00
107 #define rCCK0_AFESetting 0xa04
108 #define rCCK0_CCA 0xa08
109 #define rCCK0_RxAGC1 0xa0c
110 #define rCCK0_RxAGC2 0xa10
111 #define rCCK0_RxHP 0xa14
112 #define rCCK0_DSPParameter1 0xa18
113 #define rCCK0_DSPParameter2 0xa1c
114 #define rCCK0_TxFilter1 0xa20
115 #define rCCK0_TxFilter2 0xa24
116 #define rCCK0_DebugPort 0xa28
117 #define rCCK0_FalseAlarmReport 0xa2c
118 #define rCCK0_TRSSIReport 0xa50
119 #define rCCK0_RxReport 0xa54
120 #define rCCK0_FACounterLower 0xa5c
121 #define rCCK0_FACounterUpper 0xa58
123 #define rOFDM0_LSTF 0xc00
124 #define rOFDM0_TRxPathEnable 0xc04
125 #define rOFDM0_TRMuxPar 0xc08
126 #define rOFDM0_TRSWIsolation 0xc0c
127 #define rOFDM0_XARxAFE 0xc10
128 #define rOFDM0_XARxIQImbalance 0xc14
129 #define rOFDM0_XBRxAFE 0xc18
130 #define rOFDM0_XBRxIQImbalance 0xc1c
131 #define rOFDM0_XCRxAFE 0xc20
132 #define rOFDM0_XCRxIQImbalance 0xc24
133 #define rOFDM0_XDRxAFE 0xc28
134 #define rOFDM0_XDRxIQImbalance 0xc2c
135 #define rOFDM0_RxDetector1 0xc30
136 #define rOFDM0_RxDetector2 0xc34
137 #define rOFDM0_RxDetector3 0xc38
138 #define rOFDM0_RxDetector4 0xc3c
139 #define rOFDM0_RxDSP 0xc40
140 #define rOFDM0_CFOandDAGC 0xc44
141 #define rOFDM0_CCADropThreshold 0xc48
142 #define rOFDM0_ECCAThreshold 0xc4c
143 #define rOFDM0_XAAGCCore1 0xc50
144 #define rOFDM0_XAAGCCore2 0xc54
145 #define rOFDM0_XBAGCCore1 0xc58
146 #define rOFDM0_XBAGCCore2 0xc5c
147 #define rOFDM0_XCAGCCore1 0xc60
148 #define rOFDM0_XCAGCCore2 0xc64
149 #define rOFDM0_XDAGCCore1 0xc68
150 #define rOFDM0_XDAGCCore2 0xc6c
151 #define rOFDM0_AGCParameter1 0xc70
152 #define rOFDM0_AGCParameter2 0xc74
153 #define rOFDM0_AGCRSSITable 0xc78
154 #define rOFDM0_HTSTFAGC 0xc7c
155 #define rOFDM0_XATxIQImbalance 0xc80
156 #define rOFDM0_XATxAFE 0xc84
157 #define rOFDM0_XBTxIQImbalance 0xc88
158 #define rOFDM0_XBTxAFE 0xc8c
159 #define rOFDM0_XCTxIQImbalance 0xc90
160 #define rOFDM0_XCTxAFE 0xc94
161 #define rOFDM0_XDTxIQImbalance 0xc98
162 #define rOFDM0_XDTxAFE 0xc9c
163 #define rOFDM0_RxHPParameter 0xce0
164 #define rOFDM0_TxPseudoNoiseWgt 0xce4
165 #define rOFDM0_FrameSync 0xcf0
166 #define rOFDM0_DFSReport 0xcf4
167 #define rOFDM0_TxCoeff1 0xca4
168 #define rOFDM0_TxCoeff2 0xca8
169 #define rOFDM0_TxCoeff3 0xcac
170 #define rOFDM0_TxCoeff4 0xcb0
171 #define rOFDM0_TxCoeff5 0xcb4
172 #define rOFDM0_TxCoeff6 0xcb8
175 #define rOFDM1_LSTF 0xd00
176 #define rOFDM1_TRxPathEnable 0xd04
177 #define rOFDM1_CFO 0xd08
178 #define rOFDM1_CSI1 0xd10
179 #define rOFDM1_SBD 0xd14
180 #define rOFDM1_CSI2 0xd18
181 #define rOFDM1_CFOTracking 0xd2c
182 #define rOFDM1_TRxMesaure1 0xd34
183 #define rOFDM1_IntfDet 0xd3c
184 #define rOFDM1_PseudoNoiseStateAB 0xd50
185 #define rOFDM1_PseudoNoiseStateCD 0xd54
186 #define rOFDM1_RxPseudoNoiseWgt 0xd58
187 #define rOFDM_PHYCounter1 0xda0
188 #define rOFDM_PHYCounter2 0xda4
189 #define rOFDM_PHYCounter3 0xda8
190 #define rOFDM_ShortCFOAB 0xdac
191 #define rOFDM_ShortCFOCD 0xdb0
192 #define rOFDM_LongCFOAB 0xdb4
193 #define rOFDM_LongCFOCD 0xdb8
194 #define rOFDM_TailCFOAB 0xdbc
195 #define rOFDM_TailCFOCD 0xdc0
196 #define rOFDM_PWMeasure1 0xdc4
197 #define rOFDM_PWMeasure2 0xdc8
198 #define rOFDM_BWReport 0xdcc
199 #define rOFDM_AGCReport 0xdd0
200 #define rOFDM_RxSNR 0xdd4
201 #define rOFDM_RxEVMCSI 0xdd8
202 #define rOFDM_SIGReport 0xddc
204 #define rTxAGC_Rate18_06 0xe00
205 #define rTxAGC_Rate54_24 0xe04
206 #define rTxAGC_CCK_Mcs32 0xe08
207 #define rTxAGC_Mcs03_Mcs00 0xe10
208 #define rTxAGC_Mcs07_Mcs04 0xe14
209 #define rTxAGC_Mcs11_Mcs08 0xe18
210 #define rTxAGC_Mcs15_Mcs12 0xe1c
213 #define rZebra1_HSSIEnable 0x0
214 #define rZebra1_TRxEnable1 0x1
215 #define rZebra1_TRxEnable2 0x2
216 #define rZebra1_AGC 0x4
217 #define rZebra1_ChargePump 0x5
218 #define rZebra1_Channel 0x7
219 #define rZebra1_TxGain 0x8
220 #define rZebra1_TxLPF 0x9
221 #define rZebra1_RxLPF 0xb
222 #define rZebra1_RxHPFCorner 0xc
224 #define rGlobalCtrl 0
225 #define rRTL8256_TxLPF 19
226 #define rRTL8256_RxLPF 11
228 #define rRTL8258_TxLPF 0x11
229 #define rRTL8258_RxLPF 0x13
230 #define rRTL8258_RSSILPF 0xa
232 #define bBBResetB 0x100
233 #define bGlobalResetB 0x200
234 #define bOFDMTxStart 0x4
235 #define bCCKTxStart 0x8
236 #define bCRC32Debug 0x100
237 #define bPMACLoopback 0x10
238 #define bTxLSIG 0xffffff
239 #define bOFDMTxRate 0xf
240 #define bOFDMTxReserved 0x10
241 #define bOFDMTxLength 0x1ffe0
242 #define bOFDMTxParity 0x20000
243 #define bTxHTSIG1 0xffffff
244 #define bTxHTMCSRate 0x7f
245 #define bTxHTBW 0x80
246 #define bTxHTLength 0xffff00
247 #define bTxHTSIG2 0xffffff
248 #define bTxHTSmoothing 0x1
249 #define bTxHTSounding 0x2
250 #define bTxHTReserved 0x4
251 #define bTxHTAggreation 0x8
252 #define bTxHTSTBC 0x30
253 #define bTxHTAdvanceCoding 0x40
254 #define bTxHTShortGI 0x80
255 #define bTxHTNumberHT_LTF 0x300
256 #define bTxHTCRC8 0x3fc00
257 #define bCounterReset 0x10000
258 #define bNumOfOFDMTx 0xffff
259 #define bNumOfCCKTx 0xffff0000
260 #define bTxIdleInterval 0xffff
261 #define bOFDMService 0xffff0000
262 #define bTxMACHeader 0xffffffff
263 #define bTxDataInit 0xff
264 #define bTxHTMode 0x100
265 #define bTxDataType 0x30000
266 #define bTxRandomSeed 0xffffffff
267 #define bCCKTxPreamble 0x1
268 #define bCCKTxSFD 0xffff0000
269 #define bCCKTxSIG 0xff
270 #define bCCKTxService 0xff00
271 #define bCCKLengthExt 0x8000
272 #define bCCKTxLength 0xffff0000
273 #define bCCKTxCRC16 0xffff
274 #define bCCKTxStatus 0x1
275 #define bOFDMTxStatus 0x2
277 #define bRFMOD 0x1
278 #define bJapanMode 0x2
279 #define bCCKTxSC 0x30
280 #define bCCKEn 0x1000000
281 #define bOFDMEn 0x2000000
282 #define bOFDMRxADCPhase 0x10000
283 #define bOFDMTxDACPhase 0x40000
284 #define bXATxAGC 0x3f
285 #define bXBTxAGC 0xf00
286 #define bXCTxAGC 0xf000
287 #define bXDTxAGC 0xf0000
288 #define bPAStart 0xf0000000
289 #define bTRStart 0x00f00000
290 #define bRFStart 0x0000f000
291 #define bBBStart 0x000000f0
292 #define bBBCCKStart 0x0000000f
293 #define bPAEnd 0xf
294 #define bTREnd 0x0f000000
295 #define bRFEnd 0x000f0000
296 #define bCCAMask 0x000000f0
297 #define bR2RCCAMask 0x00000f00
298 #define bHSSI_R2TDelay 0xf8000000
299 #define bHSSI_T2RDelay 0xf80000
300 #define bContTxHSSI 0x400
301 #define bIGFromCCK 0x200
302 #define bAGCAddress 0x3f
303 #define bRxHPTx 0x7000
304 #define bRxHPT2R 0x38000
305 #define bRxHPCCKIni 0xc0000
306 #define bAGCTxCode 0xc00000
307 #define bAGCRxCode 0x300000
308 #define b3WireDataLength 0x800
309 #define b3WireAddressLength 0x400
310 #define b3WireRFPowerDown 0x1
311 #define b5GPAPEPolarity 0x40000000
312 #define b2GPAPEPolarity 0x80000000
313 #define bRFSW_TxDefaultAnt 0x3
314 #define bRFSW_TxOptionAnt 0x30
315 #define bRFSW_RxDefaultAnt 0x300
316 #define bRFSW_RxOptionAnt 0x3000
317 #define bRFSI_3WireData 0x1
318 #define bRFSI_3WireClock 0x2
319 #define bRFSI_3WireLoad 0x4
320 #define bRFSI_3WireRW 0x8
321 #define bRFSI_3Wire 0xf
322 #define bRFSI_RFENV 0x10
323 #define bRFSI_TRSW 0x20
324 #define bRFSI_TRSWB 0x40
325 #define bRFSI_ANTSW 0x100
326 #define bRFSI_ANTSWB 0x200
327 #define bRFSI_PAPE 0x400
328 #define bRFSI_PAPE5G 0x800
329 #define bBandSelect 0x1
330 #define bHTSIG2_GI 0x80
331 #define bHTSIG2_Smoothing 0x01
332 #define bHTSIG2_Sounding 0x02
333 #define bHTSIG2_Aggreaton 0x08
334 #define bHTSIG2_STBC 0x30
335 #define bHTSIG2_AdvCoding 0x40
336 #define bHTSIG2_NumOfHTLTF 0x300
337 #define bHTSIG2_CRC8 0x3fc
338 #define bHTSIG1_MCS 0x7f
339 #define bHTSIG1_BandWidth 0x80
340 #define bHTSIG1_HTLength 0xffff
341 #define bLSIG_Rate 0xf
342 #define bLSIG_Reserved 0x10
343 #define bLSIG_Length 0x1fffe
344 #define bLSIG_Parity 0x20
345 #define bCCKRxPhase 0x4
346 #define bLSSIReadAddress 0x3f000000
347 #define bLSSIReadEdge 0x80000000
348 #define bLSSIReadBackData 0xfff
349 #define bLSSIReadOKFlag 0x1000
350 #define bCCKSampleRate 0x8
352 #define bRegulator0Standby 0x1
353 #define bRegulatorPLLStandby 0x2
354 #define bRegulator1Standby 0x4
355 #define bPLLPowerUp 0x8
356 #define bDPLLPowerUp 0x10
357 #define bDA10PowerUp 0x20
358 #define bAD7PowerUp 0x200
359 #define bDA6PowerUp 0x2000
360 #define bXtalPowerUp 0x4000
361 #define b40MDClkPowerUP 0x8000
362 #define bDA6DebugMode 0x20000
363 #define bDA6Swing 0x380000
364 #define bADClkPhase 0x4000000
365 #define b80MClkDelay 0x18000000
366 #define bAFEWatchDogEnable 0x20000000
367 #define bXtalCap 0x0f000000
368 #define bXtalCap01 0xc0000000
369 #define bXtalCap23 0x3
370 #define bXtalCap92x 0x0f000000
371 #define bIntDifClkEnable 0x400
372 #define bExtSigClkEnable 0x800
373 #define bBandgapMbiasPowerUp 0x10000
374 #define bAD11SHGain 0xc0000
375 #define bAD11InputRange 0x700000
376 #define bAD11OPCurrent 0x3800000
377 #define bIPathLoopback 0x4000000
378 #define bQPathLoopback 0x8000000
379 #define bAFELoopback 0x10000000
380 #define bDA10Swing 0x7e0
381 #define bDA10Reverse 0x800
382 #define bDAClkSource 0x1000
383 #define bAD7InputRange 0x6000
384 #define bAD7Gain 0x38000
385 #define bAD7OutputCMMode 0x40000
386 #define bAD7InputCMMode 0x380000
387 #define bAD7Current 0xc00000
388 #define bRegulatorAdjust 0x7000000
389 #define bAD11PowerUpAtTx 0x1
390 #define bDA10PSAtTx 0x10
391 #define bAD11PowerUpAtRx 0x100
392 #define bDA10PSAtRx 0x1000
394 #define bCCKRxAGCFormat 0x200
396 #define bPSDFFTSamplepPoint 0xc000
397 #define bPSDAverageNum 0x3000
398 #define bIQPathControl 0xc00
399 #define bPSDFreq 0x3ff
400 #define bPSDAntennaPath 0x30
401 #define bPSDIQSwitch 0x40
402 #define bPSDRxTrigger 0x400000
403 #define bPSDTxTrigger 0x80000000
404 #define bPSDSineToneScale 0x7f000000
405 #define bPSDReport 0xffff
407 #define bOFDMTxSC 0x30000000
408 #define bCCKTxOn 0x1
409 #define bOFDMTxOn 0x2
410 #define bDebugPage 0xfff
411 #define bDebugItem 0xff
412 #define bAntL 0x10
413 #define bAntNonHT 0x100
414 #define bAntHT1 0x1000
415 #define bAntHT2 0x10000
416 #define bAntHT1S1 0x100000
417 #define bAntNonHTS1 0x1000000
419 #define bCCKBBMode 0x3
420 #define bCCKTxPowerSaving 0x80
421 #define bCCKRxPowerSaving 0x40
422 #define bCCKSideBand 0x10
423 #define bCCKScramble 0x8
424 #define bCCKAntDiversity 0x8000
425 #define bCCKCarrierRecovery 0x4000
426 #define bCCKTxRate 0x3000
427 #define bCCKDCCancel 0x0800
428 #define bCCKISICancel 0x0400
429 #define bCCKMatchFilter 0x0200
430 #define bCCKEqualizer 0x0100
431 #define bCCKPreambleDetect 0x800000
432 #define bCCKFastFalseCCA 0x400000
433 #define bCCKChEstStart 0x300000
434 #define bCCKCCACount 0x080000
435 #define bCCKcs_lim 0x070000
436 #define bCCKBistMode 0x80000000
437 #define bCCKCCAMask 0x40000000
438 #define bCCKTxDACPhase 0x4
439 #define bCCKRxADCPhase 0x20000000
440 #define bCCKr_cp_mode0 0x0100
441 #define bCCKTxDCOffset 0xf0
442 #define bCCKRxDCOffset 0xf
443 #define bCCKCCAMode 0xc000
444 #define bCCKFalseCS_lim 0x3f00
445 #define bCCKCS_ratio 0xc00000
446 #define bCCKCorgBit_sel 0x300000
447 #define bCCKPD_lim 0x0f0000
448 #define bCCKNewCCA 0x80000000
449 #define bCCKRxHPofIG 0x8000
450 #define bCCKRxIG 0x7f00
451 #define bCCKLNAPolarity 0x800000
452 #define bCCKRx1stGain 0x7f0000
453 #define bCCKRFExtend 0x20000000
454 #define bCCKRxAGCSatLevel 0x1f000000
455 #define bCCKRxAGCSatCount 0xe0
456 #define bCCKRxRFSettle 0x1f
457 #define bCCKFixedRxAGC 0x8000
458 #define bCCKAntennaPolarity 0x2000
459 #define bCCKTxFilterType 0x0c00
460 #define bCCKRxAGCReportType 0x0300
461 #define bCCKRxDAGCEn 0x80000000
462 #define bCCKRxDAGCPeriod 0x20000000
463 #define bCCKRxDAGCSatLevel 0x1f000000
464 #define bCCKTimingRecovery 0x800000
465 #define bCCKTxC0 0x3f0000
466 #define bCCKTxC1 0x3f000000
467 #define bCCKTxC2 0x3f
468 #define bCCKTxC3 0x3f00
469 #define bCCKTxC4 0x3f0000
470 #define bCCKTxC5 0x3f000000
471 #define bCCKTxC6 0x3f
472 #define bCCKTxC7 0x3f00
473 #define bCCKDebugPort 0xff0000
474 #define bCCKDACDebug 0x0f000000
475 #define bCCKFalseAlarmEnable 0x8000
476 #define bCCKFalseAlarmRead 0x4000
477 #define bCCKTRSSI 0x7f
478 #define bCCKRxAGCReport 0xfe
479 #define bCCKRxReport_AntSel 0x80000000
480 #define bCCKRxReport_MFOff 0x40000000
481 #define bCCKRxRxReport_SQLoss 0x20000000
482 #define bCCKRxReport_Pktloss 0x10000000
483 #define bCCKRxReport_Lockedbit 0x08000000
484 #define bCCKRxReport_RateError 0x04000000
485 #define bCCKRxReport_RxRate 0x03000000
486 #define bCCKRxFACounterLower 0xff
487 #define bCCKRxFACounterUpper 0xff000000
488 #define bCCKRxHPAGCStart 0xe000
489 #define bCCKRxHPAGCFinal 0x1c00
491 #define bCCKRxFalseAlarmEnable 0x8000
492 #define bCCKFACounterFreeze 0x4000
494 #define bCCKTxPathSel 0x10000000
495 #define bCCKDefaultRxPath 0xc000000
496 #define bCCKOptionRxPath 0x3000000
498 #define bNumOfSTF 0x3
499 #define bShift_L 0xc0
500 #define bGI_TH 0xc
501 #define bRxPathA 0x1
502 #define bRxPathB 0x2
503 #define bRxPathC 0x4
504 #define bRxPathD 0x8
505 #define bTxPathA 0x1
506 #define bTxPathB 0x2
507 #define bTxPathC 0x4
508 #define bTxPathD 0x8
509 #define bTRSSIFreq 0x200
510 #define bADCBackoff 0x3000
511 #define bDFIRBackoff 0xc000
512 #define bTRSSILatchPhase 0x10000
513 #define bRxIDCOffset 0xff
514 #define bRxQDCOffset 0xff00
515 #define bRxDFIRMode 0x1800000
516 #define bRxDCNFType 0xe000000
517 #define bRXIQImb_A 0x3ff
518 #define bRXIQImb_B 0xfc00
519 #define bRXIQImb_C 0x3f0000
520 #define bRXIQImb_D 0xffc00000
521 #define bDC_dc_Notch 0x60000
522 #define bRxNBINotch 0x1f000000
523 #define bPD_TH 0xf
524 #define bPD_TH_Opt2 0xc000
525 #define bPWED_TH 0x700
526 #define bIfMF_Win_L 0x800
527 #define bPD_Option 0x1000
528 #define bMF_Win_L 0xe000
529 #define bBW_Search_L 0x30000
530 #define bwin_enh_L 0xc0000
531 #define bBW_TH 0x700000
532 #define bED_TH2 0x3800000
533 #define bBW_option 0x4000000
534 #define bRatio_TH 0x18000000
535 #define bWindow_L 0xe0000000
536 #define bSBD_Option 0x1
537 #define bFrame_TH 0x1c
538 #define bFS_Option 0x60
539 #define bDC_Slope_check 0x80
540 #define bFGuard_Counter_DC_L 0xe00
541 #define bFrame_Weight_Short 0x7000
542 #define bSub_Tune 0xe00000
543 #define bFrame_DC_Length 0xe000000
544 #define bSBD_start_offset 0x30000000
545 #define bFrame_TH_2 0x7
546 #define bFrame_GI2_TH 0x38
547 #define bGI2_Sync_en 0x40
548 #define bSarch_Short_Early 0x300
549 #define bSarch_Short_Late 0xc00
550 #define bSarch_GI2_Late 0x70000
551 #define bCFOAntSum 0x1
552 #define bCFOAcc 0x2
553 #define bCFOStartOffset 0xc
554 #define bCFOLookBack 0x70
555 #define bCFOSumWeight 0x80
556 #define bDAGCEnable 0x10000
557 #define bTXIQImb_A 0x3ff
558 #define bTXIQImb_B 0xfc00
559 #define bTXIQImb_C 0x3f0000
560 #define bTXIQImb_D 0xffc00000
561 #define bTxIDCOffset 0xff
562 #define bTxQDCOffset 0xff00
563 #define bTxDFIRMode 0x10000
564 #define bTxPesudoNoiseOn 0x4000000
565 #define bTxPesudoNoise_A 0xff
566 #define bTxPesudoNoise_B 0xff00
567 #define bTxPesudoNoise_C 0xff0000
568 #define bTxPesudoNoise_D 0xff000000
569 #define bCCADropOption 0x20000
570 #define bCCADropThres 0xfff00000
571 #define bEDCCA_H 0xf
572 #define bEDCCA_L 0xf0
573 #define bLambda_ED 0x300
574 #define bRxInitialGain 0x7f
575 #define bRxAntDivEn 0x80
576 #define bRxAGCAddressForLNA 0x7f00
577 #define bRxHighPowerFlow 0x8000
578 #define bRxAGCFreezeThres 0xc0000
579 #define bRxFreezeStep_AGC1 0x300000
580 #define bRxFreezeStep_AGC2 0xc00000
581 #define bRxFreezeStep_AGC3 0x3000000
582 #define bRxFreezeStep_AGC0 0xc000000
583 #define bRxRssi_Cmp_En 0x10000000
584 #define bRxQuickAGCEn 0x20000000
585 #define bRxAGCFreezeThresMode 0x40000000
586 #define bRxOverFlowCheckType 0x80000000
587 #define bRxAGCShift 0x7f
588 #define bTRSW_Tri_Only 0x80
589 #define bPowerThres 0x300
590 #define bRxAGCEn 0x1
591 #define bRxAGCTogetherEn 0x2
592 #define bRxAGCMin 0x4
593 #define bRxHP_Ini 0x7
594 #define bRxHP_TRLNA 0x70
595 #define bRxHP_RSSI 0x700
596 #define bRxHP_BBP1 0x7000
597 #define bRxHP_BBP2 0x70000
598 #define bRxHP_BBP3 0x700000
599 #define bRSSI_H 0x7f0000
600 #define bRSSI_Gen 0x7f000000
601 #define bRxSettle_TRSW 0x7
602 #define bRxSettle_LNA 0x38
603 #define bRxSettle_RSSI 0x1c0
604 #define bRxSettle_BBP 0xe00
605 #define bRxSettle_RxHP 0x7000
606 #define bRxSettle_AntSW_RSSI 0x38000
607 #define bRxSettle_AntSW 0xc0000
608 #define bRxProcessTime_DAGC 0x300000
609 #define bRxSettle_HSSI 0x400000
610 #define bRxProcessTime_BBPPW 0x800000
611 #define bRxAntennaPowerShift 0x3000000
612 #define bRSSITableSelect 0xc000000
613 #define bRxHP_Final 0x7000000
614 #define bRxHTSettle_BBP 0x7
615 #define bRxHTSettle_HSSI 0x8
616 #define bRxHTSettle_RxHP 0x70
617 #define bRxHTSettle_BBPPW 0x80
618 #define bRxHTSettle_Idle 0x300
619 #define bRxHTSettle_Reserved 0x1c00
620 #define bRxHTRxHPEn 0x8000
621 #define bRxHTAGCFreezeThres 0x30000
622 #define bRxHTAGCTogetherEn 0x40000
623 #define bRxHTAGCMin 0x80000
624 #define bRxHTAGCEn 0x100000
625 #define bRxHTDAGCEn 0x200000
626 #define bRxHTRxHP_BBP 0x1c00000
627 #define bRxHTRxHP_Final 0xe0000000
628 #define bRxPWRatioTH 0x3
629 #define bRxPWRatioEn 0x4
630 #define bRxMFHold 0x3800
631 #define bRxPD_Delay_TH1 0x38
632 #define bRxPD_Delay_TH2 0x1c0
633 #define bRxPD_DC_COUNT_MAX 0x600
634 #define bRxPD_Delay_TH 0x8000
635 #define bRxProcess_Delay 0xf0000
636 #define bRxSearchrange_GI2_Early 0x700000
637 #define bRxFrame_Guard_Counter_L 0x3800000
638 #define bRxSGI_Guard_L 0xc000000
639 #define bRxSGI_Search_L 0x30000000
640 #define bRxSGI_TH 0xc0000000
641 #define bDFSCnt0 0xff
642 #define bDFSCnt1 0xff00
643 #define bDFSFlag 0xf0000
645 #define bMFWeightSum 0x300000
646 #define bMinIdxTH 0x7f000000
648 #define bDAFormat 0x40000
650 #define bTxChEmuEnable 0x01000000
652 #define bTRSWIsolation_A 0x7f
653 #define bTRSWIsolation_B 0x7f00
654 #define bTRSWIsolation_C 0x7f0000
655 #define bTRSWIsolation_D 0x7f000000
657 #define bExtLNAGain 0x7c00
659 #define bSTBCEn 0x4
660 #define bAntennaMapping 0x10
661 #define bNss 0x20
662 #define bCFOAntSumD 0x200
663 #define bPHYCounterReset 0x8000000
664 #define bCFOReportGet 0x4000000
665 #define bOFDMContinueTx 0x10000000
666 #define bOFDMSingleCarrier 0x20000000
667 #define bOFDMSingleTone 0x40000000
668 #define bHTDetect 0x100
669 #define bCFOEn 0x10000
670 #define bCFOValue 0xfff00000
671 #define bSigTone_Re 0x3f
672 #define bSigTone_Im 0x7f00
673 #define bCounter_CCA 0xffff
674 #define bCounter_ParityFail 0xffff0000
675 #define bCounter_RateIllegal 0xffff
676 #define bCounter_CRC8Fail 0xffff0000
677 #define bCounter_MCSNoSupport 0xffff
678 #define bCounter_FastSync 0xffff
679 #define bShortCFO 0xfff
680 #define bShortCFOTLength 12
681 #define bShortCFOFLength 11
682 #define bLongCFO 0x7ff
683 #define bLongCFOTLength 11
684 #define bLongCFOFLength 11
685 #define bTailCFO 0x1fff
686 #define bTailCFOTLength 13
687 #define bTailCFOFLength 12
689 #define bmax_en_pwdB 0xffff
690 #define bCC_power_dB 0xffff0000
691 #define bnoise_pwdB 0xffff
692 #define bPowerMeasTLength 10
693 #define bPowerMeasFLength 3
694 #define bRx_HT_BW 0x1
695 #define bRxSC 0x6
696 #define bRx_HT 0x8
698 #define bNB_intf_det_on 0x1
699 #define bIntf_win_len_cfg 0x30
700 #define bNB_Intf_TH_cfg 0x1c0
702 #define bRFGain 0x3f
703 #define bTableSel 0x40
704 #define bTRSW 0x80
706 #define bRxSNR_A 0xff
707 #define bRxSNR_B 0xff00
708 #define bRxSNR_C 0xff0000
709 #define bRxSNR_D 0xff000000
710 #define bSNREVMTLength 8
711 #define bSNREVMFLength 1
713 #define bCSI1st 0xff
714 #define bCSI2nd 0xff00
715 #define bRxEVM1st 0xff0000
716 #define bRxEVM2nd 0xff000000
718 #define bSIGEVM 0xff
719 #define bPWDB 0xff00
720 #define bSGIEN 0x10000
722 #define bSFactorQAM1 0xf
723 #define bSFactorQAM2 0xf0
724 #define bSFactorQAM3 0xf00
725 #define bSFactorQAM4 0xf000
726 #define bSFactorQAM5 0xf0000
727 #define bSFactorQAM6 0xf0000
728 #define bSFactorQAM7 0xf00000
729 #define bSFactorQAM8 0xf000000
730 #define bSFactorQAM9 0xf0000000
731 #define bCSIScheme 0x100000
733 #define bNoiseLvlTopSet 0x3
734 #define bChSmooth 0x4
735 #define bChSmoothCfg1 0x38
736 #define bChSmoothCfg2 0x1c0
737 #define bChSmoothCfg3 0xe00
738 #define bChSmoothCfg4 0x7000
739 #define bMRCMode 0x800000
740 #define bTHEVMCfg 0x7000000
742 #define bLoopFitType 0x1
743 #define bUpdCFO 0x40
744 #define bUpdCFOOffData 0x80
745 #define bAdvUpdCFO 0x100
746 #define bAdvTimeCtrl 0x800
747 #define bUpdClko 0x1000
748 #define bFC 0x6000
749 #define bTrackingMode 0x8000
750 #define bPhCmpEnable 0x10000
751 #define bUpdClkoLTF 0x20000
752 #define bComChCFO 0x40000
753 #define bCSIEstiMode 0x80000
754 #define bAdvUpdEqz 0x100000
755 #define bUChCfg 0x7000000
756 #define bUpdEqz 0x8000000
758 #define bTxAGCRate18_06 0x7f7f7f7f
759 #define bTxAGCRate54_24 0x7f7f7f7f
760 #define bTxAGCRateMCS32 0x7f
761 #define bTxAGCRateCCK 0x7f00
762 #define bTxAGCRateMCS3_MCS0 0x7f7f7f7f
763 #define bTxAGCRateMCS7_MCS4 0x7f7f7f7f
764 #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f
765 #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f
768 #define bRxPesudoNoiseOn 0x20000000
769 #define bRxPesudoNoise_A 0xff
770 #define bRxPesudoNoise_B 0xff00
771 #define bRxPesudoNoise_C 0xff0000
772 #define bRxPesudoNoise_D 0xff000000
773 #define bPesudoNoiseState_A 0xffff
774 #define bPesudoNoiseState_B 0xffff0000
775 #define bPesudoNoiseState_C 0xffff
776 #define bPesudoNoiseState_D 0xffff0000
778 #define bZebra1_HSSIEnable 0x8
779 #define bZebra1_TRxControl 0xc00
780 #define bZebra1_TRxGainSetting 0x07f
781 #define bZebra1_RxCorner 0xc00
782 #define bZebra1_TxChargePump 0x38
783 #define bZebra1_RxChargePump 0x7
784 #define bZebra1_ChannelNum 0xf80
785 #define bZebra1_TxLPFBW 0x400
786 #define bZebra1_RxLPFBW 0x600
788 #define bRTL8256RegModeCtrl1 0x100
789 #define bRTL8256RegModeCtrl0 0x40
790 #define bRTL8256_TxLPFBW 0x18
791 #define bRTL8256_RxLPFBW 0x600
793 #define bRTL8258_TxLPFBW 0xc
794 #define bRTL8258_RxLPFBW 0xc00
795 #define bRTL8258_RSSILPFBW 0xc0
797 #define bByte0 0x1
798 #define bByte1 0x2
799 #define bByte2 0x4
800 #define bByte3 0x8
801 #define bWord0 0x3
802 #define bWord1 0xc
803 #define bDWord 0xf
805 #define bMaskByte0 0xff
806 #define bMaskByte1 0xff00
807 #define bMaskByte2 0xff0000
808 #define bMaskByte3 0xff000000
809 #define bMaskHWord 0xffff0000
810 #define bMaskLWord 0x0000ffff
811 #define bMaskDWord 0xffffffff
813 #define bMask12Bits 0xfff
815 #define bEnable 0x1
816 #define bDisable 0x0
818 #define LeftAntenna 0x0
819 #define RightAntenna 0x1
821 #define tCheckTxStatus 500
822 #define tUpdateRxCounter 100
824 #define rateCCK 0
825 #define rateOFDM 1
826 #define rateHT 2
828 #define bPMAC_End 0x1ff
829 #define bFPGAPHY0_End 0x8ff
830 #define bFPGAPHY1_End 0x9ff
831 #define bCCKPHY0_End 0xaff
832 #define bOFDMPHY0_End 0xcff
833 #define bOFDMPHY1_End 0xdff
836 #define bPMACControl 0x0
837 #define bWMACControl 0x1
838 #define bWNICControl 0x2
840 #define PathA 0x0
841 #define PathB 0x1
842 #define PathC 0x2
843 #define PathD 0x3
845 #define rRTL8256RxMixerPole 0xb
846 #define bZebraRxMixerPole 0x6
847 #define rRTL8256TxBBOPBias 0x9
848 #define bRTL8256TxBBOPBias 0x400
849 #define rRTL8256TxBBBW 19
850 #define bRTL8256TxBBBW 0x18
852 #endif