1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 ******************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/debugfs.h>
33 struct _tx_desc_8192se
;
34 struct _TX_DESC_8192CE
;
39 #define RT_ASSERT(_Exp, Fmt) \
41 printk("Rtl819x: "); \
69 #define QoS_VISTA BIT1
72 #define TX_DESC_TID BIT1
75 #define RX_PHY_STS BIT1
76 #define RX_PHY_SS BIT2
77 #define RX_PHY_SQ BIT3
78 #define RX_PHY_ASTS BIT4
79 #define RX_ERR_LEN BIT5
80 #define RX_DEFRAG BIT6
81 #define RX_ERR_RATE BIT7
85 #define MEDIA_STS BIT0
100 #define PHY_MACW BIT5
101 #define PHY_ALLR BIT6
102 #define PHY_ALLW BIT7
103 #define PHY_TXPWR BIT8
104 #define PHY_PWRDIFF BIT9
107 #define MP_SWICH_CH BIT1
109 #define EEPROM_W BIT0
110 #define EFUSE_PG BIT1
111 #define EFUSE_READ_ALL BIT2
121 #define DM_Monitor BIT2
123 #define DM_EDCA_Turbo BIT4
125 #define DbgCtrl_Trace BIT0
126 #define DbgCtrl_InbandNoise BIT1
128 #define BT_TRACE BIT0
129 #define BT_RFPoll BIT1
131 #define C2H_Summary BIT0
132 #define C2H_PacketData BIT1
133 #define C2H_ContentData BIT2
134 #define BT_TRACE BIT0
135 #define BT_RFPoll BIT1
137 #define INIT_EEPROM BIT0
138 #define INIT_TxPower BIT1
139 #define INIT_IQK BIT2
142 #define IOCTL_TRACE BIT0
143 #define IOCTL_BT_EVENT BIT1
144 #define IOCTL_BT_EVENT_DETAIL BIT2
145 #define IOCTL_BT_TX_ACLDATA BIT3
146 #define IOCTL_BT_TX_ACLDATA_DETAIL BIT4
147 #define IOCTL_BT_RX_ACLDATA BIT5
148 #define IOCTL_BT_RX_ACLDATA_DETAIL BIT6
149 #define IOCTL_BT_HCICMD BIT7
150 #define IOCTL_BT_HCICMD_DETAIL BIT8
151 #define IOCTL_IRP BIT9
152 #define IOCTL_IRP_DETAIL BIT10
153 #define IOCTL_CALLBACK_FUN BIT11
154 #define IOCTL_STATE BIT12
155 #define IOCTL_BT_TP BIT13
156 #define IOCTL_BT_LOGO BIT14
158 /* 2007/07/13 MH ------For DeBuG Print modeue------*/
159 /*------------------------------Define structure----------------------------*/
162 /*------------------------Export Marco Definition---------------------------*/
163 #define DEBUG_PRINT 1
165 #if (DEBUG_PRINT == 1)
166 #define RTPRINT(dbgtype, dbgflag, printstr) \
168 if (DBGP_Type[dbgtype] & dbgflag) { \
173 #define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr) \
175 if (DBGP_Type[dbgtype] & dbgflag) { \
177 u8 *ptr = (u8 *)_Ptr; \
180 for (__i = 0; __i < 6; __i++) \
181 printk("%02X%s", ptr[__i], \
182 (__i == 5) ? "" : "-"); \
187 #define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)\
189 if (DBGP_Type[dbgtype] & dbgflag) { \
191 u8 *ptr = (u8 *)_HexData; \
192 printk(_TitleString); \
193 for (__i = 0; __i < (int)_HexDataLen; __i++) { \
194 printk("%02X%s", ptr[__i], (((__i + 1) \
195 % 4) == 0) ? " " : " "); \
196 if (((__i + 1) % 16) == 0) \
203 #define RTPRINT(dbgtype, dbgflag, printstr)
204 #define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)
205 #define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)
208 extern u32 DBGP_Type
[DBGP_TYPE_MAX
];
210 #define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
212 if (((_Comp) & rt_global_debug_component) && \
213 (_Level <= rt_global_debug_component)) { \
215 u8* ptr = (u8 *)_HexData; \
216 printk(KERN_INFO "Rtl819x: "); \
217 printk(_TitleString); \
218 for (__i = 0; __i < (int)_HexDataLen; __i++) { \
219 printk("%02X%s", ptr[__i], (((__i + 1) % \
220 4) == 0) ? " " : " "); \
221 if (((__i + 1) % 16) == 0) \
228 #define DMESG(x, a...)
229 #define DMESGW(x, a...)
230 #define DMESGE(x, a...)
231 extern u32 rt_global_debug_component
;
232 #define RT_TRACE(component, x, args...) \
234 if (rt_global_debug_component & component) \
235 printk(KERN_DEBUG DRV_NAME ":" x "\n" , \
239 #define assert(expr) \
241 printk(KERN_INFO "Assertion failed! %s,%s,%s,line=%d\n", \
242 #expr, __FILE__, __func__, __LINE__); \
244 #define RT_DEBUG_DATA(level, data, datalen) \
246 if ((rt_global_debug_component & (level)) == (level)) {\
248 u8 *_pdata = (u8 *)data; \
249 printk(KERN_DEBUG DRV_NAME ": %s()\n", __func__); \
250 for (_i = 0; _i < (int)(datalen); _i++) { \
251 printk(KERN_INFO "%2x ", _pdata[_i]); \
252 if ((_i+1) % 16 == 0) \
255 printk(KERN_INFO "\n"); \
259 struct rtl_fs_debug
{
261 struct dentry
*dir_drv
;
262 struct dentry
*debug_register
;
268 void print_buffer(u32
*buffer
, int len
);
269 void dump_eprom(struct net_device
*dev
);
270 void rtl8192_dump_reg(struct net_device
*dev
);
273 static inline int rtl_debug_module_init(struct r8192_priv
*priv
,
279 static inline void rtl_debug_module_remove(struct r8192_priv
*priv
)
283 static inline int rtl_create_debugfs_root(void)
288 static inline void rtl_remove_debugfs_root(void)
293 void rtl8192_proc_init_one(struct net_device
*dev
);
294 void rtl8192_proc_remove_one(struct net_device
*dev
);
295 void rtl8192_proc_module_init(void);
296 void rtl8192_proc_module_remove(void);
297 void rtl8192_dbgp_flag_init(struct net_device
*dev
);