OMAP3: SRAM size fix for HS/EMU devices
[linux-ginger.git] / drivers / ide / it8213.c
blob47976167796a4a03fd35a44dbf1c2b372a920739
1 /*
2 * ITE 8213 IDE driver
4 * Copyright (C) 2006 Jack Lee
5 * Copyright (C) 2006 Alan Cox
6 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
7 */
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/ide.h>
14 #include <linux/init.h>
16 #define DRV_NAME "it8213"
18 /**
19 * it8213_set_pio_mode - set host controller for PIO mode
20 * @drive: drive
21 * @pio: PIO mode number
23 * Set the interface PIO mode.
26 static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
28 ide_hwif_t *hwif = drive->hwif;
29 struct pci_dev *dev = to_pci_dev(hwif->dev);
30 int is_slave = drive->dn & 1;
31 int master_port = 0x40;
32 int slave_port = 0x44;
33 unsigned long flags;
34 u16 master_data;
35 u8 slave_data;
36 static DEFINE_SPINLOCK(tune_lock);
37 int control = 0;
39 static const u8 timings[][2] = {
40 { 0, 0 },
41 { 0, 0 },
42 { 1, 0 },
43 { 2, 1 },
44 { 2, 3 }, };
46 spin_lock_irqsave(&tune_lock, flags);
47 pci_read_config_word(dev, master_port, &master_data);
49 if (pio > 1)
50 control |= 1; /* Programmable timing on */
51 if (drive->media != ide_disk)
52 control |= 4; /* ATAPI */
53 if (ide_pio_need_iordy(drive, pio))
54 control |= 2; /* IORDY */
55 if (is_slave) {
56 master_data |= 0x4000;
57 master_data &= ~0x0070;
58 if (pio > 1)
59 master_data = master_data | (control << 4);
60 pci_read_config_byte(dev, slave_port, &slave_data);
61 slave_data = slave_data & 0xf0;
62 slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
63 } else {
64 master_data &= ~0x3307;
65 if (pio > 1)
66 master_data = master_data | control;
67 master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
69 pci_write_config_word(dev, master_port, master_data);
70 if (is_slave)
71 pci_write_config_byte(dev, slave_port, slave_data);
72 spin_unlock_irqrestore(&tune_lock, flags);
75 /**
76 * it8213_set_dma_mode - set host controller for DMA mode
77 * @drive: drive
78 * @speed: DMA mode
80 * Tune the ITE chipset for the DMA mode.
83 static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
85 ide_hwif_t *hwif = drive->hwif;
86 struct pci_dev *dev = to_pci_dev(hwif->dev);
87 u8 maslave = 0x40;
88 int a_speed = 3 << (drive->dn * 4);
89 int u_flag = 1 << drive->dn;
90 int v_flag = 0x01 << drive->dn;
91 int w_flag = 0x10 << drive->dn;
92 int u_speed = 0;
93 u16 reg4042, reg4a;
94 u8 reg48, reg54, reg55;
96 pci_read_config_word(dev, maslave, &reg4042);
97 pci_read_config_byte(dev, 0x48, &reg48);
98 pci_read_config_word(dev, 0x4a, &reg4a);
99 pci_read_config_byte(dev, 0x54, &reg54);
100 pci_read_config_byte(dev, 0x55, &reg55);
102 if (speed >= XFER_UDMA_0) {
103 u8 udma = speed - XFER_UDMA_0;
105 u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4);
107 if (!(reg48 & u_flag))
108 pci_write_config_byte(dev, 0x48, reg48 | u_flag);
109 if (speed >= XFER_UDMA_5)
110 pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
111 else
112 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
114 if ((reg4a & a_speed) != u_speed)
115 pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
116 if (speed > XFER_UDMA_2) {
117 if (!(reg54 & v_flag))
118 pci_write_config_byte(dev, 0x54, reg54 | v_flag);
119 } else
120 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
121 } else {
122 const u8 mwdma_to_pio[] = { 0, 3, 4 };
123 u8 pio;
125 if (reg48 & u_flag)
126 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
127 if (reg4a & a_speed)
128 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
129 if (reg54 & v_flag)
130 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
131 if (reg55 & w_flag)
132 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
134 if (speed >= XFER_MW_DMA_0)
135 pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
136 else
137 pio = 2; /* only SWDMA2 is allowed */
139 it8213_set_pio_mode(drive, pio);
143 static u8 it8213_cable_detect(ide_hwif_t *hwif)
145 struct pci_dev *dev = to_pci_dev(hwif->dev);
146 u8 reg42h = 0;
148 pci_read_config_byte(dev, 0x42, &reg42h);
150 return (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
153 static const struct ide_port_ops it8213_port_ops = {
154 .set_pio_mode = it8213_set_pio_mode,
155 .set_dma_mode = it8213_set_dma_mode,
156 .cable_detect = it8213_cable_detect,
159 static const struct ide_port_info it8213_chipset __devinitdata = {
160 .name = DRV_NAME,
161 .enablebits = { {0x41, 0x80, 0x80} },
162 .port_ops = &it8213_port_ops,
163 .host_flags = IDE_HFLAG_SINGLE,
164 .pio_mask = ATA_PIO4,
165 .swdma_mask = ATA_SWDMA2_ONLY,
166 .mwdma_mask = ATA_MWDMA12_ONLY,
167 .udma_mask = ATA_UDMA6,
171 * it8213_init_one - pci layer discovery entry
172 * @dev: PCI device
173 * @id: ident table entry
175 * Called by the PCI code when it finds an ITE8213 controller. As
176 * this device follows the standard interfaces we can use the
177 * standard helper functions to do almost all the work for us.
180 static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
182 return ide_pci_init_one(dev, &it8213_chipset, NULL);
185 static const struct pci_device_id it8213_pci_tbl[] = {
186 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), 0 },
187 { 0, },
190 MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
192 static struct pci_driver it8213_pci_driver = {
193 .name = "ITE8213_IDE",
194 .id_table = it8213_pci_tbl,
195 .probe = it8213_init_one,
196 .remove = ide_pci_remove,
197 .suspend = ide_pci_suspend,
198 .resume = ide_pci_resume,
201 static int __init it8213_ide_init(void)
203 return ide_pci_register_driver(&it8213_pci_driver);
206 static void __exit it8213_ide_exit(void)
208 pci_unregister_driver(&it8213_pci_driver);
211 module_init(it8213_ide_init);
212 module_exit(it8213_ide_exit);
214 MODULE_AUTHOR("Jack Lee, Alan Cox");
215 MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
216 MODULE_LICENSE("GPL");