Save sram context after changing MPU, DSP or core clocks
[linux-ginger.git] / drivers / net / wireless / rt2x00 / rt2x00reg.h
blob983e52e127a7d0dc64d51db8f903358cc7b6e53f
1 /*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 Module: rt2x00
23 Abstract: rt2x00 generic register information.
26 #ifndef RT2X00REG_H
27 #define RT2X00REG_H
30 * RX crypto status
32 enum rx_crypto {
33 RX_CRYPTO_SUCCESS = 0,
34 RX_CRYPTO_FAIL_ICV = 1,
35 RX_CRYPTO_FAIL_MIC = 2,
36 RX_CRYPTO_FAIL_KEY = 3,
40 * Antenna values
42 enum antenna {
43 ANTENNA_SW_DIVERSITY = 0,
44 ANTENNA_A = 1,
45 ANTENNA_B = 2,
46 ANTENNA_HW_DIVERSITY = 3,
50 * Led mode values.
52 enum led_mode {
53 LED_MODE_DEFAULT = 0,
54 LED_MODE_TXRX_ACTIVITY = 1,
55 LED_MODE_SIGNAL_STRENGTH = 2,
56 LED_MODE_ASUS = 3,
57 LED_MODE_ALPHA = 4,
61 * TSF sync values
63 enum tsf_sync {
64 TSF_SYNC_NONE = 0,
65 TSF_SYNC_INFRA = 1,
66 TSF_SYNC_BEACON = 2,
70 * Device states
72 enum dev_state {
73 STATE_DEEP_SLEEP = 0,
74 STATE_SLEEP = 1,
75 STATE_STANDBY = 2,
76 STATE_AWAKE = 3,
79 * Additional device states, these values are
80 * not strict since they are not directly passed
81 * into the device.
83 STATE_RADIO_ON,
84 STATE_RADIO_OFF,
85 STATE_RADIO_RX_ON,
86 STATE_RADIO_RX_OFF,
87 STATE_RADIO_RX_ON_LINK,
88 STATE_RADIO_RX_OFF_LINK,
89 STATE_RADIO_IRQ_ON,
90 STATE_RADIO_IRQ_OFF,
94 * IFS backoff values
96 enum ifs {
97 IFS_BACKOFF = 0,
98 IFS_SIFS = 1,
99 IFS_NEW_BACKOFF = 2,
100 IFS_NONE = 3,
104 * Cipher types for hardware encryption
106 enum cipher {
107 CIPHER_NONE = 0,
108 CIPHER_WEP64 = 1,
109 CIPHER_WEP128 = 2,
110 CIPHER_TKIP = 3,
111 CIPHER_AES = 4,
113 * The following fields were added by rt61pci and rt73usb.
115 CIPHER_CKIP64 = 5,
116 CIPHER_CKIP128 = 6,
117 CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
120 * Max cipher type.
121 * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
122 * are excluded due to limitations in mac80211.
124 CIPHER_MAX = 4,
128 * Rate modulations
130 enum rate_modulation {
131 RATE_MODE_CCK = 0,
132 RATE_MODE_OFDM = 1,
133 RATE_MODE_HT_MIX = 2,
134 RATE_MODE_HT_GREENFIELD = 3,
138 * Firmware validation error codes
140 enum firmware_errors {
141 FW_OK,
142 FW_BAD_CRC,
143 FW_BAD_LENGTH,
144 FW_BAD_VERSION,
148 * Register handlers.
149 * We store the position of a register field inside a field structure,
150 * This will simplify the process of setting and reading a certain field
151 * inside the register while making sure the process remains byte order safe.
153 struct rt2x00_field8 {
154 u8 bit_offset;
155 u8 bit_mask;
158 struct rt2x00_field16 {
159 u16 bit_offset;
160 u16 bit_mask;
163 struct rt2x00_field32 {
164 u32 bit_offset;
165 u32 bit_mask;
169 * Power of two check, this will check
170 * if the mask that has been given contains and contiguous set of bits.
171 * Note that we cannot use the is_power_of_2() function since this
172 * check must be done at compile-time.
174 #define is_power_of_two(x) ( !((x) & ((x)-1)) )
175 #define low_bit_mask(x) ( ((x)-1) & ~(x) )
176 #define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x))
179 * Macros to find first set bit in a variable.
180 * These macros behave the same as the __ffs() functions but
181 * the most important difference that this is done during
182 * compile-time rather then run-time.
184 #define compile_ffs2(__x) \
185 __builtin_choose_expr(((__x) & 0x1), 0, 1)
187 #define compile_ffs4(__x) \
188 __builtin_choose_expr(((__x) & 0x3), \
189 (compile_ffs2((__x))), \
190 (compile_ffs2((__x) >> 2) + 2))
192 #define compile_ffs8(__x) \
193 __builtin_choose_expr(((__x) & 0xf), \
194 (compile_ffs4((__x))), \
195 (compile_ffs4((__x) >> 4) + 4))
197 #define compile_ffs16(__x) \
198 __builtin_choose_expr(((__x) & 0xff), \
199 (compile_ffs8((__x))), \
200 (compile_ffs8((__x) >> 8) + 8))
202 #define compile_ffs32(__x) \
203 __builtin_choose_expr(((__x) & 0xffff), \
204 (compile_ffs16((__x))), \
205 (compile_ffs16((__x) >> 16) + 16))
208 * This macro will check the requirements for the FIELD{8,16,32} macros
209 * The mask should be a constant non-zero contiguous set of bits which
210 * does not exceed the given typelimit.
212 #define FIELD_CHECK(__mask, __type) \
213 BUILD_BUG_ON(!(__mask) || \
214 !is_valid_mask(__mask) || \
215 (__mask) != (__type)(__mask)) \
217 #define FIELD8(__mask) \
218 ({ \
219 FIELD_CHECK(__mask, u8); \
220 (struct rt2x00_field8) { \
221 compile_ffs8(__mask), (__mask) \
222 }; \
225 #define FIELD16(__mask) \
226 ({ \
227 FIELD_CHECK(__mask, u16); \
228 (struct rt2x00_field16) { \
229 compile_ffs16(__mask), (__mask) \
230 }; \
233 #define FIELD32(__mask) \
234 ({ \
235 FIELD_CHECK(__mask, u32); \
236 (struct rt2x00_field32) { \
237 compile_ffs32(__mask), (__mask) \
238 }; \
241 #define SET_FIELD(__reg, __type, __field, __value)\
242 ({ \
243 typecheck(__type, __field); \
244 *(__reg) &= ~((__field).bit_mask); \
245 *(__reg) |= ((__value) << \
246 ((__field).bit_offset)) & \
247 ((__field).bit_mask); \
250 #define GET_FIELD(__reg, __type, __field) \
251 ({ \
252 typecheck(__type, __field); \
253 ((__reg) & ((__field).bit_mask)) >> \
254 ((__field).bit_offset); \
257 #define rt2x00_set_field32(__reg, __field, __value) \
258 SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
259 #define rt2x00_get_field32(__reg, __field) \
260 GET_FIELD(__reg, struct rt2x00_field32, __field)
262 #define rt2x00_set_field16(__reg, __field, __value) \
263 SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
264 #define rt2x00_get_field16(__reg, __field) \
265 GET_FIELD(__reg, struct rt2x00_field16, __field)
267 #define rt2x00_set_field8(__reg, __field, __value) \
268 SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
269 #define rt2x00_get_field8(__reg, __field) \
270 GET_FIELD(__reg, struct rt2x00_field8, __field)
272 #endif /* RT2X00REG_H */