arch/avr32/boards/favr-32/setup.c

   1 /*
   2  * Favr-32 board-specific setup code.
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/etherdevice.h>
  12 #include <linux/bootmem.h>
  13 #include <linux/fb.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/types.h>
  17 #include <linux/linkage.h>
  18 #include <linux/gpio.h>
  19 #include <linux/leds.h>
  20 #include <linux/atmel-mci.h>
  21 #include <linux/atmel-pwm-bl.h>
  22 #include <linux/spi/spi.h>
  23 #include <linux/spi/ads7846.h>
  24
  25 #include <video/atmel_lcdc.h>
  26
  27 #include <asm/setup.h>
  28
  29 #include <mach/at32ap700x.h>
  30 #include <mach/init.h>
  31 #include <mach/board.h>
  32 #include <mach/portmux.h>
  33
  34 /* Oscillator frequencies. These are board-specific */
  35 unsigned long at32_board_osc_rates[3] = {
  36         [0] = 32768,    /* 32.768 kHz on RTC osc */
  37         [1] = 20000000, /* 20 MHz on osc0 */
  38         [2] = 12000000, /* 12 MHz on osc1 */
  39 };
  40
  41 /* Initialized by bootloader-specific startup code. */
  42 struct tag *bootloader_tags __initdata;
  43
  44 struct eth_addr {
  45         u8 addr[6];
  46 };
  47 static struct eth_addr __initdata hw_addr[1];
  48 static struct eth_platform_data __initdata eth_data[1] = {
  49         {
  50                 .phy_mask       = ~(1U << 1),
  51         },
  52 };
  53
  54 static int ads7843_get_pendown_state(void)
  55 {
  56         return !gpio_get_value(GPIO_PIN_PB(3));
  57 }
  58
  59 static struct ads7846_platform_data ads7843_data = {
  60         .model                  = 7843,
  61         .get_pendown_state      = ads7843_get_pendown_state,
  62         .pressure_max           = 255,
  63         /*
  64          * Values below are for debounce filtering, these can be experimented
  65          * with further.
  66          */
  67         .debounce_max           = 20,
  68         .debounce_rep           = 4,
  69         .debounce_tol           = 5,
  70 };
  71
  72 static struct spi_board_info __initdata spi1_board_info[] = {
  73         {
  74                 /* ADS7843 touch controller */
  75                 .modalias       = "ads7846",
  76                 .max_speed_hz   = 2000000,
  77                 .chip_select    = 0,
  78                 .bus_num        = 1,
  79                 .platform_data  = &ads7843_data,
  80         },
  81 };
  82
  83 static struct mci_platform_data __initdata mci0_data = {
  84         .slot[0] = {
  85                 .bus_width      = 4,
  86                 .detect_pin     = -ENODEV,
  87                 .wp_pin         = -ENODEV,
  88         },
  89 };
  90
  91 static struct fb_videomode __initdata lb104v03_modes[] = {
  92         {
  93                 .name           = "640x480 @ 50",
  94                 .refresh        = 50,
  95                 .xres           = 640,          .yres           = 480,
  96                 .pixclock       = KHZ2PICOS(25100),
  97
  98                 .left_margin    = 90,           .right_margin   = 70,
  99                 .upper_margin   = 30,           .lower_margin   = 15,
 100                 .hsync_len      = 12,           .vsync_len      = 2,
 101
 102                 .sync           = 0,
 103                 .vmode          = FB_VMODE_NONINTERLACED,
 104         },
 105 };
 106
 107 static struct fb_monspecs __initdata favr32_default_monspecs = {
 108         .manufacturer           = "LG",
 109         .monitor                = "LB104V03",
 110         .modedb                 = lb104v03_modes,
 111         .modedb_len             = ARRAY_SIZE(lb104v03_modes),
 112         .hfmin                  = 27273,
 113         .hfmax                  = 31111,
 114         .vfmin                  = 45,
 115         .vfmax                  = 60,
 116         .dclkmax                = 28000000,
 117 };
 118
 119 struct atmel_lcdfb_info __initdata favr32_lcdc_data = {
 120         .default_bpp            = 16,
 121         .default_dmacon         = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
 122         .default_lcdcon2        = (ATMEL_LCDC_DISTYPE_TFT
 123                                    | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
 124                                    | ATMEL_LCDC_MEMOR_BIG),
 125         .default_monspecs       = &favr32_default_monspecs,
 126         .guard_time             = 2,
 127 };
 128
 129 static struct gpio_led favr32_leds[] = {
 130         {
 131                 .name            = "green",
 132                 .gpio            = GPIO_PIN_PE(19),
 133                 .default_trigger = "heartbeat",
 134                 .active_low      = 1,
 135         },
 136         {
 137                 .name            = "red",
 138                 .gpio            = GPIO_PIN_PE(20),
 139                 .active_low      = 1,
 140         },
 141 };
 142
 143 static struct gpio_led_platform_data favr32_led_data = {
 144         .num_leds       = ARRAY_SIZE(favr32_leds),
 145         .leds           = favr32_leds,
 146 };
 147
 148 static struct platform_device favr32_led_dev = {
 149         .name           = "leds-gpio",
 150         .id             = 0,
 151         .dev            = {
 152                 .platform_data  = &favr32_led_data,
 153         },
 154 };
 155
 156 /*
 157  * The next two functions should go away as the boot loader is
 158  * supposed to initialize the macb address registers with a valid
 159  * ethernet address. But we need to keep it around for a while until
 160  * we can be reasonably sure the boot loader does this.
 161  *
 162  * The phy_id is ignored as the driver will probe for it.
 163  */
 164 static int __init parse_tag_ethernet(struct tag *tag)
 165 {
 166         int i;
 167
 168         i = tag->u.ethernet.mac_index;
 169         if (i < ARRAY_SIZE(hw_addr))
 170                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
 171                        sizeof(hw_addr[i].addr));
 172
 173         return 0;
 174 }
 175 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
 176
 177 static void __init set_hw_addr(struct platform_device *pdev)
 178 {
 179         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 180         const u8 *addr;
 181         void __iomem *regs;
 182         struct clk *pclk;
 183
 184         if (!res)
 185                 return;
 186         if (pdev->id >= ARRAY_SIZE(hw_addr))
 187                 return;
 188
 189         addr = hw_addr[pdev->id].addr;
 190         if (!is_valid_ether_addr(addr))
 191                 return;
 192
 193         /*
 194          * Since this is board-specific code, we'll cheat and use the
 195          * physical address directly as we happen to know that it's
 196          * the same as the virtual address.
 197          */
 198         regs = (void __iomem __force *)res->start;
 199         pclk = clk_get(&pdev->dev, "pclk");
 200         if (!pclk)
 201                 return;
 202
 203         clk_enable(pclk);
 204         __raw_writel((addr[3] << 24) | (addr[2] << 16)
 205                      | (addr[1] << 8) | addr[0], regs + 0x98);
 206         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
 207         clk_disable(pclk);
 208         clk_put(pclk);
 209 }
 210
 211 void __init favr32_setup_leds(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < ARRAY_SIZE(favr32_leds); i++)
 216                 at32_select_gpio(favr32_leds[i].gpio, AT32_GPIOF_OUTPUT);
 217
 218         platform_device_register(&favr32_led_dev);
 219 }
 220
 221 static struct atmel_pwm_bl_platform_data atmel_pwm_bl_pdata = {
 222         .pwm_channel            = 2,
 223         .pwm_frequency          = 200000,
 224         .pwm_compare_max        = 345,
 225         .pwm_duty_max           = 345,
 226         .pwm_duty_min           = 90,
 227         .pwm_active_low         = 1,
 228         .gpio_on                = GPIO_PIN_PA(28),
 229         .on_active_low          = 0,
 230 };
 231
 232 static struct platform_device atmel_pwm_bl_dev = {
 233         .name           = "atmel-pwm-bl",
 234         .id             = 0,
 235         .dev            = {
 236                 .platform_data = &atmel_pwm_bl_pdata,
 237         },
 238 };
 239
 240 static void __init favr32_setup_atmel_pwm_bl(void)
 241 {
 242         platform_device_register(&atmel_pwm_bl_dev);
 243         at32_select_gpio(atmel_pwm_bl_pdata.gpio_on, 0);
 244 }
 245
 246 void __init setup_board(void)
 247 {
 248         at32_map_usart(3, 0);   /* USART 3 => /dev/ttyS0 */
 249         at32_setup_serial_console(0);
 250 }
 251
 252 static int __init set_abdac_rate(struct platform_device *pdev)
 253 {
 254         int retval;
 255         struct clk *osc1;
 256         struct clk *pll1;
 257         struct clk *abdac;
 258
 259         if (pdev == NULL)
 260                 return -ENXIO;
 261
 262         osc1 = clk_get(NULL, "osc1");
 263         if (IS_ERR(osc1)) {
 264                 retval = PTR_ERR(osc1);
 265                 goto out;
 266         }
 267
 268         pll1 = clk_get(NULL, "pll1");
 269         if (IS_ERR(pll1)) {
 270                 retval = PTR_ERR(pll1);
 271                 goto out_osc1;
 272         }
 273
 274         abdac = clk_get(&pdev->dev, "sample_clk");
 275         if (IS_ERR(abdac)) {
 276                 retval = PTR_ERR(abdac);
 277                 goto out_pll1;
 278         }
 279
 280         retval = clk_set_parent(pll1, osc1);
 281         if (retval != 0)
 282                 goto out_abdac;
 283
 284         /*
 285          * Rate is 32000 to 50000 and ABDAC oversamples 256x. Multiply, in
 286          * power of 2, to a value above 80 MHz. Power of 2 so it is possible
 287          * for the generic clock to divide it down again and 80 MHz is the
 288          * lowest frequency for the PLL.
 289          */
 290         retval = clk_round_rate(pll1,
 291                         CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16);
 292         if (retval < 0)
 293                 goto out_abdac;
 294
 295         retval = clk_set_rate(pll1, retval);
 296         if (retval != 0)
 297                 goto out_abdac;
 298
 299         retval = clk_set_parent(abdac, pll1);
 300         if (retval != 0)
 301                 goto out_abdac;
 302
 303 out_abdac:
 304         clk_put(abdac);
 305 out_pll1:
 306         clk_put(pll1);
 307 out_osc1:
 308         clk_put(osc1);
 309 out:
 310         return retval;
 311 }
 312
 313 static int __init favr32_init(void)
 314 {
 315         /*
 316          * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
 317          * pins so that nobody messes with them.
 318          */
 319         at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
 320
 321         at32_select_gpio(GPIO_PIN_PB(3), 0);    /* IRQ from ADS7843 */
 322
 323         at32_add_device_usart(0);
 324
 325         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
 326
 327         spi1_board_info[0].irq = gpio_to_irq(GPIO_PIN_PB(3));
 328
 329         set_abdac_rate(at32_add_device_abdac(0));
 330
 331         at32_add_device_pwm(1 << atmel_pwm_bl_pdata.pwm_channel);
 332         at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
 333         at32_add_device_mci(0, &mci0_data);
 334         at32_add_device_usba(0, NULL);
 335         at32_add_device_lcdc(0, &favr32_lcdc_data, fbmem_start, fbmem_size, 0);
 336
 337         favr32_setup_leds();
 338
 339         favr32_setup_atmel_pwm_bl();
 340
 341         return 0;
 342 }
 343 postcore_initcall(favr32_init);