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MTD: nandsim: use less RAM
[linux-ginger.git] / drivers / mtd / nand / nandsim.c
blob43ce26d0f9288e3b2df74d46c1daec8bfcda19e4
1 /*
2 * NAND flash simulator.
3 *
4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 *
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
14 * version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
24 */
25
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <asm/div64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/partitions.h>
38 #include <linux/delay.h>
39 #include <linux/list.h>
40 #include <linux/random.h>
41 #include <linux/fs.h>
42 #include <linux/pagemap.h>
43
44 /* Default simulator parameters values */
45 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
46 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
47 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
48 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
49 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
50 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
51 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
52 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
53 #endif
54
55 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
56 #define CONFIG_NANDSIM_ACCESS_DELAY 25
57 #endif
58 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
59 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
60 #endif
61 #ifndef CONFIG_NANDSIM_ERASE_DELAY
62 #define CONFIG_NANDSIM_ERASE_DELAY 2
63 #endif
64 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
65 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
66 #endif
67 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
68 #define CONFIG_NANDSIM_INPUT_CYCLE 50
69 #endif
70 #ifndef CONFIG_NANDSIM_BUS_WIDTH
71 #define CONFIG_NANDSIM_BUS_WIDTH 8
72 #endif
73 #ifndef CONFIG_NANDSIM_DO_DELAYS
74 #define CONFIG_NANDSIM_DO_DELAYS 0
75 #endif
76 #ifndef CONFIG_NANDSIM_LOG
77 #define CONFIG_NANDSIM_LOG 0
78 #endif
79 #ifndef CONFIG_NANDSIM_DBG
80 #define CONFIG_NANDSIM_DBG 0
81 #endif
82
83 static uint first_id_byte = CONFIG_NANDSIM_FIRST_ID_BYTE;
84 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
85 static uint third_id_byte = CONFIG_NANDSIM_THIRD_ID_BYTE;
86 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
87 static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
88 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
89 static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
90 static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
91 static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
92 static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
93 static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
94 static uint log = CONFIG_NANDSIM_LOG;
95 static uint dbg = CONFIG_NANDSIM_DBG;
96 static unsigned long parts[MAX_MTD_DEVICES];
97 static unsigned int parts_num;
98 static char *badblocks = NULL;
99 static char *weakblocks = NULL;
100 static char *weakpages = NULL;
101 static unsigned int bitflips = 0;
102 static char *gravepages = NULL;
103 static unsigned int rptwear = 0;
104 static unsigned int overridesize = 0;
105 static char *cache_file = NULL;
106
107 module_param(first_id_byte, uint, 0400);
108 module_param(second_id_byte, uint, 0400);
109 module_param(third_id_byte, uint, 0400);
110 module_param(fourth_id_byte, uint, 0400);
111 module_param(access_delay, uint, 0400);
112 module_param(programm_delay, uint, 0400);
113 module_param(erase_delay, uint, 0400);
114 module_param(output_cycle, uint, 0400);
115 module_param(input_cycle, uint, 0400);
116 module_param(bus_width, uint, 0400);
117 module_param(do_delays, uint, 0400);
118 module_param(log, uint, 0400);
119 module_param(dbg, uint, 0400);
120 module_param_array(parts, ulong, &parts_num, 0400);
121 module_param(badblocks, charp, 0400);
122 module_param(weakblocks, charp, 0400);
123 module_param(weakpages, charp, 0400);
124 module_param(bitflips, uint, 0400);
125 module_param(gravepages, charp, 0400);
126 module_param(rptwear, uint, 0400);
127 module_param(overridesize, uint, 0400);
128 module_param(cache_file, charp, 0400);
129
130 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
131 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
132 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command");
133 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
134 MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
135 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
136 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
137 MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanodeconds)");
138 MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanodeconds)");
139 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
140 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
141 MODULE_PARM_DESC(log, "Perform logging if not zero");
142 MODULE_PARM_DESC(dbg, "Output debug information if not zero");
143 MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
144 /* Page and erase block positions for the following parameters are independent of any partitions */
145 MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
146 MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
147 " separated by commas e.g. 113:2 means eb 113"
148 " can be erased only twice before failing");
149 MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
150 " separated by commas e.g. 1401:2 means page 1401"
151 " can be written only twice before failing");
152 MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
153 MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
154 " separated by commas e.g. 1401:2 means page 1401"
155 " can be read only twice before failing");
156 MODULE_PARM_DESC(rptwear, "Number of erases inbetween reporting wear, if not zero");
157 MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
158 "The size is specified in erase blocks and as the exponent of a power of two"
159 " e.g. 5 means a size of 32 erase blocks");
160 MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
161
162 /* The largest possible page size */
163 #define NS_LARGEST_PAGE_SIZE 2048
164
165 /* The prefix for simulator output */
166 #define NS_OUTPUT_PREFIX "[nandsim]"
167
168 /* Simulator's output macros (logging, debugging, warning, error) */
169 #define NS_LOG(args...) \
170 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
171 #define NS_DBG(args...) \
172 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
173 #define NS_WARN(args...) \
174 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
175 #define NS_ERR(args...) \
176 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
177 #define NS_INFO(args...) \
178 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
179
180 /* Busy-wait delay macros (microseconds, milliseconds) */
181 #define NS_UDELAY(us) \
182 do { if (do_delays) udelay(us); } while(0)
183 #define NS_MDELAY(us) \
184 do { if (do_delays) mdelay(us); } while(0)
185
186 /* Is the nandsim structure initialized ? */
187 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
188
189 /* Good operation completion status */
190 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
191
192 /* Operation failed completion status */
193 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
194
195 /* Calculate the page offset in flash RAM image by (row, column) address */
196 #define NS_RAW_OFFSET(ns) \
197 (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
198
199 /* Calculate the OOB offset in flash RAM image by (row, column) address */
200 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
201
202 /* After a command is input, the simulator goes to one of the following states */
203 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
204 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
205 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
206 #define STATE_CMD_PAGEPROG 0x00000004 /* start page programm */
207 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
208 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
209 #define STATE_CMD_STATUS 0x00000007 /* read status */
210 #define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */
211 #define STATE_CMD_SEQIN 0x00000009 /* sequential data imput */
212 #define STATE_CMD_READID 0x0000000A /* read ID */
213 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
214 #define STATE_CMD_RESET 0x0000000C /* reset */
215 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
216 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
217 #define STATE_CMD_MASK 0x0000000F /* command states mask */
218
219 /* After an address is input, the simulator goes to one of these states */
220 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
221 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
222 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
223 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
224 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
225
226 /* Durind data input/output the simulator is in these states */
227 #define STATE_DATAIN 0x00000100 /* waiting for data input */
228 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
229
230 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
231 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
232 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
233 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
234 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
235
236 /* Previous operation is done, ready to accept new requests */
237 #define STATE_READY 0x00000000
238
239 /* This state is used to mark that the next state isn't known yet */
240 #define STATE_UNKNOWN 0x10000000
241
242 /* Simulator's actions bit masks */
243 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
244 #define ACTION_PRGPAGE 0x00200000 /* programm the internal buffer to flash */
245 #define ACTION_SECERASE 0x00300000 /* erase sector */
246 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
247 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
248 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
249 #define ACTION_MASK 0x00700000 /* action mask */
250
251 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
252 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
253
254 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
255 #define OPT_PAGE256 0x00000001 /* 256-byte page chips */
256 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
257 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
258 #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */
259 #define OPT_AUTOINCR 0x00000020 /* page number auto inctimentation is possible */
260 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
261 #define OPT_LARGEPAGE (OPT_PAGE2048) /* 2048-byte page chips */
262 #define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */
263
264 /* Remove action bits ftom state */
265 #define NS_STATE(x) ((x) & ~ACTION_MASK)
266
267 /*
268 * Maximum previous states which need to be saved. Currently saving is
269 * only needed for page programm operation with preceeded read command
270 * (which is only valid for 512-byte pages).
271 */
272 #define NS_MAX_PREVSTATES 1
273
274 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
275 #define NS_MAX_HELD_PAGES 16
276
277 /*
278 * A union to represent flash memory contents and flash buffer.
279 */
280 union ns_mem {
281 u_char *byte; /* for byte access */
282 uint16_t *word; /* for 16-bit word access */
283 };
284
285 /*
286 * The structure which describes all the internal simulator data.
287 */
288 struct nandsim {
289 struct mtd_partition partitions[MAX_MTD_DEVICES];
290 unsigned int nbparts;
291
292 uint busw; /* flash chip bus width (8 or 16) */
293 u_char ids[4]; /* chip's ID bytes */
294 uint32_t options; /* chip's characteristic bits */
295 uint32_t state; /* current chip state */
296 uint32_t nxstate; /* next expected state */
297
298 uint32_t *op; /* current operation, NULL operations isn't known yet */
299 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
300 uint16_t npstates; /* number of previous states saved */
301 uint16_t stateidx; /* current state index */
302
303 /* The simulated NAND flash pages array */
304 union ns_mem *pages;
305
306 /* Slab allocator for nand pages */
307 struct kmem_cache *nand_pages_slab;
308
309 /* Internal buffer of page + OOB size bytes */
310 union ns_mem buf;
311
312 /* NAND flash "geometry" */
313 struct nandsin_geometry {
314 uint64_t totsz; /* total flash size, bytes */
315 uint32_t secsz; /* flash sector (erase block) size, bytes */
316 uint pgsz; /* NAND flash page size, bytes */
317 uint oobsz; /* page OOB area size, bytes */
318 uint64_t totszoob; /* total flash size including OOB, bytes */
319 uint pgszoob; /* page size including OOB , bytes*/
320 uint secszoob; /* sector size including OOB, bytes */
321 uint pgnum; /* total number of pages */
322 uint pgsec; /* number of pages per sector */
323 uint secshift; /* bits number in sector size */
324 uint pgshift; /* bits number in page size */
325 uint oobshift; /* bits number in OOB size */
326 uint pgaddrbytes; /* bytes per page address */
327 uint secaddrbytes; /* bytes per sector address */
328 uint idbytes; /* the number ID bytes that this chip outputs */
329 } geom;
330
331 /* NAND flash internal registers */
332 struct nandsim_regs {
333 unsigned command; /* the command register */
334 u_char status; /* the status register */
335 uint row; /* the page number */
336 uint column; /* the offset within page */
337 uint count; /* internal counter */
338 uint num; /* number of bytes which must be processed */
339 uint off; /* fixed page offset */
340 } regs;
341
342 /* NAND flash lines state */
343 struct ns_lines_status {
344 int ce; /* chip Enable */
345 int cle; /* command Latch Enable */
346 int ale; /* address Latch Enable */
347 int wp; /* write Protect */
348 } lines;
349
350 /* Fields needed when using a cache file */
351 struct file *cfile; /* Open file */
352 unsigned char *pages_written; /* Which pages have been written */
353 void *file_buf;
354 struct page *held_pages[NS_MAX_HELD_PAGES];
355 int held_cnt;
356 };
357
358 /*
359 * Operations array. To perform any operation the simulator must pass
360 * through the correspondent states chain.
361 */
362 static struct nandsim_operations {
363 uint32_t reqopts; /* options which are required to perform the operation */
364 uint32_t states[NS_OPER_STATES]; /* operation's states */
365 } ops[NS_OPER_NUM] = {
366 /* Read page + OOB from the beginning */
367 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
368 STATE_DATAOUT, STATE_READY}},
369 /* Read page + OOB from the second half */
370 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
371 STATE_DATAOUT, STATE_READY}},
372 /* Read OOB */
373 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
374 STATE_DATAOUT, STATE_READY}},
375 /* Programm page starting from the beginning */
376 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
377 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
378 /* Programm page starting from the beginning */
379 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
380 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
381 /* Programm page starting from the second half */
382 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
383 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
384 /* Programm OOB */
385 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
386 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
387 /* Erase sector */
388 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
389 /* Read status */
390 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
391 /* Read multi-plane status */
392 {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
393 /* Read ID */
394 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
395 /* Large page devices read page */
396 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
397 STATE_DATAOUT, STATE_READY}},
398 /* Large page devices random page read */
399 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
400 STATE_DATAOUT, STATE_READY}},
401 };
402
403 struct weak_block {
404 struct list_head list;
405 unsigned int erase_block_no;
406 unsigned int max_erases;
407 unsigned int erases_done;
408 };
409
410 static LIST_HEAD(weak_blocks);
411
412 struct weak_page {
413 struct list_head list;
414 unsigned int page_no;
415 unsigned int max_writes;
416 unsigned int writes_done;
417 };
418
419 static LIST_HEAD(weak_pages);
420
421 struct grave_page {
422 struct list_head list;
423 unsigned int page_no;
424 unsigned int max_reads;
425 unsigned int reads_done;
426 };
427
428 static LIST_HEAD(grave_pages);
429
430 static unsigned long *erase_block_wear = NULL;
431 static unsigned int wear_eb_count = 0;
432 static unsigned long total_wear = 0;
433 static unsigned int rptwear_cnt = 0;
434
435 /* MTD structure for NAND controller */
436 static struct mtd_info *nsmtd;
437
438 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
439
440 /*
441 * Allocate array of page pointers, create slab allocation for an array
442 * and initialize the array by NULL pointers.
443 *
444 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
445 */
446 static int alloc_device(struct nandsim *ns)
447 {
448 struct file *cfile;
449 int i, err;
450
451 if (cache_file) {
452 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
453 if (IS_ERR(cfile))
454 return PTR_ERR(cfile);
455 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
456 NS_ERR("alloc_device: cache file not readable\n");
457 err = -EINVAL;
458 goto err_close;
459 }
460 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
461 NS_ERR("alloc_device: cache file not writeable\n");
462 err = -EINVAL;
463 goto err_close;
464 }
465 ns->pages_written = vmalloc(ns->geom.pgnum);
466 if (!ns->pages_written) {
467 NS_ERR("alloc_device: unable to allocate pages written array\n");
468 err = -ENOMEM;
469 goto err_close;
470 }
471 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
472 if (!ns->file_buf) {
473 NS_ERR("alloc_device: unable to allocate file buf\n");
474 err = -ENOMEM;
475 goto err_free;
476 }
477 ns->cfile = cfile;
478 memset(ns->pages_written, 0, ns->geom.pgnum);
479 return 0;
480 }
481
482 ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
483 if (!ns->pages) {
484 NS_ERR("alloc_device: unable to allocate page array\n");
485 return -ENOMEM;
486 }
487 for (i = 0; i < ns->geom.pgnum; i++) {
488 ns->pages[i].byte = NULL;
489 }
490 ns->nand_pages_slab = kmem_cache_create("nandsim",
491 ns->geom.pgszoob, 0, 0, NULL);
492 if (!ns->nand_pages_slab) {
493 NS_ERR("cache_create: unable to create kmem_cache\n");
494 return -ENOMEM;
495 }
496
497 return 0;
498
499 err_free:
500 vfree(ns->pages_written);
501 err_close:
502 filp_close(cfile, NULL);
503 return err;
504 }
505
506 /*
507 * Free any allocated pages, and free the array of page pointers.
508 */
509 static void free_device(struct nandsim *ns)
510 {
511 int i;
512
513 if (ns->cfile) {
514 kfree(ns->file_buf);
515 vfree(ns->pages_written);
516 filp_close(ns->cfile, NULL);
517 return;
518 }
519
520 if (ns->pages) {
521 for (i = 0; i < ns->geom.pgnum; i++) {
522 if (ns->pages[i].byte)
523 kmem_cache_free(ns->nand_pages_slab,
524 ns->pages[i].byte);
525 }
526 kmem_cache_destroy(ns->nand_pages_slab);
527 vfree(ns->pages);
528 }
529 }
530
531 static char *get_partition_name(int i)
532 {
533 char buf[64];
534 sprintf(buf, "NAND simulator partition %d", i);
535 return kstrdup(buf, GFP_KERNEL);
536 }
537
538 static u_int64_t divide(u_int64_t n, u_int32_t d)
539 {
540 do_div(n, d);
541 return n;
542 }
543
544 /*
545 * Initialize the nandsim structure.
546 *
547 * RETURNS: 0 if success, -ERRNO if failure.
548 */
549 static int init_nandsim(struct mtd_info *mtd)
550 {
551 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
552 struct nandsim *ns = (struct nandsim *)(chip->priv);
553 int i, ret = 0;
554 u_int64_t remains;
555 u_int64_t next_offset;
556
557 if (NS_IS_INITIALIZED(ns)) {
558 NS_ERR("init_nandsim: nandsim is already initialized\n");
559 return -EIO;
560 }
561
562 /* Force mtd to not do delays */
563 chip->chip_delay = 0;
564
565 /* Initialize the NAND flash parameters */
566 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
567 ns->geom.totsz = mtd->size;
568 ns->geom.pgsz = mtd->writesize;
569 ns->geom.oobsz = mtd->oobsize;
570 ns->geom.secsz = mtd->erasesize;
571 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
572 ns->geom.pgnum = divide(ns->geom.totsz, ns->geom.pgsz);
573 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
574 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
575 ns->geom.pgshift = chip->page_shift;
576 ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
577 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
578 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
579 ns->options = 0;
580
581 if (ns->geom.pgsz == 256) {
582 ns->options |= OPT_PAGE256;
583 }
584 else if (ns->geom.pgsz == 512) {
585 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
586 if (ns->busw == 8)
587 ns->options |= OPT_PAGE512_8BIT;
588 } else if (ns->geom.pgsz == 2048) {
589 ns->options |= OPT_PAGE2048;
590 } else {
591 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
592 return -EIO;
593 }
594
595 if (ns->options & OPT_SMALLPAGE) {
596 if (ns->geom.totsz <= (32 << 20)) {
597 ns->geom.pgaddrbytes = 3;
598 ns->geom.secaddrbytes = 2;
599 } else {
600 ns->geom.pgaddrbytes = 4;
601 ns->geom.secaddrbytes = 3;
602 }
603 } else {
604 if (ns->geom.totsz <= (128 << 20)) {
605 ns->geom.pgaddrbytes = 4;
606 ns->geom.secaddrbytes = 2;
607 } else {
608 ns->geom.pgaddrbytes = 5;
609 ns->geom.secaddrbytes = 3;
610 }
611 }
612
613 /* Fill the partition_info structure */
614 if (parts_num > ARRAY_SIZE(ns->partitions)) {
615 NS_ERR("too many partitions.\n");
616 ret = -EINVAL;
617 goto error;
618 }
619 remains = ns->geom.totsz;
620 next_offset = 0;
621 for (i = 0; i < parts_num; ++i) {
622 u_int64_t part_sz = (u_int64_t)parts[i] * ns->geom.secsz;
623
624 if (!part_sz || part_sz > remains) {
625 NS_ERR("bad partition size.\n");
626 ret = -EINVAL;
627 goto error;
628 }
629 ns->partitions[i].name = get_partition_name(i);
630 ns->partitions[i].offset = next_offset;
631 ns->partitions[i].size = part_sz;
632 next_offset += ns->partitions[i].size;
633 remains -= ns->partitions[i].size;
634 }
635 ns->nbparts = parts_num;
636 if (remains) {
637 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
638 NS_ERR("too many partitions.\n");
639 ret = -EINVAL;
640 goto error;
641 }
642 ns->partitions[i].name = get_partition_name(i);
643 ns->partitions[i].offset = next_offset;
644 ns->partitions[i].size = remains;
645 ns->nbparts += 1;
646 }
647
648 /* Detect how many ID bytes the NAND chip outputs */
649 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
650 if (second_id_byte != nand_flash_ids[i].id)
651 continue;
652 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
653 ns->options |= OPT_AUTOINCR;
654 }
655
656 if (ns->busw == 16)
657 NS_WARN("16-bit flashes support wasn't tested\n");
658
659 printk("flash size: %llu MiB\n",
660 (unsigned long long)ns->geom.totsz >> 20);
661 printk("page size: %u bytes\n", ns->geom.pgsz);
662 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
663 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
664 printk("pages number: %u\n", ns->geom.pgnum);
665 printk("pages per sector: %u\n", ns->geom.pgsec);
666 printk("bus width: %u\n", ns->busw);
667 printk("bits in sector size: %u\n", ns->geom.secshift);
668 printk("bits in page size: %u\n", ns->geom.pgshift);
669 printk("bits in OOB size: %u\n", ns->geom.oobshift);
670 printk("flash size with OOB: %llu KiB\n",
671 (unsigned long long)ns->geom.totszoob >> 10);
672 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
673 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
674 printk("options: %#x\n", ns->options);
675
676 if ((ret = alloc_device(ns)) != 0)
677 goto error;
678
679 /* Allocate / initialize the internal buffer */
680 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
681 if (!ns->buf.byte) {
682 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
683 ns->geom.pgszoob);
684 ret = -ENOMEM;
685 goto error;
686 }
687 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
688
689 return 0;
690
691 error:
692 free_device(ns);
693
694 return ret;
695 }
696
697 /*
698 * Free the nandsim structure.
699 */
700 static void free_nandsim(struct nandsim *ns)
701 {
702 kfree(ns->buf.byte);
703 free_device(ns);
704
705 return;
706 }
707
708 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
709 {
710 char *w;
711 int zero_ok;
712 unsigned int erase_block_no;
713 loff_t offset;
714
715 if (!badblocks)
716 return 0;
717 w = badblocks;
718 do {
719 zero_ok = (*w == '0' ? 1 : 0);
720 erase_block_no = simple_strtoul(w, &w, 0);
721 if (!zero_ok && !erase_block_no) {
722 NS_ERR("invalid badblocks.\n");
723 return -EINVAL;
724 }
725 offset = erase_block_no * ns->geom.secsz;
726 if (mtd->block_markbad(mtd, offset)) {
727 NS_ERR("invalid badblocks.\n");
728 return -EINVAL;
729 }
730 if (*w == ',')
731 w += 1;
732 } while (*w);
733 return 0;
734 }
735
736 static int parse_weakblocks(void)
737 {
738 char *w;
739 int zero_ok;
740 unsigned int erase_block_no;
741 unsigned int max_erases;
742 struct weak_block *wb;
743
744 if (!weakblocks)
745 return 0;
746 w = weakblocks;
747 do {
748 zero_ok = (*w == '0' ? 1 : 0);
749 erase_block_no = simple_strtoul(w, &w, 0);
750 if (!zero_ok && !erase_block_no) {
751 NS_ERR("invalid weakblocks.\n");
752 return -EINVAL;
753 }
754 max_erases = 3;
755 if (*w == ':') {
756 w += 1;
757 max_erases = simple_strtoul(w, &w, 0);
758 }
759 if (*w == ',')
760 w += 1;
761 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
762 if (!wb) {
763 NS_ERR("unable to allocate memory.\n");
764 return -ENOMEM;
765 }
766 wb->erase_block_no = erase_block_no;
767 wb->max_erases = max_erases;
768 list_add(&wb->list, &weak_blocks);
769 } while (*w);
770 return 0;
771 }
772
773 static int erase_error(unsigned int erase_block_no)
774 {
775 struct weak_block *wb;
776
777 list_for_each_entry(wb, &weak_blocks, list)
778 if (wb->erase_block_no == erase_block_no) {
779 if (wb->erases_done >= wb->max_erases)
780 return 1;
781 wb->erases_done += 1;
782 return 0;
783 }
784 return 0;
785 }
786
787 static int parse_weakpages(void)
788 {
789 char *w;
790 int zero_ok;
791 unsigned int page_no;
792 unsigned int max_writes;
793 struct weak_page *wp;
794
795 if (!weakpages)
796 return 0;
797 w = weakpages;
798 do {
799 zero_ok = (*w == '0' ? 1 : 0);
800 page_no = simple_strtoul(w, &w, 0);
801 if (!zero_ok && !page_no) {
802 NS_ERR("invalid weakpagess.\n");
803 return -EINVAL;
804 }
805 max_writes = 3;
806 if (*w == ':') {
807 w += 1;
808 max_writes = simple_strtoul(w, &w, 0);
809 }
810 if (*w == ',')
811 w += 1;
812 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
813 if (!wp) {
814 NS_ERR("unable to allocate memory.\n");
815 return -ENOMEM;
816 }
817 wp->page_no = page_no;
818 wp->max_writes = max_writes;
819 list_add(&wp->list, &weak_pages);
820 } while (*w);
821 return 0;
822 }
823
824 static int write_error(unsigned int page_no)
825 {
826 struct weak_page *wp;
827
828 list_for_each_entry(wp, &weak_pages, list)
829 if (wp->page_no == page_no) {
830 if (wp->writes_done >= wp->max_writes)
831 return 1;
832 wp->writes_done += 1;
833 return 0;
834 }
835 return 0;
836 }
837
838 static int parse_gravepages(void)
839 {
840 char *g;
841 int zero_ok;
842 unsigned int page_no;
843 unsigned int max_reads;
844 struct grave_page *gp;
845
846 if (!gravepages)
847 return 0;
848 g = gravepages;
849 do {
850 zero_ok = (*g == '0' ? 1 : 0);
851 page_no = simple_strtoul(g, &g, 0);
852 if (!zero_ok && !page_no) {
853 NS_ERR("invalid gravepagess.\n");
854 return -EINVAL;
855 }
856 max_reads = 3;
857 if (*g == ':') {
858 g += 1;
859 max_reads = simple_strtoul(g, &g, 0);
860 }
861 if (*g == ',')
862 g += 1;
863 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
864 if (!gp) {
865 NS_ERR("unable to allocate memory.\n");
866 return -ENOMEM;
867 }
868 gp->page_no = page_no;
869 gp->max_reads = max_reads;
870 list_add(&gp->list, &grave_pages);
871 } while (*g);
872 return 0;
873 }
874
875 static int read_error(unsigned int page_no)
876 {
877 struct grave_page *gp;
878
879 list_for_each_entry(gp, &grave_pages, list)
880 if (gp->page_no == page_no) {
881 if (gp->reads_done >= gp->max_reads)
882 return 1;
883 gp->reads_done += 1;
884 return 0;
885 }
886 return 0;
887 }
888
889 static void free_lists(void)
890 {
891 struct list_head *pos, *n;
892 list_for_each_safe(pos, n, &weak_blocks) {
893 list_del(pos);
894 kfree(list_entry(pos, struct weak_block, list));
895 }
896 list_for_each_safe(pos, n, &weak_pages) {
897 list_del(pos);
898 kfree(list_entry(pos, struct weak_page, list));
899 }
900 list_for_each_safe(pos, n, &grave_pages) {
901 list_del(pos);
902 kfree(list_entry(pos, struct grave_page, list));
903 }
904 kfree(erase_block_wear);
905 }
906
907 static int setup_wear_reporting(struct mtd_info *mtd)
908 {
909 size_t mem;
910
911 if (!rptwear)
912 return 0;
913 wear_eb_count = divide(mtd->size, mtd->erasesize);
914 mem = wear_eb_count * sizeof(unsigned long);
915 if (mem / sizeof(unsigned long) != wear_eb_count) {
916 NS_ERR("Too many erase blocks for wear reporting\n");
917 return -ENOMEM;
918 }
919 erase_block_wear = kzalloc(mem, GFP_KERNEL);
920 if (!erase_block_wear) {
921 NS_ERR("Too many erase blocks for wear reporting\n");
922 return -ENOMEM;
923 }
924 return 0;
925 }
926
927 static void update_wear(unsigned int erase_block_no)
928 {
929 unsigned long wmin = -1, wmax = 0, avg;
930 unsigned long deciles[10], decile_max[10], tot = 0;
931 unsigned int i;
932
933 if (!erase_block_wear)
934 return;
935 total_wear += 1;
936 if (total_wear == 0)
937 NS_ERR("Erase counter total overflow\n");
938 erase_block_wear[erase_block_no] += 1;
939 if (erase_block_wear[erase_block_no] == 0)
940 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
941 rptwear_cnt += 1;
942 if (rptwear_cnt < rptwear)
943 return;
944 rptwear_cnt = 0;
945 /* Calc wear stats */
946 for (i = 0; i < wear_eb_count; ++i) {
947 unsigned long wear = erase_block_wear[i];
948 if (wear < wmin)
949 wmin = wear;
950 if (wear > wmax)
951 wmax = wear;
952 tot += wear;
953 }
954 for (i = 0; i < 9; ++i) {
955 deciles[i] = 0;
956 decile_max[i] = (wmax * (i + 1) + 5) / 10;
957 }
958 deciles[9] = 0;
959 decile_max[9] = wmax;
960 for (i = 0; i < wear_eb_count; ++i) {
961 int d;
962 unsigned long wear = erase_block_wear[i];
963 for (d = 0; d < 10; ++d)
964 if (wear <= decile_max[d]) {
965 deciles[d] += 1;
966 break;
967 }
968 }
969 avg = tot / wear_eb_count;
970 /* Output wear report */
971 NS_INFO("*** Wear Report ***\n");
972 NS_INFO("Total numbers of erases: %lu\n", tot);
973 NS_INFO("Number of erase blocks: %u\n", wear_eb_count);
974 NS_INFO("Average number of erases: %lu\n", avg);
975 NS_INFO("Maximum number of erases: %lu\n", wmax);
976 NS_INFO("Minimum number of erases: %lu\n", wmin);
977 for (i = 0; i < 10; ++i) {
978 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
979 if (from > decile_max[i])
980 continue;
981 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
982 from,
983 decile_max[i],
984 deciles[i]);
985 }
986 NS_INFO("*** End of Wear Report ***\n");
987 }
988
989 /*
990 * Returns the string representation of 'state' state.
991 */
992 static char *get_state_name(uint32_t state)
993 {
994 switch (NS_STATE(state)) {
995 case STATE_CMD_READ0:
996 return "STATE_CMD_READ0";
997 case STATE_CMD_READ1:
998 return "STATE_CMD_READ1";
999 case STATE_CMD_PAGEPROG:
1000 return "STATE_CMD_PAGEPROG";
1001 case STATE_CMD_READOOB:
1002 return "STATE_CMD_READOOB";
1003 case STATE_CMD_READSTART:
1004 return "STATE_CMD_READSTART";
1005 case STATE_CMD_ERASE1:
1006 return "STATE_CMD_ERASE1";
1007 case STATE_CMD_STATUS:
1008 return "STATE_CMD_STATUS";
1009 case STATE_CMD_STATUS_M:
1010 return "STATE_CMD_STATUS_M";
1011 case STATE_CMD_SEQIN:
1012 return "STATE_CMD_SEQIN";
1013 case STATE_CMD_READID:
1014 return "STATE_CMD_READID";
1015 case STATE_CMD_ERASE2:
1016 return "STATE_CMD_ERASE2";
1017 case STATE_CMD_RESET:
1018 return "STATE_CMD_RESET";
1019 case STATE_CMD_RNDOUT:
1020 return "STATE_CMD_RNDOUT";
1021 case STATE_CMD_RNDOUTSTART:
1022 return "STATE_CMD_RNDOUTSTART";
1023 case STATE_ADDR_PAGE:
1024 return "STATE_ADDR_PAGE";
1025 case STATE_ADDR_SEC:
1026 return "STATE_ADDR_SEC";
1027 case STATE_ADDR_ZERO:
1028 return "STATE_ADDR_ZERO";
1029 case STATE_ADDR_COLUMN:
1030 return "STATE_ADDR_COLUMN";
1031 case STATE_DATAIN:
1032 return "STATE_DATAIN";
1033 case STATE_DATAOUT:
1034 return "STATE_DATAOUT";
1035 case STATE_DATAOUT_ID:
1036 return "STATE_DATAOUT_ID";
1037 case STATE_DATAOUT_STATUS:
1038 return "STATE_DATAOUT_STATUS";
1039 case STATE_DATAOUT_STATUS_M:
1040 return "STATE_DATAOUT_STATUS_M";
1041 case STATE_READY:
1042 return "STATE_READY";
1043 case STATE_UNKNOWN:
1044 return "STATE_UNKNOWN";
1045 }
1046
1047 NS_ERR("get_state_name: unknown state, BUG\n");
1048 return NULL;
1049 }
1050
1051 /*
1052 * Check if command is valid.
1053 *
1054 * RETURNS: 1 if wrong command, 0 if right.
1055 */
1056 static int check_command(int cmd)
1057 {
1058 switch (cmd) {
1059
1060 case NAND_CMD_READ0:
1061 case NAND_CMD_READ1:
1062 case NAND_CMD_READSTART:
1063 case NAND_CMD_PAGEPROG:
1064 case NAND_CMD_READOOB:
1065 case NAND_CMD_ERASE1:
1066 case NAND_CMD_STATUS:
1067 case NAND_CMD_SEQIN:
1068 case NAND_CMD_READID:
1069 case NAND_CMD_ERASE2:
1070 case NAND_CMD_RESET:
1071 case NAND_CMD_RNDOUT:
1072 case NAND_CMD_RNDOUTSTART:
1073 return 0;
1074
1075 case NAND_CMD_STATUS_MULTI:
1076 default:
1077 return 1;
1078 }
1079 }
1080
1081 /*
1082 * Returns state after command is accepted by command number.
1083 */
1084 static uint32_t get_state_by_command(unsigned command)
1085 {
1086 switch (command) {
1087 case NAND_CMD_READ0:
1088 return STATE_CMD_READ0;
1089 case NAND_CMD_READ1:
1090 return STATE_CMD_READ1;
1091 case NAND_CMD_PAGEPROG:
1092 return STATE_CMD_PAGEPROG;
1093 case NAND_CMD_READSTART:
1094 return STATE_CMD_READSTART;
1095 case NAND_CMD_READOOB:
1096 return STATE_CMD_READOOB;
1097 case NAND_CMD_ERASE1:
1098 return STATE_CMD_ERASE1;
1099 case NAND_CMD_STATUS:
1100 return STATE_CMD_STATUS;
1101 case NAND_CMD_STATUS_MULTI:
1102 return STATE_CMD_STATUS_M;
1103 case NAND_CMD_SEQIN:
1104 return STATE_CMD_SEQIN;
1105 case NAND_CMD_READID:
1106 return STATE_CMD_READID;
1107 case NAND_CMD_ERASE2:
1108 return STATE_CMD_ERASE2;
1109 case NAND_CMD_RESET:
1110 return STATE_CMD_RESET;
1111 case NAND_CMD_RNDOUT:
1112 return STATE_CMD_RNDOUT;
1113 case NAND_CMD_RNDOUTSTART:
1114 return STATE_CMD_RNDOUTSTART;
1115 }
1116
1117 NS_ERR("get_state_by_command: unknown command, BUG\n");
1118 return 0;
1119 }
1120
1121 /*
1122 * Move an address byte to the correspondent internal register.
1123 */
1124 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1125 {
1126 uint byte = (uint)bt;
1127
1128 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1129 ns->regs.column |= (byte << 8 * ns->regs.count);
1130 else {
1131 ns->regs.row |= (byte << 8 * (ns->regs.count -
1132 ns->geom.pgaddrbytes +
1133 ns->geom.secaddrbytes));
1134 }
1135
1136 return;
1137 }
1138
1139 /*
1140 * Switch to STATE_READY state.
1141 */
1142 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1143 {
1144 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1145
1146 ns->state = STATE_READY;
1147 ns->nxstate = STATE_UNKNOWN;
1148 ns->op = NULL;
1149 ns->npstates = 0;
1150 ns->stateidx = 0;
1151 ns->regs.num = 0;
1152 ns->regs.count = 0;
1153 ns->regs.off = 0;
1154 ns->regs.row = 0;
1155 ns->regs.column = 0;
1156 ns->regs.status = status;
1157 }
1158
1159 /*
1160 * If the operation isn't known yet, try to find it in the global array
1161 * of supported operations.
1162 *
1163 * Operation can be unknown because of the following.
1164 * 1. New command was accepted and this is the firs call to find the
1165 * correspondent states chain. In this case ns->npstates = 0;
1166 * 2. There is several operations which begin with the same command(s)
1167 * (for example program from the second half and read from the
1168 * second half operations both begin with the READ1 command). In this
1169 * case the ns->pstates[] array contains previous states.
1170 *
1171 * Thus, the function tries to find operation containing the following
1172 * states (if the 'flag' parameter is 0):
1173 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1174 *
1175 * If (one and only one) matching operation is found, it is accepted (
1176 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1177 * zeroed).
1178 *
1179 * If there are several maches, the current state is pushed to the
1180 * ns->pstates.
1181 *
1182 * The operation can be unknown only while commands are input to the chip.
1183 * As soon as address command is accepted, the operation must be known.
1184 * In such situation the function is called with 'flag' != 0, and the
1185 * operation is searched using the following pattern:
1186 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1187 *
1188 * It is supposed that this pattern must either match one operation on
1189 * none. There can't be ambiguity in that case.
1190 *
1191 * If no matches found, the functions does the following:
1192 * 1. if there are saved states present, try to ignore them and search
1193 * again only using the last command. If nothing was found, switch
1194 * to the STATE_READY state.
1195 * 2. if there are no saved states, switch to the STATE_READY state.
1196 *
1197 * RETURNS: -2 - no matched operations found.
1198 * -1 - several matches.
1199 * 0 - operation is found.
1200 */
1201 static int find_operation(struct nandsim *ns, uint32_t flag)
1202 {
1203 int opsfound = 0;
1204 int i, j, idx = 0;
1205
1206 for (i = 0; i < NS_OPER_NUM; i++) {
1207
1208 int found = 1;
1209
1210 if (!(ns->options & ops[i].reqopts))
1211 /* Ignore operations we can't perform */
1212 continue;
1213
1214 if (flag) {
1215 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1216 continue;
1217 } else {
1218 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1219 continue;
1220 }
1221
1222 for (j = 0; j < ns->npstates; j++)
1223 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1224 && (ns->options & ops[idx].reqopts)) {
1225 found = 0;
1226 break;
1227 }
1228
1229 if (found) {
1230 idx = i;
1231 opsfound += 1;
1232 }
1233 }
1234
1235 if (opsfound == 1) {
1236 /* Exact match */
1237 ns->op = &ops[idx].states[0];
1238 if (flag) {
1239 /*
1240 * In this case the find_operation function was
1241 * called when address has just began input. But it isn't
1242 * yet fully input and the current state must
1243 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1244 * state must be the next state (ns->nxstate).
1245 */
1246 ns->stateidx = ns->npstates - 1;
1247 } else {
1248 ns->stateidx = ns->npstates;
1249 }
1250 ns->npstates = 0;
1251 ns->state = ns->op[ns->stateidx];
1252 ns->nxstate = ns->op[ns->stateidx + 1];
1253 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1254 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1255 return 0;
1256 }
1257
1258 if (opsfound == 0) {
1259 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1260 if (ns->npstates != 0) {
1261 NS_DBG("find_operation: no operation found, try again with state %s\n",
1262 get_state_name(ns->state));
1263 ns->npstates = 0;
1264 return find_operation(ns, 0);
1265
1266 }
1267 NS_DBG("find_operation: no operations found\n");
1268 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1269 return -2;
1270 }
1271
1272 if (flag) {
1273 /* This shouldn't happen */
1274 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1275 return -2;
1276 }
1277
1278 NS_DBG("find_operation: there is still ambiguity\n");
1279
1280 ns->pstates[ns->npstates++] = ns->state;
1281
1282 return -1;
1283 }
1284
1285 static void put_pages(struct nandsim *ns)
1286 {
1287 int i;
1288
1289 for (i = 0; i < ns->held_cnt; i++)
1290 page_cache_release(ns->held_pages[i]);
1291 }
1292
1293 /* Get page cache pages in advance to provide NOFS memory allocation */
1294 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1295 {
1296 pgoff_t index, start_index, end_index;
1297 struct page *page;
1298 struct address_space *mapping = file->f_mapping;
1299
1300 start_index = pos >> PAGE_CACHE_SHIFT;
1301 end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1302 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1303 return -EINVAL;
1304 ns->held_cnt = 0;
1305 for (index = start_index; index <= end_index; index++) {
1306 page = find_get_page(mapping, index);
1307 if (page == NULL) {
1308 page = find_or_create_page(mapping, index, GFP_NOFS);
1309 if (page == NULL) {
1310 write_inode_now(mapping->host, 1);
1311 page = find_or_create_page(mapping, index, GFP_NOFS);
1312 }
1313 if (page == NULL) {
1314 put_pages(ns);
1315 return -ENOMEM;
1316 }
1317 unlock_page(page);
1318 }
1319 ns->held_pages[ns->held_cnt++] = page;
1320 }
1321 return 0;
1322 }
1323
1324 static int set_memalloc(void)
1325 {
1326 if (current->flags & PF_MEMALLOC)
1327 return 0;
1328 current->flags |= PF_MEMALLOC;
1329 return 1;
1330 }
1331
1332 static void clear_memalloc(int memalloc)
1333 {
1334 if (memalloc)
1335 current->flags &= ~PF_MEMALLOC;
1336 }
1337
1338 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1339 {
1340 mm_segment_t old_fs;
1341 ssize_t tx;
1342 int err, memalloc;
1343
1344 err = get_pages(ns, file, count, *pos);
1345 if (err)
1346 return err;
1347 old_fs = get_fs();
1348 set_fs(get_ds());
1349 memalloc = set_memalloc();
1350 tx = vfs_read(file, (char __user *)buf, count, pos);
1351 clear_memalloc(memalloc);
1352 set_fs(old_fs);
1353 put_pages(ns);
1354 return tx;
1355 }
1356
1357 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1358 {
1359 mm_segment_t old_fs;
1360 ssize_t tx;
1361 int err, memalloc;
1362
1363 err = get_pages(ns, file, count, *pos);
1364 if (err)
1365 return err;
1366 old_fs = get_fs();
1367 set_fs(get_ds());
1368 memalloc = set_memalloc();
1369 tx = vfs_write(file, (char __user *)buf, count, pos);
1370 clear_memalloc(memalloc);
1371 set_fs(old_fs);
1372 put_pages(ns);
1373 return tx;
1374 }
1375
1376 /*
1377 * Returns a pointer to the current page.
1378 */
1379 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1380 {
1381 return &(ns->pages[ns->regs.row]);
1382 }
1383
1384 /*
1385 * Retuns a pointer to the current byte, within the current page.
1386 */
1387 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1388 {
1389 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1390 }
1391
1392 int do_read_error(struct nandsim *ns, int num)
1393 {
1394 unsigned int page_no = ns->regs.row;
1395
1396 if (read_error(page_no)) {
1397 int i;
1398 memset(ns->buf.byte, 0xFF, num);
1399 for (i = 0; i < num; ++i)
1400 ns->buf.byte[i] = random32();
1401 NS_WARN("simulating read error in page %u\n", page_no);
1402 return 1;
1403 }
1404 return 0;
1405 }
1406
1407 void do_bit_flips(struct nandsim *ns, int num)
1408 {
1409 if (bitflips && random32() < (1 << 22)) {
1410 int flips = 1;
1411 if (bitflips > 1)
1412 flips = (random32() % (int) bitflips) + 1;
1413 while (flips--) {
1414 int pos = random32() % (num * 8);
1415 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1416 NS_WARN("read_page: flipping bit %d in page %d "
1417 "reading from %d ecc: corrected=%u failed=%u\n",
1418 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1419 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1420 }
1421 }
1422 }
1423
1424 /*
1425 * Fill the NAND buffer with data read from the specified page.
1426 */
1427 static void read_page(struct nandsim *ns, int num)
1428 {
1429 union ns_mem *mypage;
1430
1431 if (ns->cfile) {
1432 if (!ns->pages_written[ns->regs.row]) {
1433 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1434 memset(ns->buf.byte, 0xFF, num);
1435 } else {
1436 loff_t pos;
1437 ssize_t tx;
1438
1439 NS_DBG("read_page: page %d written, reading from %d\n",
1440 ns->regs.row, ns->regs.column + ns->regs.off);
1441 if (do_read_error(ns, num))
1442 return;
1443 pos = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1444 tx = read_file(ns, ns->cfile, ns->buf.byte, num, &pos);
1445 if (tx != num) {
1446 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1447 return;
1448 }
1449 do_bit_flips(ns, num);
1450 }
1451 return;
1452 }
1453
1454 mypage = NS_GET_PAGE(ns);
1455 if (mypage->byte == NULL) {
1456 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1457 memset(ns->buf.byte, 0xFF, num);
1458 } else {
1459 NS_DBG("read_page: page %d allocated, reading from %d\n",
1460 ns->regs.row, ns->regs.column + ns->regs.off);
1461 if (do_read_error(ns, num))
1462 return;
1463 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1464 do_bit_flips(ns, num);
1465 }
1466 }
1467
1468 /*
1469 * Erase all pages in the specified sector.
1470 */
1471 static void erase_sector(struct nandsim *ns)
1472 {
1473 union ns_mem *mypage;
1474 int i;
1475
1476 if (ns->cfile) {
1477 for (i = 0; i < ns->geom.pgsec; i++)
1478 if (ns->pages_written[ns->regs.row + i]) {
1479 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1480 ns->pages_written[ns->regs.row + i] = 0;
1481 }
1482 return;
1483 }
1484
1485 mypage = NS_GET_PAGE(ns);
1486 for (i = 0; i < ns->geom.pgsec; i++) {
1487 if (mypage->byte != NULL) {
1488 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1489 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1490 mypage->byte = NULL;
1491 }
1492 mypage++;
1493 }
1494 }
1495
1496 /*
1497 * Program the specified page with the contents from the NAND buffer.
1498 */
1499 static int prog_page(struct nandsim *ns, int num)
1500 {
1501 int i;
1502 union ns_mem *mypage;
1503 u_char *pg_off;
1504
1505 if (ns->cfile) {
1506 loff_t off, pos;
1507 ssize_t tx;
1508 int all;
1509
1510 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1511 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1512 off = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1513 if (!ns->pages_written[ns->regs.row]) {
1514 all = 1;
1515 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1516 } else {
1517 all = 0;
1518 pos = off;
1519 tx = read_file(ns, ns->cfile, pg_off, num, &pos);
1520 if (tx != num) {
1521 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1522 return -1;
1523 }
1524 }
1525 for (i = 0; i < num; i++)
1526 pg_off[i] &= ns->buf.byte[i];
1527 if (all) {
1528 pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1529 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, &pos);
1530 if (tx != ns->geom.pgszoob) {
1531 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1532 return -1;
1533 }
1534 ns->pages_written[ns->regs.row] = 1;
1535 } else {
1536 pos = off;
1537 tx = write_file(ns, ns->cfile, pg_off, num, &pos);
1538 if (tx != num) {
1539 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1540 return -1;
1541 }
1542 }
1543 return 0;
1544 }
1545
1546 mypage = NS_GET_PAGE(ns);
1547 if (mypage->byte == NULL) {
1548 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1549 /*
1550 * We allocate memory with GFP_NOFS because a flash FS may
1551 * utilize this. If it is holding an FS lock, then gets here,
1552 * then kernel memory alloc runs writeback which goes to the FS
1553 * again and deadlocks. This was seen in practice.
1554 */
1555 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1556 if (mypage->byte == NULL) {
1557 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1558 return -1;
1559 }
1560 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1561 }
1562
1563 pg_off = NS_PAGE_BYTE_OFF(ns);
1564 for (i = 0; i < num; i++)
1565 pg_off[i] &= ns->buf.byte[i];
1566
1567 return 0;
1568 }
1569
1570 /*
1571 * If state has any action bit, perform this action.
1572 *
1573 * RETURNS: 0 if success, -1 if error.
1574 */
1575 static int do_state_action(struct nandsim *ns, uint32_t action)
1576 {
1577 int num;
1578 int busdiv = ns->busw == 8 ? 1 : 2;
1579 unsigned int erase_block_no, page_no;
1580
1581 action &= ACTION_MASK;
1582
1583 /* Check that page address input is correct */
1584 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1585 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1586 return -1;
1587 }
1588
1589 switch (action) {
1590
1591 case ACTION_CPY:
1592 /*
1593 * Copy page data to the internal buffer.
1594 */
1595
1596 /* Column shouldn't be very large */
1597 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1598 NS_ERR("do_state_action: column number is too large\n");
1599 break;
1600 }
1601 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1602 read_page(ns, num);
1603
1604 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1605 num, NS_RAW_OFFSET(ns) + ns->regs.off);
1606
1607 if (ns->regs.off == 0)
1608 NS_LOG("read page %d\n", ns->regs.row);
1609 else if (ns->regs.off < ns->geom.pgsz)
1610 NS_LOG("read page %d (second half)\n", ns->regs.row);
1611 else
1612 NS_LOG("read OOB of page %d\n", ns->regs.row);
1613
1614 NS_UDELAY(access_delay);
1615 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1616
1617 break;
1618
1619 case ACTION_SECERASE:
1620 /*
1621 * Erase sector.
1622 */
1623
1624 if (ns->lines.wp) {
1625 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1626 return -1;
1627 }
1628
1629 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1630 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1631 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1632 return -1;
1633 }
1634
1635 ns->regs.row = (ns->regs.row <<
1636 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1637 ns->regs.column = 0;
1638
1639 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1640
1641 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1642 ns->regs.row, NS_RAW_OFFSET(ns));
1643 NS_LOG("erase sector %u\n", erase_block_no);
1644
1645 erase_sector(ns);
1646
1647 NS_MDELAY(erase_delay);
1648
1649 if (erase_block_wear)
1650 update_wear(erase_block_no);
1651
1652 if (erase_error(erase_block_no)) {
1653 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1654 return -1;
1655 }
1656
1657 break;
1658
1659 case ACTION_PRGPAGE:
1660 /*
1661 * Programm page - move internal buffer data to the page.
1662 */
1663
1664 if (ns->lines.wp) {
1665 NS_WARN("do_state_action: device is write-protected, programm\n");
1666 return -1;
1667 }
1668
1669 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1670 if (num != ns->regs.count) {
1671 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1672 ns->regs.count, num);
1673 return -1;
1674 }
1675
1676 if (prog_page(ns, num) == -1)
1677 return -1;
1678
1679 page_no = ns->regs.row;
1680
1681 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1682 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1683 NS_LOG("programm page %d\n", ns->regs.row);
1684
1685 NS_UDELAY(programm_delay);
1686 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1687
1688 if (write_error(page_no)) {
1689 NS_WARN("simulating write failure in page %u\n", page_no);
1690 return -1;
1691 }
1692
1693 break;
1694
1695 case ACTION_ZEROOFF:
1696 NS_DBG("do_state_action: set internal offset to 0\n");
1697 ns->regs.off = 0;
1698 break;
1699
1700 case ACTION_HALFOFF:
1701 if (!(ns->options & OPT_PAGE512_8BIT)) {
1702 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1703 "byte page size 8x chips\n");
1704 return -1;
1705 }
1706 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1707 ns->regs.off = ns->geom.pgsz/2;
1708 break;
1709
1710 case ACTION_OOBOFF:
1711 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1712 ns->regs.off = ns->geom.pgsz;
1713 break;
1714
1715 default:
1716 NS_DBG("do_state_action: BUG! unknown action\n");
1717 }
1718
1719 return 0;
1720 }
1721
1722 /*
1723 * Switch simulator's state.
1724 */
1725 static void switch_state(struct nandsim *ns)
1726 {
1727 if (ns->op) {
1728 /*
1729 * The current operation have already been identified.
1730 * Just follow the states chain.
1731 */
1732
1733 ns->stateidx += 1;
1734 ns->state = ns->nxstate;
1735 ns->nxstate = ns->op[ns->stateidx + 1];
1736
1737 NS_DBG("switch_state: operation is known, switch to the next state, "
1738 "state: %s, nxstate: %s\n",
1739 get_state_name(ns->state), get_state_name(ns->nxstate));
1740
1741 /* See, whether we need to do some action */
1742 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1743 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1744 return;
1745 }
1746
1747 } else {
1748 /*
1749 * We don't yet know which operation we perform.
1750 * Try to identify it.
1751 */
1752
1753 /*
1754 * The only event causing the switch_state function to
1755 * be called with yet unknown operation is new command.
1756 */
1757 ns->state = get_state_by_command(ns->regs.command);
1758
1759 NS_DBG("switch_state: operation is unknown, try to find it\n");
1760
1761 if (find_operation(ns, 0) != 0)
1762 return;
1763
1764 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1765 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1766 return;
1767 }
1768 }
1769
1770 /* For 16x devices column means the page offset in words */
1771 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1772 NS_DBG("switch_state: double the column number for 16x device\n");
1773 ns->regs.column <<= 1;
1774 }
1775
1776 if (NS_STATE(ns->nxstate) == STATE_READY) {
1777 /*
1778 * The current state is the last. Return to STATE_READY
1779 */
1780
1781 u_char status = NS_STATUS_OK(ns);
1782
1783 /* In case of data states, see if all bytes were input/output */
1784 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1785 && ns->regs.count != ns->regs.num) {
1786 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1787 ns->regs.num - ns->regs.count);
1788 status = NS_STATUS_FAILED(ns);
1789 }
1790
1791 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1792
1793 switch_to_ready_state(ns, status);
1794
1795 return;
1796 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1797 /*
1798 * If the next state is data input/output, switch to it now
1799 */
1800
1801 ns->state = ns->nxstate;
1802 ns->nxstate = ns->op[++ns->stateidx + 1];
1803 ns->regs.num = ns->regs.count = 0;
1804
1805 NS_DBG("switch_state: the next state is data I/O, switch, "
1806 "state: %s, nxstate: %s\n",
1807 get_state_name(ns->state), get_state_name(ns->nxstate));
1808
1809 /*
1810 * Set the internal register to the count of bytes which
1811 * are expected to be input or output
1812 */
1813 switch (NS_STATE(ns->state)) {
1814 case STATE_DATAIN:
1815 case STATE_DATAOUT:
1816 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1817 break;
1818
1819 case STATE_DATAOUT_ID:
1820 ns->regs.num = ns->geom.idbytes;
1821 break;
1822
1823 case STATE_DATAOUT_STATUS:
1824 case STATE_DATAOUT_STATUS_M:
1825 ns->regs.count = ns->regs.num = 0;
1826 break;
1827
1828 default:
1829 NS_ERR("switch_state: BUG! unknown data state\n");
1830 }
1831
1832 } else if (ns->nxstate & STATE_ADDR_MASK) {
1833 /*
1834 * If the next state is address input, set the internal
1835 * register to the number of expected address bytes
1836 */
1837
1838 ns->regs.count = 0;
1839
1840 switch (NS_STATE(ns->nxstate)) {
1841 case STATE_ADDR_PAGE:
1842 ns->regs.num = ns->geom.pgaddrbytes;
1843
1844 break;
1845 case STATE_ADDR_SEC:
1846 ns->regs.num = ns->geom.secaddrbytes;
1847 break;
1848
1849 case STATE_ADDR_ZERO:
1850 ns->regs.num = 1;
1851 break;
1852
1853 case STATE_ADDR_COLUMN:
1854 /* Column address is always 2 bytes */
1855 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1856 break;
1857
1858 default:
1859 NS_ERR("switch_state: BUG! unknown address state\n");
1860 }
1861 } else {
1862 /*
1863 * Just reset internal counters.
1864 */
1865
1866 ns->regs.num = 0;
1867 ns->regs.count = 0;
1868 }
1869 }
1870
1871 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1872 {
1873 struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1874 u_char outb = 0x00;
1875
1876 /* Sanity and correctness checks */
1877 if (!ns->lines.ce) {
1878 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1879 return outb;
1880 }
1881 if (ns->lines.ale || ns->lines.cle) {
1882 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1883 return outb;
1884 }
1885 if (!(ns->state & STATE_DATAOUT_MASK)) {
1886 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1887 "return %#x\n", get_state_name(ns->state), (uint)outb);
1888 return outb;
1889 }
1890
1891 /* Status register may be read as many times as it is wanted */
1892 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1893 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1894 return ns->regs.status;
1895 }
1896
1897 /* Check if there is any data in the internal buffer which may be read */
1898 if (ns->regs.count == ns->regs.num) {
1899 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1900 return outb;
1901 }
1902
1903 switch (NS_STATE(ns->state)) {
1904 case STATE_DATAOUT:
1905 if (ns->busw == 8) {
1906 outb = ns->buf.byte[ns->regs.count];
1907 ns->regs.count += 1;
1908 } else {
1909 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1910 ns->regs.count += 2;
1911 }
1912 break;
1913 case STATE_DATAOUT_ID:
1914 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1915 outb = ns->ids[ns->regs.count];
1916 ns->regs.count += 1;
1917 break;
1918 default:
1919 BUG();
1920 }
1921
1922 if (ns->regs.count == ns->regs.num) {
1923 NS_DBG("read_byte: all bytes were read\n");
1924
1925 /*
1926 * The OPT_AUTOINCR allows to read next conseqitive pages without
1927 * new read operation cycle.
1928 */
1929 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1930 ns->regs.count = 0;
1931 if (ns->regs.row + 1 < ns->geom.pgnum)
1932 ns->regs.row += 1;
1933 NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1934 do_state_action(ns, ACTION_CPY);
1935 }
1936 else if (NS_STATE(ns->nxstate) == STATE_READY)
1937 switch_state(ns);
1938
1939 }
1940
1941 return outb;
1942 }
1943
1944 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1945 {
1946 struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
1947
1948 /* Sanity and correctness checks */
1949 if (!ns->lines.ce) {
1950 NS_ERR("write_byte: chip is disabled, ignore write\n");
1951 return;
1952 }
1953 if (ns->lines.ale && ns->lines.cle) {
1954 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1955 return;
1956 }
1957
1958 if (ns->lines.cle == 1) {
1959 /*
1960 * The byte written is a command.
1961 */
1962
1963 if (byte == NAND_CMD_RESET) {
1964 NS_LOG("reset chip\n");
1965 switch_to_ready_state(ns, NS_STATUS_OK(ns));
1966 return;
1967 }
1968
1969 /* Check that the command byte is correct */
1970 if (check_command(byte)) {
1971 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1972 return;
1973 }
1974
1975 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1976 || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1977 || NS_STATE(ns->state) == STATE_DATAOUT) {
1978 int row = ns->regs.row;
1979
1980 switch_state(ns);
1981 if (byte == NAND_CMD_RNDOUT)
1982 ns->regs.row = row;
1983 }
1984
1985 /* Check if chip is expecting command */
1986 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1987 /* Do not warn if only 2 id bytes are read */
1988 if (!(ns->regs.command == NAND_CMD_READID &&
1989 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
1990 /*
1991 * We are in situation when something else (not command)
1992 * was expected but command was input. In this case ignore
1993 * previous command(s)/state(s) and accept the last one.
1994 */
1995 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1996 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1997 }
1998 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1999 }
2000
2001 NS_DBG("command byte corresponding to %s state accepted\n",
2002 get_state_name(get_state_by_command(byte)));
2003 ns->regs.command = byte;
2004 switch_state(ns);
2005
2006 } else if (ns->lines.ale == 1) {
2007 /*
2008 * The byte written is an address.
2009 */
2010
2011 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2012
2013 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2014
2015 if (find_operation(ns, 1) < 0)
2016 return;
2017
2018 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2019 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2020 return;
2021 }
2022
2023 ns->regs.count = 0;
2024 switch (NS_STATE(ns->nxstate)) {
2025 case STATE_ADDR_PAGE:
2026 ns->regs.num = ns->geom.pgaddrbytes;
2027 break;
2028 case STATE_ADDR_SEC:
2029 ns->regs.num = ns->geom.secaddrbytes;
2030 break;
2031 case STATE_ADDR_ZERO:
2032 ns->regs.num = 1;
2033 break;
2034 default:
2035 BUG();
2036 }
2037 }
2038
2039 /* Check that chip is expecting address */
2040 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2041 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2042 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2043 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2044 return;
2045 }
2046
2047 /* Check if this is expected byte */
2048 if (ns->regs.count == ns->regs.num) {
2049 NS_ERR("write_byte: no more address bytes expected\n");
2050 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2051 return;
2052 }
2053
2054 accept_addr_byte(ns, byte);
2055
2056 ns->regs.count += 1;
2057
2058 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2059 (uint)byte, ns->regs.count, ns->regs.num);
2060
2061 if (ns->regs.count == ns->regs.num) {
2062 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2063 switch_state(ns);
2064 }
2065
2066 } else {
2067 /*
2068 * The byte written is an input data.
2069 */
2070
2071 /* Check that chip is expecting data input */
2072 if (!(ns->state & STATE_DATAIN_MASK)) {
2073 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2074 "switch to %s\n", (uint)byte,
2075 get_state_name(ns->state), get_state_name(STATE_READY));
2076 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2077 return;
2078 }
2079
2080 /* Check if this is expected byte */
2081 if (ns->regs.count == ns->regs.num) {
2082 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2083 ns->regs.num);
2084 return;
2085 }
2086
2087 if (ns->busw == 8) {
2088 ns->buf.byte[ns->regs.count] = byte;
2089 ns->regs.count += 1;
2090 } else {
2091 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2092 ns->regs.count += 2;
2093 }
2094 }
2095
2096 return;
2097 }
2098
2099 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2100 {
2101 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2102
2103 ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2104 ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2105 ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2106
2107 if (cmd != NAND_CMD_NONE)
2108 ns_nand_write_byte(mtd, cmd);
2109 }
2110
2111 static int ns_device_ready(struct mtd_info *mtd)
2112 {
2113 NS_DBG("device_ready\n");
2114 return 1;
2115 }
2116
2117 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2118 {
2119 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2120
2121 NS_DBG("read_word\n");
2122
2123 return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2124 }
2125
2126 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2127 {
2128 struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
2129
2130 /* Check that chip is expecting data input */
2131 if (!(ns->state & STATE_DATAIN_MASK)) {
2132 NS_ERR("write_buf: data input isn't expected, state is %s, "
2133 "switch to STATE_READY\n", get_state_name(ns->state));
2134 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2135 return;
2136 }
2137
2138 /* Check if these are expected bytes */
2139 if (ns->regs.count + len > ns->regs.num) {
2140 NS_ERR("write_buf: too many input bytes\n");
2141 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2142 return;
2143 }
2144
2145 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2146 ns->regs.count += len;
2147
2148 if (ns->regs.count == ns->regs.num) {
2149 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2150 }
2151 }
2152
2153 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2154 {
2155 struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv;
2156
2157 /* Sanity and correctness checks */
2158 if (!ns->lines.ce) {
2159 NS_ERR("read_buf: chip is disabled\n");
2160 return;
2161 }
2162 if (ns->lines.ale || ns->lines.cle) {
2163 NS_ERR("read_buf: ALE or CLE pin is high\n");
2164 return;
2165 }
2166 if (!(ns->state & STATE_DATAOUT_MASK)) {
2167 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2168 get_state_name(ns->state));
2169 return;
2170 }
2171
2172 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2173 int i;
2174
2175 for (i = 0; i < len; i++)
2176 buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2177
2178 return;
2179 }
2180
2181 /* Check if these are expected bytes */
2182 if (ns->regs.count + len > ns->regs.num) {
2183 NS_ERR("read_buf: too many bytes to read\n");
2184 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2185 return;
2186 }
2187
2188 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2189 ns->regs.count += len;
2190
2191 if (ns->regs.count == ns->regs.num) {
2192 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
2193 ns->regs.count = 0;
2194 if (ns->regs.row + 1 < ns->geom.pgnum)
2195 ns->regs.row += 1;
2196 NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
2197 do_state_action(ns, ACTION_CPY);
2198 }
2199 else if (NS_STATE(ns->nxstate) == STATE_READY)
2200 switch_state(ns);
2201 }
2202
2203 return;
2204 }
2205
2206 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
2207 {
2208 ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
2209
2210 if (!memcmp(buf, &ns_verify_buf[0], len)) {
2211 NS_DBG("verify_buf: the buffer is OK\n");
2212 return 0;
2213 } else {
2214 NS_DBG("verify_buf: the buffer is wrong\n");
2215 return -EFAULT;
2216 }
2217 }
2218
2219 /*
2220 * Module initialization function
2221 */
2222 static int __init ns_init_module(void)
2223 {
2224 struct nand_chip *chip;
2225 struct nandsim *nand;
2226 int retval = -ENOMEM, i;
2227
2228 if (bus_width != 8 && bus_width != 16) {
2229 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2230 return -EINVAL;
2231 }
2232
2233 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2234 nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2235 + sizeof(struct nandsim), GFP_KERNEL);
2236 if (!nsmtd) {
2237 NS_ERR("unable to allocate core structures.\n");
2238 return -ENOMEM;
2239 }
2240 chip = (struct nand_chip *)(nsmtd + 1);
2241 nsmtd->priv = (void *)chip;
2242 nand = (struct nandsim *)(chip + 1);
2243 chip->priv = (void *)nand;
2244
2245 /*
2246 * Register simulator's callbacks.
2247 */
2248 chip->cmd_ctrl = ns_hwcontrol;
2249 chip->read_byte = ns_nand_read_byte;
2250 chip->dev_ready = ns_device_ready;
2251 chip->write_buf = ns_nand_write_buf;
2252 chip->read_buf = ns_nand_read_buf;
2253 chip->verify_buf = ns_nand_verify_buf;
2254 chip->read_word = ns_nand_read_word;
2255 chip->ecc.mode = NAND_ECC_SOFT;
2256 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2257 /* and 'badblocks' parameters to work */
2258 chip->options |= NAND_SKIP_BBTSCAN;
2259
2260 /*
2261 * Perform minimum nandsim structure initialization to handle
2262 * the initial ID read command correctly
2263 */
2264 if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2265 nand->geom.idbytes = 4;
2266 else
2267 nand->geom.idbytes = 2;
2268 nand->regs.status = NS_STATUS_OK(nand);
2269 nand->nxstate = STATE_UNKNOWN;
2270 nand->options |= OPT_PAGE256; /* temporary value */
2271 nand->ids[0] = first_id_byte;
2272 nand->ids[1] = second_id_byte;
2273 nand->ids[2] = third_id_byte;
2274 nand->ids[3] = fourth_id_byte;
2275 if (bus_width == 16) {
2276 nand->busw = 16;
2277 chip->options |= NAND_BUSWIDTH_16;
2278 }
2279
2280 nsmtd->owner = THIS_MODULE;
2281
2282 if ((retval = parse_weakblocks()) != 0)
2283 goto error;
2284
2285 if ((retval = parse_weakpages()) != 0)
2286 goto error;
2287
2288 if ((retval = parse_gravepages()) != 0)
2289 goto error;
2290
2291 if ((retval = nand_scan(nsmtd, 1)) != 0) {
2292 NS_ERR("can't register NAND Simulator\n");
2293 if (retval > 0)
2294 retval = -ENXIO;
2295 goto error;
2296 }
2297
2298 if (overridesize) {
2299 u_int64_t new_size = (u_int64_t)nsmtd->erasesize << overridesize;
2300 if (new_size >> overridesize != nsmtd->erasesize) {
2301 NS_ERR("overridesize is too big\n");
2302 goto err_exit;
2303 }
2304 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2305 nsmtd->size = new_size;
2306 chip->chipsize = new_size;
2307 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2308 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2309 }
2310
2311 if ((retval = setup_wear_reporting(nsmtd)) != 0)
2312 goto err_exit;
2313
2314 if ((retval = init_nandsim(nsmtd)) != 0)
2315 goto err_exit;
2316
2317 if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2318 goto err_exit;
2319
2320 if ((retval = nand_default_bbt(nsmtd)) != 0)
2321 goto err_exit;
2322
2323 /* Register NAND partitions */
2324 if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0)
2325 goto err_exit;
2326
2327 return 0;
2328
2329 err_exit:
2330 free_nandsim(nand);
2331 nand_release(nsmtd);
2332 for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2333 kfree(nand->partitions[i].name);
2334 error:
2335 kfree(nsmtd);
2336 free_lists();
2337
2338 return retval;
2339 }
2340
2341 module_init(ns_init_module);
2342
2343 /*
2344 * Module clean-up function
2345 */
2346 static void __exit ns_cleanup_module(void)
2347 {
2348 struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv);
2349 int i;
2350
2351 free_nandsim(ns); /* Free nandsim private resources */
2352 nand_release(nsmtd); /* Unregister driver */
2353 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2354 kfree(ns->partitions[i].name);
2355 kfree(nsmtd); /* Free other structures */
2356 free_lists();
2357 }
2358
2359 module_exit(ns_cleanup_module);
2360
2361 MODULE_LICENSE ("GPL");
2362 MODULE_AUTHOR ("Artem B. Bityuckiy");
2363 MODULE_DESCRIPTION ("The NAND flash simulator");
Linux for Ginger Game Console