Full support for Ginger Console
[linux-ginger.git] / arch / arm / mach-davinci / include / mach / mux.h
blobbb84893a4e838695dbc5c15cc63ddd4b5b42f6cb
1 /*
2 * Table of the DAVINCI register configurations for the PINMUX combinations
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
6 * Based on linux/include/asm-arm/arch-omap/mux.h:
7 * Copyright (C) 2003 - 2005 Nokia Corporation
9 * Written by Tony Lindgren
11 * 2007 (c) MontaVista Software, Inc. This file is licensed under
12 * the terms of the GNU General Public License version 2. This program
13 * is licensed "as is" without any warranty of any kind, whether express
14 * or implied.
16 * Copyright (C) 2008 Texas Instruments.
19 #ifndef __INC_MACH_MUX_H
20 #define __INC_MACH_MUX_H
22 struct mux_config {
23 const char *name;
24 const char *mux_reg_name;
25 const unsigned char mux_reg;
26 const unsigned char mask_offset;
27 const unsigned char mask;
28 const unsigned char mode;
29 bool debug;
32 enum davinci_dm644x_index {
33 /* ATA and HDDIR functions */
34 DM644X_HDIREN,
35 DM644X_ATAEN,
36 DM644X_ATAEN_DISABLE,
38 /* HPI functions */
39 DM644X_HPIEN_DISABLE,
41 /* AEAW functions */
42 DM644X_AEAW,
44 /* Memory Stick */
45 DM644X_MSTK,
47 /* I2C */
48 DM644X_I2C,
50 /* ASP function */
51 DM644X_MCBSP,
53 /* UART1 */
54 DM644X_UART1,
56 /* UART2 */
57 DM644X_UART2,
59 /* PWM0 */
60 DM644X_PWM0,
62 /* PWM1 */
63 DM644X_PWM1,
65 /* PWM2 */
66 DM644X_PWM2,
68 /* VLYNQ function */
69 DM644X_VLYNQEN,
70 DM644X_VLSCREN,
71 DM644X_VLYNQWD,
73 /* EMAC and MDIO function */
74 DM644X_EMACEN,
76 /* GPIO3V[0:16] pins */
77 DM644X_GPIO3V,
79 /* GPIO pins */
80 DM644X_GPIO0,
81 DM644X_GPIO3,
82 DM644X_GPIO43_44,
83 DM644X_GPIO46_47,
85 /* VPBE */
86 DM644X_RGB666,
88 /* LCD */
89 DM644X_LOEEN,
90 DM644X_LFLDEN,
93 enum davinci_dm646x_index {
94 /* ATA function */
95 DM646X_ATAEN,
97 /* AUDIO Clock */
98 DM646X_AUDCK1,
99 DM646X_AUDCK0,
101 /* CRGEN Control */
102 DM646X_CRGMUX,
104 /* VPIF Control */
105 DM646X_STSOMUX_DISABLE,
106 DM646X_STSIMUX_DISABLE,
107 DM646X_PTSOMUX_DISABLE,
108 DM646X_PTSIMUX_DISABLE,
110 /* TSIF Control */
111 DM646X_STSOMUX,
112 DM646X_STSIMUX,
113 DM646X_PTSOMUX_PARALLEL,
114 DM646X_PTSIMUX_PARALLEL,
115 DM646X_PTSOMUX_SERIAL,
116 DM646X_PTSIMUX_SERIAL,
119 enum davinci_dm355_index {
120 /* MMC/SD 0 */
121 DM355_MMCSD0,
123 /* MMC/SD 1 */
124 DM355_SD1_CLK,
125 DM355_SD1_CMD,
126 DM355_SD1_DATA3,
127 DM355_SD1_DATA2,
128 DM355_SD1_DATA1,
129 DM355_SD1_DATA0,
131 /* I2C */
132 DM355_I2C_SDA,
133 DM355_I2C_SCL,
135 /* ASP0 function */
136 DM355_MCBSP0_BDX,
137 DM355_MCBSP0_X,
138 DM355_MCBSP0_BFSX,
139 DM355_MCBSP0_BDR,
140 DM355_MCBSP0_R,
141 DM355_MCBSP0_BFSR,
143 /* SPI0 */
144 DM355_SPI0_SDI,
145 DM355_SPI0_SDENA0,
146 DM355_SPI0_SDENA1,
148 /* IRQ muxing */
149 DM355_INT_EDMA_CC,
150 DM355_INT_EDMA_TC0_ERR,
151 DM355_INT_EDMA_TC1_ERR,
153 /* EDMA event muxing */
154 DM355_EVT8_ASP1_TX,
155 DM355_EVT9_ASP1_RX,
156 DM355_EVT26_MMC0_RX,
158 /* Video Out */
159 DM355_VOUT_FIELD,
160 DM355_VOUT_FIELD_G70,
161 DM355_VOUT_HVSYNC,
162 DM355_VOUT_COUTL_EN,
163 DM355_VOUT_COUTH_EN,
165 /* Video In Pin Mux */
166 DM355_VIN_PCLK,
167 DM355_VIN_CAM_WEN,
168 DM355_VIN_CAM_VD,
169 DM355_VIN_CAM_HD,
170 DM355_VIN_YIN_EN,
171 DM355_VIN_CINL_EN,
172 DM355_VIN_CINH_EN,
175 enum davinci_dm365_index {
176 /* MMC/SD 0 */
177 DM365_MMCSD0,
179 /* MMC/SD 1 */
180 DM365_SD1_CLK,
181 DM365_SD1_CMD,
182 DM365_SD1_DATA3,
183 DM365_SD1_DATA2,
184 DM365_SD1_DATA1,
185 DM365_SD1_DATA0,
187 /* I2C */
188 DM365_I2C_SDA,
189 DM365_I2C_SCL,
191 /* AEMIF */
192 DM365_AEMIF_AR,
193 DM365_AEMIF_A3,
194 DM365_AEMIF_A7,
195 DM365_AEMIF_D15_8,
196 DM365_AEMIF_CE0,
198 /* ASP0 function */
199 DM365_MCBSP0_BDX,
200 DM365_MCBSP0_X,
201 DM365_MCBSP0_BFSX,
202 DM365_MCBSP0_BDR,
203 DM365_MCBSP0_R,
204 DM365_MCBSP0_BFSR,
206 /* SPI0 */
207 DM365_SPI0_SCLK,
208 DM365_SPI0_SDI,
209 DM365_SPI0_SDO,
210 DM365_SPI0_SDENA0,
211 DM365_SPI0_SDENA1,
213 /* UART */
214 DM365_UART0_RXD,
215 DM365_UART0_TXD,
216 DM365_UART1_RXD,
217 DM365_UART1_TXD,
218 DM365_UART1_RTS,
219 DM365_UART1_CTS,
221 /* EMAC */
222 DM365_EMAC_TX_EN,
223 DM365_EMAC_TX_CLK,
224 DM365_EMAC_COL,
225 DM365_EMAC_TXD3,
226 DM365_EMAC_TXD2,
227 DM365_EMAC_TXD1,
228 DM365_EMAC_TXD0,
229 DM365_EMAC_RXD3,
230 DM365_EMAC_RXD2,
231 DM365_EMAC_RXD1,
232 DM365_EMAC_RXD0,
233 DM365_EMAC_RX_CLK,
234 DM365_EMAC_RX_DV,
235 DM365_EMAC_RX_ER,
236 DM365_EMAC_CRS,
237 DM365_EMAC_MDIO,
238 DM365_EMAC_MDCLK,
240 /* Keypad */
241 DM365_KEYPAD,
243 /* PWM */
244 DM365_PWM0,
245 DM365_PWM0_G23,
246 DM365_PWM1,
247 DM365_PWM1_G25,
248 DM365_PWM2_G87,
249 DM365_PWM2_G88,
250 DM365_PWM2_G89,
251 DM365_PWM2_G90,
252 DM365_PWM3_G80,
253 DM365_PWM3_G81,
254 DM365_PWM3_G85,
255 DM365_PWM3_G86,
257 /* SPI1 */
258 DM365_SPI1_SCLK,
259 DM365_SPI1_SDO,
260 DM365_SPI1_SDI,
261 DM365_SPI1_SDENA0,
262 DM365_SPI1_SDENA1,
264 /* SPI2 */
265 DM365_SPI2_SCLK,
266 DM365_SPI2_SDO,
267 DM365_SPI2_SDI,
268 DM365_SPI2_SDENA0,
269 DM365_SPI2_SDENA1,
271 /* SPI3 */
272 DM365_SPI3_SCLK,
273 DM365_SPI3_SDO,
274 DM365_SPI3_SDI,
275 DM365_SPI3_SDENA0,
276 DM365_SPI3_SDENA1,
278 /* SPI4 */
279 DM365_SPI4_SCLK,
280 DM365_SPI4_SDO,
281 DM365_SPI4_SDI,
282 DM365_SPI4_SDENA0,
283 DM365_SPI4_SDENA1,
285 /* GPIO */
286 DM365_GPIO20,
287 DM365_GPIO33,
288 DM365_GPIO40,
290 /* Video */
291 DM365_VOUT_FIELD,
292 DM365_VOUT_FIELD_G81,
293 DM365_VOUT_HVSYNC,
294 DM365_VOUT_COUTL_EN,
295 DM365_VOUT_COUTH_EN,
296 DM365_VIN_CAM_WEN,
297 DM365_VIN_CAM_VD,
298 DM365_VIN_CAM_HD,
299 DM365_VIN_YIN4_7_EN,
300 DM365_VIN_YIN0_3_EN,
302 /* IRQ muxing */
303 DM365_INT_EDMA_CC,
304 DM365_INT_EDMA_TC0_ERR,
305 DM365_INT_EDMA_TC1_ERR,
306 DM365_INT_EDMA_TC2_ERR,
307 DM365_INT_EDMA_TC3_ERR,
308 DM365_INT_PRTCSS,
309 DM365_INT_EMAC_RXTHRESH,
310 DM365_INT_EMAC_RXPULSE,
311 DM365_INT_EMAC_TXPULSE,
312 DM365_INT_EMAC_MISCPULSE,
313 DM365_INT_IMX0_ENABLE,
314 DM365_INT_IMX0_DISABLE,
315 DM365_INT_HDVICP_ENABLE,
316 DM365_INT_HDVICP_DISABLE,
317 DM365_INT_IMX1_ENABLE,
318 DM365_INT_IMX1_DISABLE,
319 DM365_INT_NSF_ENABLE,
320 DM365_INT_NSF_DISABLE,
322 /* EDMA event muxing */
323 DM365_EVT2_ASP_TX,
324 DM365_EVT3_ASP_RX,
325 DM365_EVT26_MMC0_RX,
328 enum da830_index {
329 DA830_GPIO7_14,
330 DA830_RTCK,
331 DA830_GPIO7_15,
332 DA830_EMU_0,
333 DA830_EMB_SDCKE,
334 DA830_EMB_CLK_GLUE,
335 DA830_EMB_CLK,
336 DA830_NEMB_CS_0,
337 DA830_NEMB_CAS,
338 DA830_NEMB_RAS,
339 DA830_NEMB_WE,
340 DA830_EMB_BA_1,
341 DA830_EMB_BA_0,
342 DA830_EMB_A_0,
343 DA830_EMB_A_1,
344 DA830_EMB_A_2,
345 DA830_EMB_A_3,
346 DA830_EMB_A_4,
347 DA830_EMB_A_5,
348 DA830_GPIO7_0,
349 DA830_GPIO7_1,
350 DA830_GPIO7_2,
351 DA830_GPIO7_3,
352 DA830_GPIO7_4,
353 DA830_GPIO7_5,
354 DA830_GPIO7_6,
355 DA830_GPIO7_7,
356 DA830_EMB_A_6,
357 DA830_EMB_A_7,
358 DA830_EMB_A_8,
359 DA830_EMB_A_9,
360 DA830_EMB_A_10,
361 DA830_EMB_A_11,
362 DA830_EMB_A_12,
363 DA830_EMB_D_31,
364 DA830_GPIO7_8,
365 DA830_GPIO7_9,
366 DA830_GPIO7_10,
367 DA830_GPIO7_11,
368 DA830_GPIO7_12,
369 DA830_GPIO7_13,
370 DA830_GPIO3_13,
371 DA830_EMB_D_30,
372 DA830_EMB_D_29,
373 DA830_EMB_D_28,
374 DA830_EMB_D_27,
375 DA830_EMB_D_26,
376 DA830_EMB_D_25,
377 DA830_EMB_D_24,
378 DA830_EMB_D_23,
379 DA830_EMB_D_22,
380 DA830_EMB_D_21,
381 DA830_EMB_D_20,
382 DA830_EMB_D_19,
383 DA830_EMB_D_18,
384 DA830_EMB_D_17,
385 DA830_EMB_D_16,
386 DA830_NEMB_WE_DQM_3,
387 DA830_NEMB_WE_DQM_2,
388 DA830_EMB_D_0,
389 DA830_EMB_D_1,
390 DA830_EMB_D_2,
391 DA830_EMB_D_3,
392 DA830_EMB_D_4,
393 DA830_EMB_D_5,
394 DA830_EMB_D_6,
395 DA830_GPIO6_0,
396 DA830_GPIO6_1,
397 DA830_GPIO6_2,
398 DA830_GPIO6_3,
399 DA830_GPIO6_4,
400 DA830_GPIO6_5,
401 DA830_GPIO6_6,
402 DA830_EMB_D_7,
403 DA830_EMB_D_8,
404 DA830_EMB_D_9,
405 DA830_EMB_D_10,
406 DA830_EMB_D_11,
407 DA830_EMB_D_12,
408 DA830_EMB_D_13,
409 DA830_EMB_D_14,
410 DA830_GPIO6_7,
411 DA830_GPIO6_8,
412 DA830_GPIO6_9,
413 DA830_GPIO6_10,
414 DA830_GPIO6_11,
415 DA830_GPIO6_12,
416 DA830_GPIO6_13,
417 DA830_GPIO6_14,
418 DA830_EMB_D_15,
419 DA830_NEMB_WE_DQM_1,
420 DA830_NEMB_WE_DQM_0,
421 DA830_SPI0_SOMI_0,
422 DA830_SPI0_SIMO_0,
423 DA830_SPI0_CLK,
424 DA830_NSPI0_ENA,
425 DA830_NSPI0_SCS_0,
426 DA830_EQEP0I,
427 DA830_EQEP0S,
428 DA830_EQEP1I,
429 DA830_NUART0_CTS,
430 DA830_NUART0_RTS,
431 DA830_EQEP0A,
432 DA830_EQEP0B,
433 DA830_GPIO6_15,
434 DA830_GPIO5_14,
435 DA830_GPIO5_15,
436 DA830_GPIO5_0,
437 DA830_GPIO5_1,
438 DA830_GPIO5_2,
439 DA830_GPIO5_3,
440 DA830_GPIO5_4,
441 DA830_SPI1_SOMI_0,
442 DA830_SPI1_SIMO_0,
443 DA830_SPI1_CLK,
444 DA830_UART0_RXD,
445 DA830_UART0_TXD,
446 DA830_AXR1_10,
447 DA830_AXR1_11,
448 DA830_NSPI1_ENA,
449 DA830_I2C1_SCL,
450 DA830_I2C1_SDA,
451 DA830_EQEP1S,
452 DA830_I2C0_SDA,
453 DA830_I2C0_SCL,
454 DA830_UART2_RXD,
455 DA830_TM64P0_IN12,
456 DA830_TM64P0_OUT12,
457 DA830_GPIO5_5,
458 DA830_GPIO5_6,
459 DA830_GPIO5_7,
460 DA830_GPIO5_8,
461 DA830_GPIO5_9,
462 DA830_GPIO5_10,
463 DA830_GPIO5_11,
464 DA830_GPIO5_12,
465 DA830_NSPI1_SCS_0,
466 DA830_USB0_DRVVBUS,
467 DA830_AHCLKX0,
468 DA830_ACLKX0,
469 DA830_AFSX0,
470 DA830_AHCLKR0,
471 DA830_ACLKR0,
472 DA830_AFSR0,
473 DA830_UART2_TXD,
474 DA830_AHCLKX2,
475 DA830_ECAP0_APWM0,
476 DA830_RMII_MHZ_50_CLK,
477 DA830_ECAP1_APWM1,
478 DA830_USB_REFCLKIN,
479 DA830_GPIO5_13,
480 DA830_GPIO4_15,
481 DA830_GPIO2_11,
482 DA830_GPIO2_12,
483 DA830_GPIO2_13,
484 DA830_GPIO2_14,
485 DA830_GPIO2_15,
486 DA830_GPIO3_12,
487 DA830_AMUTE0,
488 DA830_AXR0_0,
489 DA830_AXR0_1,
490 DA830_AXR0_2,
491 DA830_AXR0_3,
492 DA830_AXR0_4,
493 DA830_AXR0_5,
494 DA830_AXR0_6,
495 DA830_RMII_TXD_0,
496 DA830_RMII_TXD_1,
497 DA830_RMII_TXEN,
498 DA830_RMII_CRS_DV,
499 DA830_RMII_RXD_0,
500 DA830_RMII_RXD_1,
501 DA830_RMII_RXER,
502 DA830_AFSR2,
503 DA830_ACLKX2,
504 DA830_AXR2_3,
505 DA830_AXR2_2,
506 DA830_AXR2_1,
507 DA830_AFSX2,
508 DA830_ACLKR2,
509 DA830_NRESETOUT,
510 DA830_GPIO3_0,
511 DA830_GPIO3_1,
512 DA830_GPIO3_2,
513 DA830_GPIO3_3,
514 DA830_GPIO3_4,
515 DA830_GPIO3_5,
516 DA830_GPIO3_6,
517 DA830_AXR0_7,
518 DA830_AXR0_8,
519 DA830_UART1_RXD,
520 DA830_UART1_TXD,
521 DA830_AXR0_11,
522 DA830_AHCLKX1,
523 DA830_ACLKX1,
524 DA830_AFSX1,
525 DA830_MDIO_CLK,
526 DA830_MDIO_D,
527 DA830_AXR0_9,
528 DA830_AXR0_10,
529 DA830_EPWM0B,
530 DA830_EPWM0A,
531 DA830_EPWMSYNCI,
532 DA830_AXR2_0,
533 DA830_EPWMSYNC0,
534 DA830_GPIO3_7,
535 DA830_GPIO3_8,
536 DA830_GPIO3_9,
537 DA830_GPIO3_10,
538 DA830_GPIO3_11,
539 DA830_GPIO3_14,
540 DA830_GPIO3_15,
541 DA830_GPIO4_10,
542 DA830_AHCLKR1,
543 DA830_ACLKR1,
544 DA830_AFSR1,
545 DA830_AMUTE1,
546 DA830_AXR1_0,
547 DA830_AXR1_1,
548 DA830_AXR1_2,
549 DA830_AXR1_3,
550 DA830_ECAP2_APWM2,
551 DA830_EHRPWMGLUETZ,
552 DA830_EQEP1A,
553 DA830_GPIO4_11,
554 DA830_GPIO4_12,
555 DA830_GPIO4_13,
556 DA830_GPIO4_14,
557 DA830_GPIO4_0,
558 DA830_GPIO4_1,
559 DA830_GPIO4_2,
560 DA830_GPIO4_3,
561 DA830_AXR1_4,
562 DA830_AXR1_5,
563 DA830_AXR1_6,
564 DA830_AXR1_7,
565 DA830_AXR1_8,
566 DA830_AXR1_9,
567 DA830_EMA_D_0,
568 DA830_EMA_D_1,
569 DA830_EQEP1B,
570 DA830_EPWM2B,
571 DA830_EPWM2A,
572 DA830_EPWM1B,
573 DA830_EPWM1A,
574 DA830_MMCSD_DAT_0,
575 DA830_MMCSD_DAT_1,
576 DA830_UHPI_HD_0,
577 DA830_UHPI_HD_1,
578 DA830_GPIO4_4,
579 DA830_GPIO4_5,
580 DA830_GPIO4_6,
581 DA830_GPIO4_7,
582 DA830_GPIO4_8,
583 DA830_GPIO4_9,
584 DA830_GPIO0_0,
585 DA830_GPIO0_1,
586 DA830_EMA_D_2,
587 DA830_EMA_D_3,
588 DA830_EMA_D_4,
589 DA830_EMA_D_5,
590 DA830_EMA_D_6,
591 DA830_EMA_D_7,
592 DA830_EMA_D_8,
593 DA830_EMA_D_9,
594 DA830_MMCSD_DAT_2,
595 DA830_MMCSD_DAT_3,
596 DA830_MMCSD_DAT_4,
597 DA830_MMCSD_DAT_5,
598 DA830_MMCSD_DAT_6,
599 DA830_MMCSD_DAT_7,
600 DA830_UHPI_HD_8,
601 DA830_UHPI_HD_9,
602 DA830_UHPI_HD_2,
603 DA830_UHPI_HD_3,
604 DA830_UHPI_HD_4,
605 DA830_UHPI_HD_5,
606 DA830_UHPI_HD_6,
607 DA830_UHPI_HD_7,
608 DA830_LCD_D_8,
609 DA830_LCD_D_9,
610 DA830_GPIO0_2,
611 DA830_GPIO0_3,
612 DA830_GPIO0_4,
613 DA830_GPIO0_5,
614 DA830_GPIO0_6,
615 DA830_GPIO0_7,
616 DA830_GPIO0_8,
617 DA830_GPIO0_9,
618 DA830_EMA_D_10,
619 DA830_EMA_D_11,
620 DA830_EMA_D_12,
621 DA830_EMA_D_13,
622 DA830_EMA_D_14,
623 DA830_EMA_D_15,
624 DA830_EMA_A_0,
625 DA830_EMA_A_1,
626 DA830_UHPI_HD_10,
627 DA830_UHPI_HD_11,
628 DA830_UHPI_HD_12,
629 DA830_UHPI_HD_13,
630 DA830_UHPI_HD_14,
631 DA830_UHPI_HD_15,
632 DA830_LCD_D_7,
633 DA830_MMCSD_CLK,
634 DA830_LCD_D_10,
635 DA830_LCD_D_11,
636 DA830_LCD_D_12,
637 DA830_LCD_D_13,
638 DA830_LCD_D_14,
639 DA830_LCD_D_15,
640 DA830_UHPI_HCNTL0,
641 DA830_GPIO0_10,
642 DA830_GPIO0_11,
643 DA830_GPIO0_12,
644 DA830_GPIO0_13,
645 DA830_GPIO0_14,
646 DA830_GPIO0_15,
647 DA830_GPIO1_0,
648 DA830_GPIO1_1,
649 DA830_EMA_A_2,
650 DA830_EMA_A_3,
651 DA830_EMA_A_4,
652 DA830_EMA_A_5,
653 DA830_EMA_A_6,
654 DA830_EMA_A_7,
655 DA830_EMA_A_8,
656 DA830_EMA_A_9,
657 DA830_MMCSD_CMD,
658 DA830_LCD_D_6,
659 DA830_LCD_D_3,
660 DA830_LCD_D_2,
661 DA830_LCD_D_1,
662 DA830_LCD_D_0,
663 DA830_LCD_PCLK,
664 DA830_LCD_HSYNC,
665 DA830_UHPI_HCNTL1,
666 DA830_GPIO1_2,
667 DA830_GPIO1_3,
668 DA830_GPIO1_4,
669 DA830_GPIO1_5,
670 DA830_GPIO1_6,
671 DA830_GPIO1_7,
672 DA830_GPIO1_8,
673 DA830_GPIO1_9,
674 DA830_EMA_A_10,
675 DA830_EMA_A_11,
676 DA830_EMA_A_12,
677 DA830_EMA_BA_1,
678 DA830_EMA_BA_0,
679 DA830_EMA_CLK,
680 DA830_EMA_SDCKE,
681 DA830_NEMA_CAS,
682 DA830_LCD_VSYNC,
683 DA830_NLCD_AC_ENB_CS,
684 DA830_LCD_MCLK,
685 DA830_LCD_D_5,
686 DA830_LCD_D_4,
687 DA830_OBSCLK,
688 DA830_NEMA_CS_4,
689 DA830_UHPI_HHWIL,
690 DA830_AHCLKR2,
691 DA830_GPIO1_10,
692 DA830_GPIO1_11,
693 DA830_GPIO1_12,
694 DA830_GPIO1_13,
695 DA830_GPIO1_14,
696 DA830_GPIO1_15,
697 DA830_GPIO2_0,
698 DA830_GPIO2_1,
699 DA830_NEMA_RAS,
700 DA830_NEMA_WE,
701 DA830_NEMA_CS_0,
702 DA830_NEMA_CS_2,
703 DA830_NEMA_CS_3,
704 DA830_NEMA_OE,
705 DA830_NEMA_WE_DQM_1,
706 DA830_NEMA_WE_DQM_0,
707 DA830_NEMA_CS_5,
708 DA830_UHPI_HRNW,
709 DA830_NUHPI_HAS,
710 DA830_NUHPI_HCS,
711 DA830_NUHPI_HDS1,
712 DA830_NUHPI_HDS2,
713 DA830_NUHPI_HINT,
714 DA830_AXR0_12,
715 DA830_AMUTE2,
716 DA830_AXR0_13,
717 DA830_AXR0_14,
718 DA830_AXR0_15,
719 DA830_GPIO2_2,
720 DA830_GPIO2_3,
721 DA830_GPIO2_4,
722 DA830_GPIO2_5,
723 DA830_GPIO2_6,
724 DA830_GPIO2_7,
725 DA830_GPIO2_8,
726 DA830_GPIO2_9,
727 DA830_EMA_WAIT_0,
728 DA830_NUHPI_HRDY,
729 DA830_GPIO2_10,
732 enum davinci_da850_index {
733 /* UART0 function */
734 DA850_NUART0_CTS,
735 DA850_NUART0_RTS,
736 DA850_UART0_RXD,
737 DA850_UART0_TXD,
739 /* UART1 function */
740 DA850_NUART1_CTS,
741 DA850_NUART1_RTS,
742 DA850_UART1_RXD,
743 DA850_UART1_TXD,
745 /* UART2 function */
746 DA850_NUART2_CTS,
747 DA850_NUART2_RTS,
748 DA850_UART2_RXD,
749 DA850_UART2_TXD,
751 /* I2C1 function */
752 DA850_I2C1_SCL,
753 DA850_I2C1_SDA,
755 /* I2C0 function */
756 DA850_I2C0_SDA,
757 DA850_I2C0_SCL,
759 /* EMAC function */
760 DA850_MII_TXEN,
761 DA850_MII_TXCLK,
762 DA850_MII_COL,
763 DA850_MII_TXD_3,
764 DA850_MII_TXD_2,
765 DA850_MII_TXD_1,
766 DA850_MII_TXD_0,
767 DA850_MII_RXER,
768 DA850_MII_CRS,
769 DA850_MII_RXCLK,
770 DA850_MII_RXDV,
771 DA850_MII_RXD_3,
772 DA850_MII_RXD_2,
773 DA850_MII_RXD_1,
774 DA850_MII_RXD_0,
775 DA850_MDIO_CLK,
776 DA850_MDIO_D,
778 /* McASP function */
779 DA850_ACLKR,
780 DA850_ACLKX,
781 DA850_AFSR,
782 DA850_AFSX,
783 DA850_AHCLKR,
784 DA850_AHCLKX,
785 DA850_AMUTE,
786 DA850_AXR_15,
787 DA850_AXR_14,
788 DA850_AXR_13,
789 DA850_AXR_12,
790 DA850_AXR_11,
791 DA850_AXR_10,
792 DA850_AXR_9,
793 DA850_AXR_8,
794 DA850_AXR_7,
795 DA850_AXR_6,
796 DA850_AXR_5,
797 DA850_AXR_4,
798 DA850_AXR_3,
799 DA850_AXR_2,
800 DA850_AXR_1,
801 DA850_AXR_0,
803 /* LCD function */
804 DA850_LCD_D_7,
805 DA850_LCD_D_6,
806 DA850_LCD_D_5,
807 DA850_LCD_D_4,
808 DA850_LCD_D_3,
809 DA850_LCD_D_2,
810 DA850_LCD_D_1,
811 DA850_LCD_D_0,
812 DA850_LCD_D_15,
813 DA850_LCD_D_14,
814 DA850_LCD_D_13,
815 DA850_LCD_D_12,
816 DA850_LCD_D_11,
817 DA850_LCD_D_10,
818 DA850_LCD_D_9,
819 DA850_LCD_D_8,
820 DA850_LCD_PCLK,
821 DA850_LCD_HSYNC,
822 DA850_LCD_VSYNC,
823 DA850_NLCD_AC_ENB_CS,
825 /* MMC/SD0 function */
826 DA850_MMCSD0_DAT_0,
827 DA850_MMCSD0_DAT_1,
828 DA850_MMCSD0_DAT_2,
829 DA850_MMCSD0_DAT_3,
830 DA850_MMCSD0_CLK,
831 DA850_MMCSD0_CMD,
833 /* EMIF2.5/EMIFA function */
834 DA850_EMA_D_7,
835 DA850_EMA_D_6,
836 DA850_EMA_D_5,
837 DA850_EMA_D_4,
838 DA850_EMA_D_3,
839 DA850_EMA_D_2,
840 DA850_EMA_D_1,
841 DA850_EMA_D_0,
842 DA850_EMA_A_1,
843 DA850_EMA_A_2,
844 DA850_NEMA_CS_3,
845 DA850_NEMA_CS_4,
846 DA850_NEMA_WE,
847 DA850_NEMA_OE,
848 DA850_EMA_D_15,
849 DA850_EMA_D_14,
850 DA850_EMA_D_13,
851 DA850_EMA_D_12,
852 DA850_EMA_D_11,
853 DA850_EMA_D_10,
854 DA850_EMA_D_9,
855 DA850_EMA_D_8,
856 DA850_EMA_A_0,
857 DA850_EMA_A_3,
858 DA850_EMA_A_4,
859 DA850_EMA_A_5,
860 DA850_EMA_A_6,
861 DA850_EMA_A_7,
862 DA850_EMA_A_8,
863 DA850_EMA_A_9,
864 DA850_EMA_A_10,
865 DA850_EMA_A_11,
866 DA850_EMA_A_12,
867 DA850_EMA_A_13,
868 DA850_EMA_A_14,
869 DA850_EMA_A_15,
870 DA850_EMA_A_16,
871 DA850_EMA_A_17,
872 DA850_EMA_A_18,
873 DA850_EMA_A_19,
874 DA850_EMA_A_20,
875 DA850_EMA_A_21,
876 DA850_EMA_A_22,
877 DA850_EMA_A_23,
878 DA850_EMA_BA_1,
879 DA850_EMA_CLK,
880 DA850_EMA_WAIT_1,
881 DA850_NEMA_CS_2,
883 /* GPIO function */
884 DA850_GPIO2_15,
885 DA850_GPIO8_10,
886 DA850_GPIO4_0,
887 DA850_GPIO4_1,
890 #ifdef CONFIG_DAVINCI_MUX
891 /* setup pin muxing */
892 extern int davinci_cfg_reg(unsigned long reg_cfg);
893 #else
894 /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
895 static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
896 #endif
898 #endif /* __INC_MACH_MUX_H */