drivers/usb/musb/omap2430.c

   1 /*
   2  * Copyright (C) 2005-2007 by Texas Instruments
   3  * Some code has been taken from tusb6010.c
   4  * Copyrights for that are attributable to:
   5  * Copyright (C) 2006 Nokia Corporation
   6  * Tony Lindgren <tony@atomide.com>
   7  *
   8  * This file is part of the Inventra Controller Driver for Linux.
   9  *
  10  * The Inventra Controller Driver for Linux is free software; you
  11  * can redistribute it and/or modify it under the terms of the GNU
  12  * General Public License version 2 as published by the Free Software
  13  * Foundation.
  14  *
  15  * The Inventra Controller Driver for Linux is distributed in
  16  * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17  * without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  19  * License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with The Inventra Controller Driver for Linux ; if not,
  23  * write to the Free Software Foundation, Inc., 59 Temple Place,
  24  * Suite 330, Boston, MA  02111-1307  USA
  25  *
  26  */
  27 #include <linux/module.h>
  28 #include <linux/kernel.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/init.h>
  32 #include <linux/list.h>
  33 #include <linux/clk.h>
  34 #include <linux/io.h>
  35
  36 #include <asm/mach-types.h>
  37 #include <mach/hardware.h>
  38 #include <plat/mux.h>
  39 #include <plat/board.h>
  40
  41 #include "musb_core.h"
  42 #include "omap2430.h"
  43
  44 #ifdef CONFIG_ARCH_OMAP3430
  45 #define get_cpu_rev()   2
  46 #endif
  47
  48 #define MUSB_TIMEOUT_A_WAIT_BCON        1100
  49
  50 static struct timer_list musb_idle_timer;
  51
  52 static void musb_do_idle(unsigned long _musb)
  53 {
  54         struct musb     *musb = (void *)_musb;
  55         unsigned long   flags;
  56 #ifdef CONFIG_USB_MUSB_HDRC_HCD
  57         u8      power;
  58 #endif
  59         u8      devctl;
  60
  61         spin_lock_irqsave(&musb->lock, flags);
  62
  63         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  64
  65         switch (musb->xceiv->state) {
  66         case OTG_STATE_A_WAIT_BCON:
  67                 devctl &= ~MUSB_DEVCTL_SESSION;
  68                 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  69
  70                 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  71                 if (devctl & MUSB_DEVCTL_BDEVICE) {
  72                         musb->xceiv->state = OTG_STATE_B_IDLE;
  73                         MUSB_DEV_MODE(musb);
  74                 } else {
  75                         musb->xceiv->state = OTG_STATE_A_IDLE;
  76                         MUSB_HST_MODE(musb);
  77                 }
  78                 break;
  79 #ifdef CONFIG_USB_MUSB_HDRC_HCD
  80         case OTG_STATE_A_SUSPEND:
  81                 /* finish RESUME signaling? */
  82                 if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  83                         power = musb_readb(musb->mregs, MUSB_POWER);
  84                         power &= ~MUSB_POWER_RESUME;
  85                         DBG(1, "root port resume stopped, power %02x\n", power);
  86                         musb_writeb(musb->mregs, MUSB_POWER, power);
  87                         musb->is_active = 1;
  88                         musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  89                                                 | MUSB_PORT_STAT_RESUME);
  90                         musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  91                         usb_hcd_poll_rh_status(musb_to_hcd(musb));
  92                         /* NOTE: it might really be A_WAIT_BCON ... */
  93                         musb->xceiv->state = OTG_STATE_A_HOST;
  94                 }
  95                 break;
  96 #endif
  97 #ifdef CONFIG_USB_MUSB_HDRC_HCD
  98         case OTG_STATE_A_HOST:
  99                 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
 100                 if (devctl &  MUSB_DEVCTL_BDEVICE)
 101                         musb->xceiv->state = OTG_STATE_B_IDLE;
 102                 else
 103                         musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
 104 #endif
 105         default:
 106                 break;
 107         }
 108         spin_unlock_irqrestore(&musb->lock, flags);
 109 }
 110
 111
 112 void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
 113 {
 114         unsigned long           default_timeout = jiffies + msecs_to_jiffies(3);
 115         static unsigned long    last_timer;
 116
 117         if (timeout == 0)
 118                 timeout = default_timeout;
 119
 120         /* Never idle if active, or when VBUS timeout is not set as host */
 121         if (musb->is_active || ((musb->a_wait_bcon == 0)
 122                         && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
 123                 DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
 124                 del_timer(&musb_idle_timer);
 125                 last_timer = jiffies;
 126                 return;
 127         }
 128
 129         if (time_after(last_timer, timeout)) {
 130                 if (!timer_pending(&musb_idle_timer))
 131                         last_timer = timeout;
 132                 else {
 133                         DBG(4, "Longer idle timer already pending, ignoring\n");
 134                         return;
 135                 }
 136         }
 137         last_timer = timeout;
 138
 139         DBG(4, "%s inactive, for idle timer for %lu ms\n",
 140                 otg_state_string(musb),
 141                 (unsigned long)jiffies_to_msecs(timeout - jiffies));
 142         mod_timer(&musb_idle_timer, timeout);
 143 }
 144
 145 void musb_platform_enable(struct musb *musb)
 146 {
 147 }
 148 void musb_platform_disable(struct musb *musb)
 149 {
 150 }
 151 static void omap_vbus_power(struct musb *musb, int is_on, int sleeping)
 152 {
 153 }
 154
 155 static void omap_set_vbus(struct musb *musb, int is_on)
 156 {
 157         u8              devctl;
 158         /* HDRC controls CPEN, but beware current surges during device
 159          * connect.  They can trigger transient overcurrent conditions
 160          * that must be ignored.
 161          */
 162
 163         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
 164
 165         if (is_on) {
 166                 musb->is_active = 1;
 167                 musb->xceiv->default_a = 1;
 168                 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 169                 devctl |= MUSB_DEVCTL_SESSION;
 170
 171                 MUSB_HST_MODE(musb);
 172         } else {
 173                 musb->is_active = 0;
 174
 175                 /* NOTE:  we're skipping A_WAIT_VFALL -> A_IDLE and
 176                  * jumping right to B_IDLE...
 177                  */
 178
 179                 musb->xceiv->default_a = 0;
 180                 musb->xceiv->state = OTG_STATE_B_IDLE;
 181                 devctl &= ~MUSB_DEVCTL_SESSION;
 182
 183                 MUSB_DEV_MODE(musb);
 184         }
 185         musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
 186
 187         DBG(1, "VBUS %s, devctl %02x "
 188                 /* otg %3x conf %08x prcm %08x */ "\n",
 189                 otg_state_string(musb),
 190                 musb_readb(musb->mregs, MUSB_DEVCTL));
 191 }
 192
 193 static int musb_platform_resume(struct musb *musb);
 194
 195 int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
 196 {
 197         u8      devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
 198
 199         devctl |= MUSB_DEVCTL_SESSION;
 200         musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
 201
 202         return 0;
 203 }
 204
 205 int __init musb_platform_init(struct musb *musb)
 206 {
 207         u32 l;
 208         u8 val;
 209
 210 #if defined(CONFIG_ARCH_OMAP2430)
 211         omap_cfg_reg(AE5_2430_USB0HS_STP);
 212 #endif
 213
 214         /* We require some kind of external transceiver, hooked
 215          * up through ULPI.  TWL4030-family PMICs include one,
 216          * which needs a driver, drivers aren't always needed.
 217          */
 218         musb->xceiv = otg_get_transceiver();
 219         if (!musb->xceiv) {
 220                 pr_err("HS USB OTG: no transceiver configured\n");
 221                 return -ENODEV;
 222         }
 223
 224         musb_platform_resume(musb);
 225
 226         l = omap_readl(OTG_SYSCONFIG);
 227         l &= ~ENABLEWAKEUP;     /* disable wakeup */
 228         l &= ~NOSTDBY;          /* remove possible nostdby */
 229         l |= SMARTSTDBY;        /* enable smart standby */
 230         l &= ~AUTOIDLE;         /* disable auto idle */
 231         l &= ~NOIDLE;           /* remove possible noidle */
 232         l |= SMARTIDLE;         /* enable smart idle */
 233         /*
 234          * MUSB AUTOIDLE don't work in 3430.
 235          * Workaround by Richard Woodruff/TI
 236          */
 237         if (!cpu_is_omap3430())
 238                 l |= AUTOIDLE;          /* enable auto idle */
 239         omap_writel(l, OTG_SYSCONFIG);
 240
 241         l = omap_readl(OTG_INTERFSEL);
 242         l |= ULPI_12PIN;
 243         omap_writel(l, OTG_INTERFSEL);
 244
 245         /* Program PHY to use external Vbus supply for OMAP3EVM Rev >= E */
 246         if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
 247                 val = musb_readb(musb->mregs, MUSB_ULPI_BUSCONTROL);
 248                 val |= ULPI_USE_EXTVBUS;
 249                 musb_writeb(musb->mregs, MUSB_ULPI_BUSCONTROL, val);
 250         }
 251
 252         pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
 253                         "sysstatus 0x%x, intrfsel 0x%x, simenable  0x%x\n",
 254                         omap_readl(OTG_REVISION), omap_readl(OTG_SYSCONFIG),
 255                         omap_readl(OTG_SYSSTATUS), omap_readl(OTG_INTERFSEL),
 256                         omap_readl(OTG_SIMENABLE));
 257
 258         omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
 259
 260         if (is_host_enabled(musb))
 261                 musb->board_set_vbus = omap_set_vbus;
 262         musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON;
 263
 264         setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
 265
 266         return 0;
 267 }
 268
 269 #ifdef CONFIG_PM
 270 void musb_platform_save_context(struct musb_context_registers
 271                 *musb_context)
 272 {
 273         musb_context->otg_sysconfig = omap_readl(OTG_SYSCONFIG);
 274         musb_context->otg_forcestandby = omap_readl(OTG_FORCESTDBY);
 275 }
 276
 277 void musb_platform_restore_context(struct musb_context_registers
 278                 *musb_context)
 279 {
 280         omap_writel(musb_context->otg_sysconfig, OTG_SYSCONFIG);
 281         omap_writel(musb_context->otg_forcestandby, OTG_FORCESTDBY);
 282 }
 283 #endif
 284
 285 int musb_platform_suspend(struct musb *musb)
 286 {
 287         u32 l;
 288
 289         if (!musb->clock)
 290                 return 0;
 291
 292         /* in any role */
 293         l = omap_readl(OTG_FORCESTDBY);
 294         l |= ENABLEFORCE;       /* enable MSTANDBY */
 295         omap_writel(l, OTG_FORCESTDBY);
 296
 297         l = omap_readl(OTG_SYSCONFIG);
 298         l |= ENABLEWAKEUP;      /* enable wakeup */
 299         omap_writel(l, OTG_SYSCONFIG);
 300
 301         otg_set_suspend(musb->xceiv, 1);
 302
 303         if (musb->set_clock)
 304                 musb->set_clock(musb->clock, 0);
 305         else
 306                 clk_disable(musb->clock);
 307
 308         return 0;
 309 }
 310
 311 static int musb_platform_resume(struct musb *musb)
 312 {
 313         u32 l;
 314
 315         if (!musb->clock)
 316                 return 0;
 317
 318         otg_set_suspend(musb->xceiv, 0);
 319
 320         if (musb->set_clock)
 321                 musb->set_clock(musb->clock, 1);
 322         else
 323                 clk_enable(musb->clock);
 324
 325         l = omap_readl(OTG_SYSCONFIG);
 326         l &= ~ENABLEWAKEUP;     /* disable wakeup */
 327         omap_writel(l, OTG_SYSCONFIG);
 328
 329         l = omap_readl(OTG_FORCESTDBY);
 330         l &= ~ENABLEFORCE;      /* disable MSTANDBY */
 331         omap_writel(l, OTG_FORCESTDBY);
 332
 333         return 0;
 334 }
 335
 336
 337 int musb_platform_exit(struct musb *musb)
 338 {
 339
 340         omap_vbus_power(musb, 0 /*off*/, 1);
 341
 342         musb_platform_suspend(musb);
 343
 344         clk_put(musb->clock);
 345         musb->clock = 0;
 346
 347         return 0;
 348 }