include/asm-x86_64/apic.h

   1 #ifndef __ASM_APIC_H
   2 #define __ASM_APIC_H
   3
   4 #include <linux/config.h>
   5 #include <linux/pm.h>
   6 #include <asm/fixmap.h>
   7 #include <asm/apicdef.h>
   8 #include <asm/system.h>
   9
  10 #define Dprintk(x...)
  11
  12 /*
  13  * Debugging macros
  14  */
  15 #define APIC_QUIET   0
  16 #define APIC_VERBOSE 1
  17 #define APIC_DEBUG   2
  18
  19 extern int apic_verbosity;
  20
  21 /*
  22  * Define the default level of output to be very little
  23  * This can be turned up by using apic=verbose for more
  24  * information and apic=debug for _lots_ of information.
  25  * apic_verbosity is defined in apic.c
  26  */
  27 #define apic_printk(v, s, a...) do {       \
  28                 if ((v) <= apic_verbosity) \
  29                         printk(s, ##a);    \
  30         } while (0)
  31
  32 #ifdef CONFIG_X86_LOCAL_APIC
  33
  34 struct pt_regs;
  35
  36 /*
  37  * Basic functions accessing APICs.
  38  */
  39
  40 static __inline void apic_write(unsigned long reg, unsigned int v)
  41 {
  42         *((volatile unsigned int *)(APIC_BASE+reg)) = v;
  43 }
  44
  45 static __inline void apic_write_atomic(unsigned long reg, unsigned int v)
  46 {
  47         xchg((volatile unsigned int *)(APIC_BASE+reg), v);
  48 }
  49
  50 static __inline unsigned int apic_read(unsigned long reg)
  51 {
  52         return *((volatile unsigned int *)(APIC_BASE+reg));
  53 }
  54
  55 static __inline__ void apic_wait_icr_idle(void)
  56 {
  57         while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
  58 }
  59
  60 #define FORCE_READ_AROUND_WRITE 0
  61 #define apic_read_around(x)
  62 #define apic_write_around(x,y) apic_write((x),(y))
  63
  64 static inline void ack_APIC_irq(void)
  65 {
  66         /*
  67          * ack_APIC_irq() actually gets compiled as a single instruction:
  68          * - a single rmw on Pentium/82489DX
  69          * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
  70          * ... yummie.
  71          */
  72
  73         /* Docs say use 0 for future compatibility */
  74         apic_write_around(APIC_EOI, 0);
  75 }
  76
  77 extern int get_maxlvt (void);
  78 extern void clear_local_APIC (void);
  79 extern void connect_bsp_APIC (void);
  80 extern void disconnect_bsp_APIC (int virt_wire_setup);
  81 extern void disable_local_APIC (void);
  82 extern int verify_local_APIC (void);
  83 extern void cache_APIC_registers (void);
  84 extern void sync_Arb_IDs (void);
  85 extern void init_bsp_APIC (void);
  86 extern void setup_local_APIC (void);
  87 extern void init_apic_mappings (void);
  88 extern void smp_local_timer_interrupt (struct pt_regs * regs);
  89 extern void setup_boot_APIC_clock (void);
  90 extern void setup_secondary_APIC_clock (void);
  91 extern void setup_apic_nmi_watchdog (void);
  92 extern int reserve_lapic_nmi(void);
  93 extern void release_lapic_nmi(void);
  94 extern void disable_timer_nmi_watchdog(void);
  95 extern void enable_timer_nmi_watchdog(void);
  96 extern void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason);
  97 extern int APIC_init_uniprocessor (void);
  98 extern void disable_APIC_timer(void);
  99 extern void enable_APIC_timer(void);
 100 extern void clustered_apic_check(void);
 101
 102 extern void nmi_watchdog_default(void);
 103 extern int setup_nmi_watchdog(char *);
 104
 105 extern unsigned int nmi_watchdog;
 106 #define NMI_DEFAULT     -1
 107 #define NMI_NONE        0
 108 #define NMI_IO_APIC     1
 109 #define NMI_LOCAL_APIC  2
 110 #define NMI_INVALID     3
 111
 112 #endif /* CONFIG_X86_LOCAL_APIC */
 113
 114 #define esr_disable 0
 115 extern unsigned boot_cpu_id;
 116
 117 #endif /* __ASM_APIC_H */