| commit | 3f216a3b5cb4e6c16df1a6a2569ad188ecd48b1b | |
| author | Paul Walmsley <paul@pwsan.com> | |
| Mon, 15 Jun 2009 08:00:42 +0000 (15 02:00 -0600) | ||
| committer | Tony Lindgren <tony@atomide.com> | |
| Mon, 15 Jun 2009 09:47:53 +0000 (15 12:47 +0300) | ||
| tree | 217206b7b4751b6644e3cbe91cfff8e4df861e48 | treesnapshot (tar.gz zip) |
| parent | cd07ecc828486e5887113c7dc4d9f9022145811b | commitdiff |
OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize
The original CDP kernel that this code comes from waited for 0x800
loops after switching the CORE DPLL M2 divider. This does not appear
to be necessary.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The original CDP kernel that this code comes from waited for 0x800
loops after switching the CORE DPLL M2 divider. This does not appear
to be necessary.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
| arch/arm/mach-omap2/sram34xx.S | diffblobblamehistory |