1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
7 #include <linux/clk-provider.h>
15 unsigned long n
, min_n
, max_n
;
16 unsigned long m
, min_m
, max_m
;
19 static unsigned long ccu_nm_calc_rate(unsigned long parent
,
20 unsigned long n
, unsigned long m
)
30 static unsigned long ccu_nm_find_best(struct ccu_common
*common
, unsigned long parent
,
31 unsigned long rate
, struct _ccu_nm
*nm
)
33 unsigned long best_rate
= 0;
34 unsigned long best_n
= 0, best_m
= 0;
37 for (_n
= nm
->min_n
; _n
<= nm
->max_n
; _n
++) {
38 for (_m
= nm
->min_m
; _m
<= nm
->max_m
; _m
++) {
39 unsigned long tmp_rate
= ccu_nm_calc_rate(parent
,
42 if (ccu_is_better_rate(common
, rate
, tmp_rate
, best_rate
)) {
56 static void ccu_nm_disable(struct clk_hw
*hw
)
58 struct ccu_nm
*nm
= hw_to_ccu_nm(hw
);
60 return ccu_gate_helper_disable(&nm
->common
, nm
->enable
);
63 static int ccu_nm_enable(struct clk_hw
*hw
)
65 struct ccu_nm
*nm
= hw_to_ccu_nm(hw
);
67 return ccu_gate_helper_enable(&nm
->common
, nm
->enable
);
70 static int ccu_nm_is_enabled(struct clk_hw
*hw
)
72 struct ccu_nm
*nm
= hw_to_ccu_nm(hw
);
74 return ccu_gate_helper_is_enabled(&nm
->common
, nm
->enable
);
77 static unsigned long ccu_nm_recalc_rate(struct clk_hw
*hw
,
78 unsigned long parent_rate
)
80 struct ccu_nm
*nm
= hw_to_ccu_nm(hw
);
85 if (ccu_frac_helper_is_enabled(&nm
->common
, &nm
->frac
)) {
86 rate
= ccu_frac_helper_read_rate(&nm
->common
, &nm
->frac
);
88 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
89 rate
/= nm
->fixed_post_div
;
94 reg
= readl(nm
->common
.base
+ nm
->common
.reg
);
96 n
= reg
>> nm
->n
.shift
;
97 n
&= (1 << nm
->n
.width
) - 1;
102 m
= reg
>> nm
->m
.shift
;
103 m
&= (1 << nm
->m
.width
) - 1;
108 if (ccu_sdm_helper_is_enabled(&nm
->common
, &nm
->sdm
))
109 rate
= ccu_sdm_helper_read_rate(&nm
->common
, &nm
->sdm
, m
, n
);
111 rate
= ccu_nm_calc_rate(parent_rate
, n
, m
);
113 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
114 rate
/= nm
->fixed_post_div
;
119 static long ccu_nm_round_rate(struct clk_hw
*hw
, unsigned long rate
,
120 unsigned long *parent_rate
)
122 struct ccu_nm
*nm
= hw_to_ccu_nm(hw
);
125 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
126 rate
*= nm
->fixed_post_div
;
128 if (rate
< nm
->min_rate
) {
130 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
131 rate
/= nm
->fixed_post_div
;
135 if (nm
->max_rate
&& rate
> nm
->max_rate
) {
137 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
138 rate
/= nm
->fixed_post_div
;
142 if (ccu_frac_helper_has_rate(&nm
->common
, &nm
->frac
, rate
)) {
143 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
144 rate
/= nm
->fixed_post_div
;
148 if (ccu_sdm_helper_has_rate(&nm
->common
, &nm
->sdm
, rate
)) {
149 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
150 rate
/= nm
->fixed_post_div
;
154 _nm
.min_n
= nm
->n
.min
?: 1;
155 _nm
.max_n
= nm
->n
.max
?: 1 << nm
->n
.width
;
157 _nm
.max_m
= nm
->m
.max
?: 1 << nm
->m
.width
;
159 rate
= ccu_nm_find_best(&nm
->common
, *parent_rate
, rate
, &_nm
);
161 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
162 rate
/= nm
->fixed_post_div
;
167 static int ccu_nm_set_rate(struct clk_hw
*hw
, unsigned long rate
,
168 unsigned long parent_rate
)
170 struct ccu_nm
*nm
= hw_to_ccu_nm(hw
);
175 /* Adjust target rate according to post-dividers */
176 if (nm
->common
.features
& CCU_FEATURE_FIXED_POSTDIV
)
177 rate
= rate
* nm
->fixed_post_div
;
179 if (ccu_frac_helper_has_rate(&nm
->common
, &nm
->frac
, rate
)) {
180 spin_lock_irqsave(nm
->common
.lock
, flags
);
182 /* most SoCs require M to be 0 if fractional mode is used */
183 reg
= readl(nm
->common
.base
+ nm
->common
.reg
);
184 reg
&= ~GENMASK(nm
->m
.width
+ nm
->m
.shift
- 1, nm
->m
.shift
);
185 writel(reg
, nm
->common
.base
+ nm
->common
.reg
);
187 spin_unlock_irqrestore(nm
->common
.lock
, flags
);
189 ccu_frac_helper_enable(&nm
->common
, &nm
->frac
);
191 return ccu_frac_helper_set_rate(&nm
->common
, &nm
->frac
,
194 ccu_frac_helper_disable(&nm
->common
, &nm
->frac
);
197 _nm
.min_n
= nm
->n
.min
?: 1;
198 _nm
.max_n
= nm
->n
.max
?: 1 << nm
->n
.width
;
200 _nm
.max_m
= nm
->m
.max
?: 1 << nm
->m
.width
;
202 if (ccu_sdm_helper_has_rate(&nm
->common
, &nm
->sdm
, rate
)) {
203 ccu_sdm_helper_enable(&nm
->common
, &nm
->sdm
, rate
);
205 /* Sigma delta modulation requires specific N and M factors */
206 ccu_sdm_helper_get_factors(&nm
->common
, &nm
->sdm
, rate
,
209 ccu_sdm_helper_disable(&nm
->common
, &nm
->sdm
);
210 ccu_nm_find_best(&nm
->common
, parent_rate
, rate
, &_nm
);
213 spin_lock_irqsave(nm
->common
.lock
, flags
);
215 reg
= readl(nm
->common
.base
+ nm
->common
.reg
);
216 reg
&= ~GENMASK(nm
->n
.width
+ nm
->n
.shift
- 1, nm
->n
.shift
);
217 reg
&= ~GENMASK(nm
->m
.width
+ nm
->m
.shift
- 1, nm
->m
.shift
);
219 reg
|= (_nm
.n
- nm
->n
.offset
) << nm
->n
.shift
;
220 reg
|= (_nm
.m
- nm
->m
.offset
) << nm
->m
.shift
;
221 writel(reg
, nm
->common
.base
+ nm
->common
.reg
);
223 spin_unlock_irqrestore(nm
->common
.lock
, flags
);
225 ccu_helper_wait_for_lock(&nm
->common
, nm
->lock
);
230 const struct clk_ops ccu_nm_ops
= {
231 .disable
= ccu_nm_disable
,
232 .enable
= ccu_nm_enable
,
233 .is_enabled
= ccu_nm_is_enabled
,
235 .recalc_rate
= ccu_nm_recalc_rate
,
236 .round_rate
= ccu_nm_round_rate
,
237 .set_rate
= ccu_nm_set_rate
,
239 EXPORT_SYMBOL_NS_GPL(ccu_nm_ops
, "SUNXI_CCU");