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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux.git] / drivers / iio / imu / inv_mpu6050 / inv_mpu_core.c
blob844b611b825a961375193b726e9722c7a0d0887f
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Invensense, Inc.
4 */
5
6 #include <linux/module.h>
7 #include <linux/slab.h>
8 #include <linux/i2c.h>
9 #include <linux/err.h>
10 #include <linux/delay.h>
11 #include <linux/sysfs.h>
12 #include <linux/jiffies.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
15 #include <linux/acpi.h>
16 #include <linux/platform_device.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/math64.h>
19 #include <linux/minmax.h>
20 #include <linux/pm.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/property.h>
23
24 #include <linux/iio/common/inv_sensors_timestamp.h>
25 #include <linux/iio/iio.h>
26
27 #include "inv_mpu_iio.h"
28 #include "inv_mpu_magn.h"
29
30 /*
31 * this is the gyro scale translated from dynamic range plus/minus
32 * {250, 500, 1000, 2000} to rad/s
33 */
34 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
35
36 /*
37 * this is the accel scale translated from dynamic range plus/minus
38 * {2, 4, 8, 16} to m/s^2
39 */
40 static const int accel_scale[] = {598, 1196, 2392, 4785};
41
42 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
43 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
44 .lpf = INV_MPU6050_REG_CONFIG,
45 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
46 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
47 .fifo_en = INV_MPU6050_REG_FIFO_EN,
48 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
49 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
50 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
51 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
52 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
53 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
54 .temperature = INV_MPU6050_REG_TEMPERATURE,
55 .int_enable = INV_MPU6050_REG_INT_ENABLE,
56 .int_status = INV_MPU6050_REG_INT_STATUS,
57 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
58 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
59 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
60 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
61 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
62 .i2c_if = INV_ICM20602_REG_I2C_IF,
63 };
64
65 static const struct inv_mpu6050_reg_map reg_set_6500 = {
66 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
67 .lpf = INV_MPU6050_REG_CONFIG,
68 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
69 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
70 .fifo_en = INV_MPU6050_REG_FIFO_EN,
71 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
72 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
73 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
74 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
75 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
76 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
77 .temperature = INV_MPU6050_REG_TEMPERATURE,
78 .int_enable = INV_MPU6050_REG_INT_ENABLE,
79 .int_status = INV_MPU6050_REG_INT_STATUS,
80 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
81 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
82 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
83 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
84 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
85 .i2c_if = 0,
86 };
87
88 static const struct inv_mpu6050_reg_map reg_set_6050 = {
89 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
90 .lpf = INV_MPU6050_REG_CONFIG,
91 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
92 .fifo_en = INV_MPU6050_REG_FIFO_EN,
93 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
94 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
95 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
96 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
97 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
98 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
99 .temperature = INV_MPU6050_REG_TEMPERATURE,
100 .int_enable = INV_MPU6050_REG_INT_ENABLE,
101 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
102 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
103 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
104 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
105 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
106 .i2c_if = 0,
107 };
108
109 static const struct inv_mpu6050_chip_config chip_config_6050 = {
110 .clk = INV_CLK_INTERNAL,
111 .fsr = INV_MPU6050_FSR_2000DPS,
112 .lpf = INV_MPU6050_FILTER_20HZ,
113 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
114 .gyro_en = true,
115 .accl_en = true,
116 .temp_en = true,
117 .magn_en = false,
118 .gyro_fifo_enable = false,
119 .accl_fifo_enable = false,
120 .temp_fifo_enable = false,
121 .magn_fifo_enable = false,
122 .accl_fs = INV_MPU6050_FS_02G,
123 .user_ctrl = 0,
124 };
125
126 static const struct inv_mpu6050_chip_config chip_config_6500 = {
127 .clk = INV_CLK_PLL,
128 .fsr = INV_MPU6050_FSR_2000DPS,
129 .lpf = INV_MPU6050_FILTER_20HZ,
130 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
131 .gyro_en = true,
132 .accl_en = true,
133 .temp_en = true,
134 .magn_en = false,
135 .gyro_fifo_enable = false,
136 .accl_fifo_enable = false,
137 .temp_fifo_enable = false,
138 .magn_fifo_enable = false,
139 .accl_fs = INV_MPU6050_FS_02G,
140 .user_ctrl = 0,
141 };
142
143 /* Indexed by enum inv_devices */
144 static const struct inv_mpu6050_hw hw_info[] = {
145 {
146 .whoami = INV_MPU6050_WHOAMI_VALUE,
147 .name = "MPU6050",
148 .reg = &reg_set_6050,
149 .config = &chip_config_6050,
150 .fifo_size = 1024,
151 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
152 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
153 },
154 {
155 .whoami = INV_MPU6500_WHOAMI_VALUE,
156 .name = "MPU6500",
157 .reg = &reg_set_6500,
158 .config = &chip_config_6500,
159 .fifo_size = 512,
160 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
161 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
162 },
163 {
164 .whoami = INV_MPU6515_WHOAMI_VALUE,
165 .name = "MPU6515",
166 .reg = &reg_set_6500,
167 .config = &chip_config_6500,
168 .fifo_size = 512,
169 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
170 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
171 },
172 {
173 .whoami = INV_MPU6880_WHOAMI_VALUE,
174 .name = "MPU6880",
175 .reg = &reg_set_6500,
176 .config = &chip_config_6500,
177 .fifo_size = 4096,
178 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
179 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
180 },
181 {
182 .whoami = INV_MPU6000_WHOAMI_VALUE,
183 .name = "MPU6000",
184 .reg = &reg_set_6050,
185 .config = &chip_config_6050,
186 .fifo_size = 1024,
187 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
188 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
189 },
190 {
191 .whoami = INV_MPU9150_WHOAMI_VALUE,
192 .name = "MPU9150",
193 .reg = &reg_set_6050,
194 .config = &chip_config_6050,
195 .fifo_size = 1024,
196 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
197 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
198 },
199 {
200 .whoami = INV_MPU9250_WHOAMI_VALUE,
201 .name = "MPU9250",
202 .reg = &reg_set_6500,
203 .config = &chip_config_6500,
204 .fifo_size = 512,
205 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
206 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
207 },
208 {
209 .whoami = INV_MPU9255_WHOAMI_VALUE,
210 .name = "MPU9255",
211 .reg = &reg_set_6500,
212 .config = &chip_config_6500,
213 .fifo_size = 512,
214 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
215 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
216 },
217 {
218 .whoami = INV_ICM20608_WHOAMI_VALUE,
219 .name = "ICM20608",
220 .reg = &reg_set_6500,
221 .config = &chip_config_6500,
222 .fifo_size = 512,
223 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
224 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
225 },
226 {
227 .whoami = INV_ICM20608D_WHOAMI_VALUE,
228 .name = "ICM20608D",
229 .reg = &reg_set_6500,
230 .config = &chip_config_6500,
231 .fifo_size = 512,
232 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
233 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
234 },
235 {
236 .whoami = INV_ICM20609_WHOAMI_VALUE,
237 .name = "ICM20609",
238 .reg = &reg_set_6500,
239 .config = &chip_config_6500,
240 .fifo_size = 4 * 1024,
241 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
242 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
243 },
244 {
245 .whoami = INV_ICM20689_WHOAMI_VALUE,
246 .name = "ICM20689",
247 .reg = &reg_set_6500,
248 .config = &chip_config_6500,
249 .fifo_size = 4 * 1024,
250 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
251 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
252 },
253 {
254 .whoami = INV_ICM20600_WHOAMI_VALUE,
255 .name = "ICM20600",
256 .reg = &reg_set_icm20602,
257 .config = &chip_config_6500,
258 .fifo_size = 1008,
259 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
260 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
261 },
262 {
263 .whoami = INV_ICM20602_WHOAMI_VALUE,
264 .name = "ICM20602",
265 .reg = &reg_set_icm20602,
266 .config = &chip_config_6500,
267 .fifo_size = 1008,
268 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
269 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
270 },
271 {
272 .whoami = INV_ICM20690_WHOAMI_VALUE,
273 .name = "ICM20690",
274 .reg = &reg_set_6500,
275 .config = &chip_config_6500,
276 .fifo_size = 1024,
277 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
278 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME},
279 },
280 {
281 .whoami = INV_IAM20680_WHOAMI_VALUE,
282 .name = "IAM20680",
283 .reg = &reg_set_6500,
284 .config = &chip_config_6500,
285 .fifo_size = 512,
286 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
287 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
288 },
289 {
290 .whoami = INV_IAM20680HP_WHOAMI_VALUE,
291 .name = "IAM20680HP",
292 .reg = &reg_set_6500,
293 .config = &chip_config_6500,
294 .fifo_size = 4 * 1024,
295 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
296 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
297 },
298 {
299 .whoami = INV_IAM20680HT_WHOAMI_VALUE,
300 .name = "IAM20680HT",
301 .reg = &reg_set_6500,
302 .config = &chip_config_6500,
303 .fifo_size = 4 * 1024,
304 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
305 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
306 },
307 };
308
309 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep,
310 bool cycle, int clock, int temp_dis)
311 {
312 u8 val;
313
314 if (clock < 0)
315 clock = st->chip_config.clk;
316 if (temp_dis < 0)
317 temp_dis = !st->chip_config.temp_en;
318
319 val = clock & INV_MPU6050_BIT_CLK_MASK;
320 if (temp_dis)
321 val |= INV_MPU6050_BIT_TEMP_DIS;
322 if (sleep)
323 val |= INV_MPU6050_BIT_SLEEP;
324 if (cycle)
325 val |= INV_MPU6050_BIT_CYCLE;
326
327 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val);
328 return regmap_write(st->map, st->reg->pwr_mgmt_1, val);
329 }
330
331 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st,
332 unsigned int clock)
333 {
334 int ret;
335
336 switch (st->chip_type) {
337 case INV_MPU6050:
338 case INV_MPU6000:
339 case INV_MPU9150:
340 /* old chips: switch clock manually */
341 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, clock, -1);
342 if (ret)
343 return ret;
344 st->chip_config.clk = clock;
345 break;
346 default:
347 /* automatic clock switching, nothing to do */
348 break;
349 }
350
351 return 0;
352 }
353
354 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en,
355 unsigned int mask)
356 {
357 unsigned int sleep, val;
358 u8 pwr_mgmt2, user_ctrl;
359 int ret;
360
361 /* delete useless requests */
362 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en)
363 mask &= ~INV_MPU6050_SENSOR_ACCL;
364 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en)
365 mask &= ~INV_MPU6050_SENSOR_GYRO;
366 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en)
367 mask &= ~INV_MPU6050_SENSOR_TEMP;
368 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en)
369 mask &= ~INV_MPU6050_SENSOR_MAGN;
370 if (mask & INV_MPU6050_SENSOR_WOM && en == st->chip_config.wom_en)
371 mask &= ~INV_MPU6050_SENSOR_WOM;
372
373 /* force accel on if WoM is on and not going off */
374 if (!en && (mask & INV_MPU6050_SENSOR_ACCL) && st->chip_config.wom_en &&
375 !(mask & INV_MPU6050_SENSOR_WOM))
376 mask &= ~INV_MPU6050_SENSOR_ACCL;
377
378 if (mask == 0)
379 return 0;
380
381 /* turn on/off temperature sensor */
382 if (mask & INV_MPU6050_SENSOR_TEMP) {
383 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, -1, !en);
384 if (ret)
385 return ret;
386 st->chip_config.temp_en = en;
387 }
388
389 /* update user_crtl for driving magnetometer */
390 if (mask & INV_MPU6050_SENSOR_MAGN) {
391 user_ctrl = st->chip_config.user_ctrl;
392 if (en)
393 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN;
394 else
395 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN;
396 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
397 if (ret)
398 return ret;
399 st->chip_config.user_ctrl = user_ctrl;
400 st->chip_config.magn_en = en;
401 }
402
403 /* manage accel & gyro engines */
404 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) {
405 /* compute power management 2 current value */
406 pwr_mgmt2 = 0;
407 if (!st->chip_config.accl_en)
408 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
409 if (!st->chip_config.gyro_en)
410 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
411
412 /* update to new requested value */
413 if (mask & INV_MPU6050_SENSOR_ACCL) {
414 if (en)
415 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY;
416 else
417 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
418 }
419 if (mask & INV_MPU6050_SENSOR_GYRO) {
420 if (en)
421 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY;
422 else
423 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
424 }
425
426 /* switch clock to internal when turning gyro off */
427 if (mask & INV_MPU6050_SENSOR_GYRO && !en) {
428 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL);
429 if (ret)
430 return ret;
431 }
432
433 /* update sensors engine */
434 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n",
435 pwr_mgmt2);
436 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2);
437 if (ret)
438 return ret;
439 if (mask & INV_MPU6050_SENSOR_ACCL)
440 st->chip_config.accl_en = en;
441 if (mask & INV_MPU6050_SENSOR_GYRO)
442 st->chip_config.gyro_en = en;
443
444 /* compute required time to have sensors stabilized */
445 sleep = 0;
446 if (en) {
447 if (mask & INV_MPU6050_SENSOR_ACCL) {
448 if (sleep < st->hw->startup_time.accel)
449 sleep = st->hw->startup_time.accel;
450 }
451 if (mask & INV_MPU6050_SENSOR_GYRO) {
452 if (sleep < st->hw->startup_time.gyro)
453 sleep = st->hw->startup_time.gyro;
454 }
455 } else {
456 if (mask & INV_MPU6050_SENSOR_GYRO) {
457 if (sleep < INV_MPU6050_GYRO_DOWN_TIME)
458 sleep = INV_MPU6050_GYRO_DOWN_TIME;
459 }
460 }
461 if (sleep)
462 msleep(sleep);
463
464 /* switch clock to PLL when turning gyro on */
465 if (mask & INV_MPU6050_SENSOR_GYRO && en) {
466 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL);
467 if (ret)
468 return ret;
469 }
470 }
471
472 /* enable/disable accel intelligence control */
473 if (mask & INV_MPU6050_SENSOR_WOM) {
474 val = en ? INV_MPU6500_BIT_ACCEL_INTEL_EN |
475 INV_MPU6500_BIT_ACCEL_INTEL_MODE : 0;
476 ret = regmap_write(st->map, INV_MPU6500_REG_ACCEL_INTEL_CTRL, val);
477 if (ret)
478 return ret;
479 st->chip_config.wom_en = en;
480 }
481
482 return 0;
483 }
484
485 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st,
486 bool power_on)
487 {
488 int result;
489
490 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, false, -1, -1);
491 if (result)
492 return result;
493
494 if (power_on)
495 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
496 INV_MPU6050_REG_UP_TIME_MAX);
497
498 return 0;
499 }
500
501 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st,
502 enum inv_mpu6050_fsr_e val)
503 {
504 unsigned int gyro_shift;
505 u8 data;
506
507 switch (st->chip_type) {
508 case INV_ICM20690:
509 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT;
510 break;
511 default:
512 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT;
513 break;
514 }
515
516 data = val << gyro_shift;
517 return regmap_write(st->map, st->reg->gyro_config, data);
518 }
519
520 static int inv_mpu6050_set_accel_lpf_regs(struct inv_mpu6050_state *st,
521 enum inv_mpu6050_filter_e val)
522 {
523 switch (st->chip_type) {
524 case INV_MPU6050:
525 case INV_MPU6000:
526 case INV_MPU9150:
527 /* old chips, nothing to do */
528 return 0;
529 case INV_ICM20689:
530 case INV_ICM20690:
531 case INV_IAM20680HT:
532 case INV_IAM20680HP:
533 /* set FIFO size to maximum value */
534 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX;
535 break;
536 default:
537 break;
538 }
539
540 return regmap_write(st->map, st->reg->accel_lpf, val);
541 }
542
543 /*
544 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
545 *
546 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
547 * MPU6500 and above have a dedicated register for accelerometer
548 */
549 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
550 enum inv_mpu6050_filter_e val)
551 {
552 int result;
553
554 result = regmap_write(st->map, st->reg->lpf, val);
555 if (result)
556 return result;
557
558 /* set accel lpf */
559 return inv_mpu6050_set_accel_lpf_regs(st, val);
560 }
561
562 /*
563 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
564 *
565 * Initial configuration:
566 * FSR: ± 2000DPS
567 * DLPF: 20Hz
568 * FIFO rate: 50Hz
569 * Clock source: Gyro PLL
570 */
571 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
572 {
573 int result;
574 u8 d;
575 struct inv_mpu6050_state *st = iio_priv(indio_dev);
576 struct inv_sensors_timestamp_chip timestamp;
577
578 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr);
579 if (result)
580 return result;
581
582 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf);
583 if (result)
584 return result;
585
586 d = st->chip_config.divider;
587 result = regmap_write(st->map, st->reg->sample_rate_div, d);
588 if (result)
589 return result;
590
591 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
592 result = regmap_write(st->map, st->reg->accl_config, d);
593 if (result)
594 return result;
595
596 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
597 if (result)
598 return result;
599
600 /* clock jitter is +/- 2% */
601 timestamp.clock_period = NSEC_PER_SEC / INV_MPU6050_INTERNAL_FREQ_HZ;
602 timestamp.jitter = 20;
603 timestamp.init_period =
604 NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
605 inv_sensors_timestamp_init(&st->timestamp, &timestamp);
606
607 /* magn chip init, noop if not present in the chip */
608 result = inv_mpu_magn_probe(st);
609 if (result)
610 return result;
611
612 return 0;
613 }
614
615 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
616 int axis, int val)
617 {
618 int ind;
619 __be16 d = cpu_to_be16(val);
620
621 ind = (axis - IIO_MOD_X) * 2;
622
623 return regmap_bulk_write(st->map, reg + ind, &d, sizeof(d));
624 }
625
626 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
627 int axis, int *val)
628 {
629 int ind, result;
630 __be16 d;
631
632 ind = (axis - IIO_MOD_X) * 2;
633 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d));
634 if (result)
635 return result;
636 *val = (short)be16_to_cpup(&d);
637
638 return IIO_VAL_INT;
639 }
640
641 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
642 struct iio_chan_spec const *chan,
643 int *val)
644 {
645 struct inv_mpu6050_state *st = iio_priv(indio_dev);
646 struct device *pdev = regmap_get_device(st->map);
647 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us;
648 int result;
649 int ret;
650
651 /* compute sample period */
652 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
653 period_us = 1000000 / freq_hz;
654
655 result = pm_runtime_resume_and_get(pdev);
656 if (result)
657 return result;
658
659 switch (chan->type) {
660 case IIO_ANGL_VEL:
661 if (!st->chip_config.gyro_en) {
662 result = inv_mpu6050_switch_engine(st, true,
663 INV_MPU6050_SENSOR_GYRO);
664 if (result)
665 goto error_power_off;
666 /* need to wait 2 periods to have first valid sample */
667 min_sleep_us = 2 * period_us;
668 max_sleep_us = 2 * (period_us + period_us / 2);
669 usleep_range(min_sleep_us, max_sleep_us);
670 }
671 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
672 chan->channel2, val);
673 break;
674 case IIO_ACCEL:
675 if (!st->chip_config.accl_en) {
676 result = inv_mpu6050_switch_engine(st, true,
677 INV_MPU6050_SENSOR_ACCL);
678 if (result)
679 goto error_power_off;
680 /* wait 1 period for first sample availability */
681 min_sleep_us = period_us;
682 max_sleep_us = period_us + period_us / 2;
683 usleep_range(min_sleep_us, max_sleep_us);
684 }
685 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
686 chan->channel2, val);
687 break;
688 case IIO_TEMP:
689 /* temperature sensor work only with accel and/or gyro */
690 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) {
691 result = -EBUSY;
692 goto error_power_off;
693 }
694 if (!st->chip_config.temp_en) {
695 result = inv_mpu6050_switch_engine(st, true,
696 INV_MPU6050_SENSOR_TEMP);
697 if (result)
698 goto error_power_off;
699 /* wait 1 period for first sample availability */
700 min_sleep_us = period_us;
701 max_sleep_us = period_us + period_us / 2;
702 usleep_range(min_sleep_us, max_sleep_us);
703 }
704 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
705 IIO_MOD_X, val);
706 break;
707 case IIO_MAGN:
708 if (!st->chip_config.magn_en) {
709 result = inv_mpu6050_switch_engine(st, true,
710 INV_MPU6050_SENSOR_MAGN);
711 if (result)
712 goto error_power_off;
713 /* frequency is limited for magnetometer */
714 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) {
715 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX;
716 period_us = 1000000 / freq_hz;
717 }
718 /* need to wait 2 periods to have first valid sample */
719 min_sleep_us = 2 * period_us;
720 max_sleep_us = 2 * (period_us + period_us / 2);
721 usleep_range(min_sleep_us, max_sleep_us);
722 }
723 ret = inv_mpu_magn_read(st, chan->channel2, val);
724 break;
725 default:
726 ret = -EINVAL;
727 break;
728 }
729
730 pm_runtime_mark_last_busy(pdev);
731 pm_runtime_put_autosuspend(pdev);
732
733 return ret;
734
735 error_power_off:
736 pm_runtime_put_autosuspend(pdev);
737 return result;
738 }
739
740 static int
741 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
742 struct iio_chan_spec const *chan,
743 int *val, int *val2, long mask)
744 {
745 struct inv_mpu6050_state *st = iio_priv(indio_dev);
746 int ret = 0;
747
748 switch (mask) {
749 case IIO_CHAN_INFO_RAW:
750 ret = iio_device_claim_direct_mode(indio_dev);
751 if (ret)
752 return ret;
753 mutex_lock(&st->lock);
754 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
755 mutex_unlock(&st->lock);
756 iio_device_release_direct_mode(indio_dev);
757 return ret;
758 case IIO_CHAN_INFO_SCALE:
759 switch (chan->type) {
760 case IIO_ANGL_VEL:
761 mutex_lock(&st->lock);
762 *val = 0;
763 *val2 = gyro_scale_6050[st->chip_config.fsr];
764 mutex_unlock(&st->lock);
765
766 return IIO_VAL_INT_PLUS_NANO;
767 case IIO_ACCEL:
768 mutex_lock(&st->lock);
769 *val = 0;
770 *val2 = accel_scale[st->chip_config.accl_fs];
771 mutex_unlock(&st->lock);
772
773 return IIO_VAL_INT_PLUS_MICRO;
774 case IIO_TEMP:
775 *val = st->hw->temp.scale / 1000000;
776 *val2 = st->hw->temp.scale % 1000000;
777 return IIO_VAL_INT_PLUS_MICRO;
778 case IIO_MAGN:
779 return inv_mpu_magn_get_scale(st, chan, val, val2);
780 default:
781 return -EINVAL;
782 }
783 case IIO_CHAN_INFO_OFFSET:
784 switch (chan->type) {
785 case IIO_TEMP:
786 *val = st->hw->temp.offset;
787 return IIO_VAL_INT;
788 default:
789 return -EINVAL;
790 }
791 case IIO_CHAN_INFO_CALIBBIAS:
792 switch (chan->type) {
793 case IIO_ANGL_VEL:
794 mutex_lock(&st->lock);
795 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
796 chan->channel2, val);
797 mutex_unlock(&st->lock);
798 return ret;
799 case IIO_ACCEL:
800 mutex_lock(&st->lock);
801 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
802 chan->channel2, val);
803 mutex_unlock(&st->lock);
804 return ret;
805
806 default:
807 return -EINVAL;
808 }
809 default:
810 return -EINVAL;
811 }
812 }
813
814 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val,
815 int val2)
816 {
817 int result, i;
818
819 if (val != 0)
820 return -EINVAL;
821
822 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
823 if (gyro_scale_6050[i] == val2) {
824 result = inv_mpu6050_set_gyro_fsr(st, i);
825 if (result)
826 return result;
827
828 st->chip_config.fsr = i;
829 return 0;
830 }
831 }
832
833 return -EINVAL;
834 }
835
836 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
837 struct iio_chan_spec const *chan, long mask)
838 {
839 switch (mask) {
840 case IIO_CHAN_INFO_SCALE:
841 switch (chan->type) {
842 case IIO_ANGL_VEL:
843 return IIO_VAL_INT_PLUS_NANO;
844 default:
845 return IIO_VAL_INT_PLUS_MICRO;
846 }
847 default:
848 return IIO_VAL_INT_PLUS_MICRO;
849 }
850
851 return -EINVAL;
852 }
853
854 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val,
855 int val2)
856 {
857 int result, i;
858 u8 d;
859
860 if (val != 0)
861 return -EINVAL;
862
863 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
864 if (accel_scale[i] == val2) {
865 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
866 result = regmap_write(st->map, st->reg->accl_config, d);
867 if (result)
868 return result;
869
870 st->chip_config.accl_fs = i;
871 return 0;
872 }
873 }
874
875 return -EINVAL;
876 }
877
878 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
879 struct iio_chan_spec const *chan,
880 int val, int val2, long mask)
881 {
882 struct inv_mpu6050_state *st = iio_priv(indio_dev);
883 struct device *pdev = regmap_get_device(st->map);
884 int result;
885
886 /*
887 * we should only update scale when the chip is disabled, i.e.
888 * not running
889 */
890 result = iio_device_claim_direct_mode(indio_dev);
891 if (result)
892 return result;
893
894 mutex_lock(&st->lock);
895 result = pm_runtime_resume_and_get(pdev);
896 if (result)
897 goto error_write_raw_unlock;
898
899 switch (mask) {
900 case IIO_CHAN_INFO_SCALE:
901 switch (chan->type) {
902 case IIO_ANGL_VEL:
903 result = inv_mpu6050_write_gyro_scale(st, val, val2);
904 break;
905 case IIO_ACCEL:
906 result = inv_mpu6050_write_accel_scale(st, val, val2);
907 break;
908 default:
909 result = -EINVAL;
910 break;
911 }
912 break;
913 case IIO_CHAN_INFO_CALIBBIAS:
914 switch (chan->type) {
915 case IIO_ANGL_VEL:
916 result = inv_mpu6050_sensor_set(st,
917 st->reg->gyro_offset,
918 chan->channel2, val);
919 break;
920 case IIO_ACCEL:
921 result = inv_mpu6050_sensor_set(st,
922 st->reg->accl_offset,
923 chan->channel2, val);
924 break;
925 default:
926 result = -EINVAL;
927 break;
928 }
929 break;
930 default:
931 result = -EINVAL;
932 break;
933 }
934
935 pm_runtime_mark_last_busy(pdev);
936 pm_runtime_put_autosuspend(pdev);
937 error_write_raw_unlock:
938 mutex_unlock(&st->lock);
939 iio_device_release_direct_mode(indio_dev);
940
941 return result;
942 }
943
944 static u64 inv_mpu6050_convert_wom_to_roc(unsigned int threshold, unsigned int freq_div)
945 {
946 /* 4mg per LSB converted in m/s² in micro (1000000) */
947 const unsigned int convert = 4U * 9807U;
948 u64 value;
949
950 value = threshold * convert;
951
952 /* compute the differential by multiplying by the frequency */
953 return div_u64(value * INV_MPU6050_INTERNAL_FREQ_HZ, freq_div);
954 }
955
956 static unsigned int inv_mpu6050_convert_roc_to_wom(u64 roc, unsigned int freq_div)
957 {
958 /* 4mg per LSB converted in m/s² in micro (1000000) */
959 const unsigned int convert = 4U * 9807U;
960 u64 value;
961
962 /* return 0 only if roc is 0 */
963 if (roc == 0)
964 return 0;
965
966 value = div_u64(roc * freq_div, convert * INV_MPU6050_INTERNAL_FREQ_HZ);
967
968 /* limit value to 8 bits and prevent 0 */
969 return min(255, max(1, value));
970 }
971
972 static int inv_mpu6050_set_wom_int(struct inv_mpu6050_state *st, bool on)
973 {
974 unsigned int reg_val, val;
975
976 switch (st->chip_type) {
977 case INV_MPU6050:
978 case INV_MPU6500:
979 case INV_MPU6515:
980 case INV_MPU6880:
981 case INV_MPU6000:
982 case INV_MPU9150:
983 case INV_MPU9250:
984 case INV_MPU9255:
985 reg_val = INV_MPU6500_BIT_WOM_INT_EN;
986 break;
987 default:
988 reg_val = INV_ICM20608_BIT_WOM_INT_EN;
989 break;
990 }
991
992 val = on ? reg_val : 0;
993
994 return regmap_update_bits(st->map, st->reg->int_enable, reg_val, val);
995 }
996
997 static int inv_mpu6050_set_wom_threshold(struct inv_mpu6050_state *st, u64 value,
998 unsigned int freq_div)
999 {
1000 unsigned int threshold;
1001 int result;
1002
1003 /* convert roc to wom threshold and convert back to handle clipping */
1004 threshold = inv_mpu6050_convert_roc_to_wom(value, freq_div);
1005 value = inv_mpu6050_convert_wom_to_roc(threshold, freq_div);
1006
1007 dev_dbg(regmap_get_device(st->map), "wom_threshold: 0x%x\n", threshold);
1008
1009 switch (st->chip_type) {
1010 case INV_ICM20609:
1011 case INV_ICM20689:
1012 case INV_ICM20600:
1013 case INV_ICM20602:
1014 case INV_ICM20690:
1015 st->data[0] = threshold;
1016 st->data[1] = threshold;
1017 st->data[2] = threshold;
1018 result = regmap_bulk_write(st->map, INV_ICM20609_REG_ACCEL_WOM_X_THR,
1019 st->data, 3);
1020 break;
1021 default:
1022 result = regmap_write(st->map, INV_MPU6500_REG_WOM_THRESHOLD, threshold);
1023 break;
1024 }
1025 if (result)
1026 return result;
1027
1028 st->chip_config.roc_threshold = value;
1029
1030 return 0;
1031 }
1032
1033 static int inv_mpu6050_set_lp_odr(struct inv_mpu6050_state *st, unsigned int freq_div,
1034 unsigned int *lp_div)
1035 {
1036 static const unsigned int freq_dividers[] = {2, 4, 8, 16, 32, 64, 128, 256};
1037 static const unsigned int reg_values[] = {
1038 INV_MPU6050_LPOSC_500HZ, INV_MPU6050_LPOSC_250HZ,
1039 INV_MPU6050_LPOSC_125HZ, INV_MPU6050_LPOSC_62HZ,
1040 INV_MPU6050_LPOSC_31HZ, INV_MPU6050_LPOSC_16HZ,
1041 INV_MPU6050_LPOSC_8HZ, INV_MPU6050_LPOSC_4HZ,
1042 };
1043 unsigned int val, i;
1044
1045 switch (st->chip_type) {
1046 case INV_ICM20609:
1047 case INV_ICM20689:
1048 case INV_ICM20600:
1049 case INV_ICM20602:
1050 case INV_ICM20690:
1051 /* nothing to do */
1052 *lp_div = INV_MPU6050_FREQ_DIVIDER(st);
1053 return 0;
1054 default:
1055 break;
1056 }
1057
1058 /* found the nearest superior frequency divider */
1059 i = ARRAY_SIZE(reg_values) - 1;
1060 val = reg_values[i];
1061 *lp_div = freq_dividers[i];
1062 for (i = 0; i < ARRAY_SIZE(freq_dividers); ++i) {
1063 if (freq_div <= freq_dividers[i]) {
1064 val = reg_values[i];
1065 *lp_div = freq_dividers[i];
1066 break;
1067 }
1068 }
1069
1070 dev_dbg(regmap_get_device(st->map), "lp_odr: 0x%x\n", val);
1071 return regmap_write(st->map, INV_MPU6500_REG_LP_ODR, val);
1072 }
1073
1074 static int inv_mpu6050_set_wom_lp(struct inv_mpu6050_state *st, bool on)
1075 {
1076 unsigned int lp_div;
1077 int result;
1078
1079 if (on) {
1080 /* set low power ODR */
1081 result = inv_mpu6050_set_lp_odr(st, INV_MPU6050_FREQ_DIVIDER(st), &lp_div);
1082 if (result)
1083 return result;
1084 /* disable accel low pass filter */
1085 result = inv_mpu6050_set_accel_lpf_regs(st, INV_MPU6050_FILTER_NOLPF);
1086 if (result)
1087 return result;
1088 /* update wom threshold with new low-power frequency divider */
1089 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold, lp_div);
1090 if (result)
1091 return result;
1092 /* set cycle mode */
1093 result = inv_mpu6050_pwr_mgmt_1_write(st, false, true, -1, -1);
1094 } else {
1095 /* disable cycle mode */
1096 result = inv_mpu6050_pwr_mgmt_1_write(st, false, false, -1, -1);
1097 if (result)
1098 return result;
1099 /* restore wom threshold */
1100 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold,
1101 INV_MPU6050_FREQ_DIVIDER(st));
1102 if (result)
1103 return result;
1104 /* restore accel low pass filter */
1105 result = inv_mpu6050_set_accel_lpf_regs(st, st->chip_config.lpf);
1106 }
1107
1108 return result;
1109 }
1110
1111 static int inv_mpu6050_enable_wom(struct inv_mpu6050_state *st, bool en)
1112 {
1113 struct device *pdev = regmap_get_device(st->map);
1114 unsigned int mask;
1115 int result;
1116
1117 if (en) {
1118 result = pm_runtime_resume_and_get(pdev);
1119 if (result)
1120 return result;
1121
1122 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_WOM;
1123 result = inv_mpu6050_switch_engine(st, true, mask);
1124 if (result)
1125 goto error_suspend;
1126
1127 result = inv_mpu6050_set_wom_int(st, true);
1128 if (result)
1129 goto error_suspend;
1130 } else {
1131 result = inv_mpu6050_set_wom_int(st, false);
1132 if (result)
1133 dev_err(pdev, "error %d disabling WoM interrupt bit", result);
1134
1135 /* disable only WoM and let accel be disabled by autosuspend */
1136 result = inv_mpu6050_switch_engine(st, false, INV_MPU6050_SENSOR_WOM);
1137 if (result) {
1138 dev_err(pdev, "error %d disabling WoM force off", result);
1139 /* force WoM off */
1140 st->chip_config.wom_en = false;
1141 }
1142
1143 pm_runtime_mark_last_busy(pdev);
1144 pm_runtime_put_autosuspend(pdev);
1145 }
1146
1147 return result;
1148
1149 error_suspend:
1150 pm_runtime_mark_last_busy(pdev);
1151 pm_runtime_put_autosuspend(pdev);
1152 return result;
1153 }
1154
1155 static int inv_mpu6050_read_event_config(struct iio_dev *indio_dev,
1156 const struct iio_chan_spec *chan,
1157 enum iio_event_type type,
1158 enum iio_event_direction dir)
1159 {
1160 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1161
1162 /* support only WoM (accel roc rising) event */
1163 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC ||
1164 dir != IIO_EV_DIR_RISING)
1165 return -EINVAL;
1166
1167 guard(mutex)(&st->lock);
1168
1169 return st->chip_config.wom_en ? 1 : 0;
1170 }
1171
1172 static int inv_mpu6050_write_event_config(struct iio_dev *indio_dev,
1173 const struct iio_chan_spec *chan,
1174 enum iio_event_type type,
1175 enum iio_event_direction dir,
1176 bool state)
1177 {
1178 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1179
1180 /* support only WoM (accel roc rising) event */
1181 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC ||
1182 dir != IIO_EV_DIR_RISING)
1183 return -EINVAL;
1184
1185 guard(mutex)(&st->lock);
1186
1187 if (st->chip_config.wom_en == state)
1188 return 0;
1189
1190 return inv_mpu6050_enable_wom(st, state);
1191 }
1192
1193 static int inv_mpu6050_read_event_value(struct iio_dev *indio_dev,
1194 const struct iio_chan_spec *chan,
1195 enum iio_event_type type,
1196 enum iio_event_direction dir,
1197 enum iio_event_info info,
1198 int *val, int *val2)
1199 {
1200 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1201 u32 rem;
1202
1203 /* support only WoM (accel roc rising) event value */
1204 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC ||
1205 dir != IIO_EV_DIR_RISING || info != IIO_EV_INFO_VALUE)
1206 return -EINVAL;
1207
1208 guard(mutex)(&st->lock);
1209
1210 /* return value in micro */
1211 *val = div_u64_rem(st->chip_config.roc_threshold, 1000000U, &rem);
1212 *val2 = rem;
1213
1214 return IIO_VAL_INT_PLUS_MICRO;
1215 }
1216
1217 static int inv_mpu6050_write_event_value(struct iio_dev *indio_dev,
1218 const struct iio_chan_spec *chan,
1219 enum iio_event_type type,
1220 enum iio_event_direction dir,
1221 enum iio_event_info info,
1222 int val, int val2)
1223 {
1224 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1225 struct device *pdev = regmap_get_device(st->map);
1226 u64 value;
1227 int result;
1228
1229 /* support only WoM (accel roc rising) event value */
1230 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC ||
1231 dir != IIO_EV_DIR_RISING || info != IIO_EV_INFO_VALUE)
1232 return -EINVAL;
1233
1234 if (val < 0 || val2 < 0)
1235 return -EINVAL;
1236
1237 guard(mutex)(&st->lock);
1238
1239 result = pm_runtime_resume_and_get(pdev);
1240 if (result)
1241 return result;
1242
1243 value = (u64)val * 1000000ULL + (u64)val2;
1244 result = inv_mpu6050_set_wom_threshold(st, value, INV_MPU6050_FREQ_DIVIDER(st));
1245
1246 pm_runtime_mark_last_busy(pdev);
1247 pm_runtime_put_autosuspend(pdev);
1248
1249 return result;
1250 }
1251
1252 /*
1253 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
1254 *
1255 * Based on the Nyquist principle, the bandwidth of the low
1256 * pass filter must not exceed the signal sampling rate divided
1257 * by 2, or there would be aliasing.
1258 * This function basically search for the correct low pass
1259 * parameters based on the fifo rate, e.g, sampling frequency.
1260 *
1261 * lpf is set automatically when setting sampling rate to avoid any aliases.
1262 */
1263 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
1264 {
1265 static const int hz[] = {400, 200, 90, 40, 20, 10};
1266 static const int d[] = {
1267 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ,
1268 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ,
1269 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
1270 };
1271 int i, result;
1272 u8 data;
1273
1274 data = INV_MPU6050_FILTER_5HZ;
1275 for (i = 0; i < ARRAY_SIZE(hz); ++i) {
1276 if (rate >= hz[i]) {
1277 data = d[i];
1278 break;
1279 }
1280 }
1281 result = inv_mpu6050_set_lpf_regs(st, data);
1282 if (result)
1283 return result;
1284 st->chip_config.lpf = data;
1285
1286 return 0;
1287 }
1288
1289 /*
1290 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
1291 */
1292 static ssize_t
1293 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
1294 const char *buf, size_t count)
1295 {
1296 int fifo_rate;
1297 u32 fifo_period;
1298 bool fifo_on;
1299 u8 d;
1300 int result;
1301 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
1302 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1303 struct device *pdev = regmap_get_device(st->map);
1304
1305 if (kstrtoint(buf, 10, &fifo_rate))
1306 return -EINVAL;
1307 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
1308 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
1309 return -EINVAL;
1310
1311 /* compute the chip sample rate divider */
1312 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
1313 /* compute back the fifo rate to handle truncation cases */
1314 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
1315 fifo_period = NSEC_PER_SEC / fifo_rate;
1316
1317 mutex_lock(&st->lock);
1318 if (d == st->chip_config.divider) {
1319 result = 0;
1320 goto fifo_rate_fail_unlock;
1321 }
1322
1323 fifo_on = st->chip_config.accl_fifo_enable ||
1324 st->chip_config.gyro_fifo_enable ||
1325 st->chip_config.magn_fifo_enable;
1326 result = inv_sensors_timestamp_update_odr(&st->timestamp, fifo_period, fifo_on);
1327 if (result)
1328 goto fifo_rate_fail_unlock;
1329
1330 result = pm_runtime_resume_and_get(pdev);
1331 if (result)
1332 goto fifo_rate_fail_unlock;
1333
1334 result = regmap_write(st->map, st->reg->sample_rate_div, d);
1335 if (result)
1336 goto fifo_rate_fail_power_off;
1337 st->chip_config.divider = d;
1338
1339 result = inv_mpu6050_set_lpf(st, fifo_rate);
1340 if (result)
1341 goto fifo_rate_fail_power_off;
1342
1343 /* update rate for magn, noop if not present in chip */
1344 result = inv_mpu_magn_set_rate(st, fifo_rate);
1345 if (result)
1346 goto fifo_rate_fail_power_off;
1347
1348 /* update wom threshold since roc is dependent on sampling frequency */
1349 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold,
1350 INV_MPU6050_FREQ_DIVIDER(st));
1351 if (result)
1352 goto fifo_rate_fail_power_off;
1353
1354 pm_runtime_mark_last_busy(pdev);
1355 fifo_rate_fail_power_off:
1356 pm_runtime_put_autosuspend(pdev);
1357 fifo_rate_fail_unlock:
1358 mutex_unlock(&st->lock);
1359 if (result)
1360 return result;
1361
1362 return count;
1363 }
1364
1365 /*
1366 * inv_fifo_rate_show() - Get the current sampling rate.
1367 */
1368 static ssize_t
1369 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
1370 char *buf)
1371 {
1372 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
1373 unsigned fifo_rate;
1374
1375 mutex_lock(&st->lock);
1376 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
1377 mutex_unlock(&st->lock);
1378
1379 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
1380 }
1381
1382 /*
1383 * inv_attr_show() - calling this function will show current
1384 * parameters.
1385 *
1386 * Deprecated in favor of IIO mounting matrix API.
1387 *
1388 * See inv_get_mount_matrix()
1389 */
1390 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
1391 char *buf)
1392 {
1393 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
1394 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1395 s8 *m;
1396
1397 switch (this_attr->address) {
1398 /*
1399 * In MPU6050, the two matrix are the same because gyro and accel
1400 * are integrated in one chip
1401 */
1402 case ATTR_GYRO_MATRIX:
1403 case ATTR_ACCL_MATRIX:
1404 m = st->plat_data.orientation;
1405
1406 return scnprintf(buf, PAGE_SIZE,
1407 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
1408 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
1409 default:
1410 return -EINVAL;
1411 }
1412 }
1413
1414 /**
1415 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
1416 * MPU6050 device.
1417 * @indio_dev: The IIO device
1418 * @trig: The new trigger
1419 *
1420 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
1421 * device, -EINVAL otherwise.
1422 */
1423 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
1424 struct iio_trigger *trig)
1425 {
1426 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1427
1428 if (st->trig != trig)
1429 return -EINVAL;
1430
1431 return 0;
1432 }
1433
1434 static const struct iio_mount_matrix *
1435 inv_get_mount_matrix(const struct iio_dev *indio_dev,
1436 const struct iio_chan_spec *chan)
1437 {
1438 struct inv_mpu6050_state *data = iio_priv(indio_dev);
1439 const struct iio_mount_matrix *matrix;
1440
1441 if (chan->type == IIO_MAGN)
1442 matrix = &data->magn_orient;
1443 else
1444 matrix = &data->orientation;
1445
1446 return matrix;
1447 }
1448
1449 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
1450 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
1451 { }
1452 };
1453
1454 static const struct iio_event_spec inv_wom_events[] = {
1455 {
1456 .type = IIO_EV_TYPE_ROC,
1457 .dir = IIO_EV_DIR_RISING,
1458 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
1459 BIT(IIO_EV_INFO_VALUE),
1460 },
1461 };
1462
1463 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
1464 { \
1465 .type = _type, \
1466 .modified = 1, \
1467 .channel2 = _channel2, \
1468 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
1469 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1470 BIT(IIO_CHAN_INFO_CALIBBIAS), \
1471 .scan_index = _index, \
1472 .scan_type = { \
1473 .sign = 's', \
1474 .realbits = 16, \
1475 .storagebits = 16, \
1476 .shift = 0, \
1477 .endianness = IIO_BE, \
1478 }, \
1479 .ext_info = inv_ext_info, \
1480 }
1481
1482 #define INV_MPU6050_TEMP_CHAN(_index) \
1483 { \
1484 .type = IIO_TEMP, \
1485 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
1486 | BIT(IIO_CHAN_INFO_OFFSET) \
1487 | BIT(IIO_CHAN_INFO_SCALE), \
1488 .scan_index = _index, \
1489 .scan_type = { \
1490 .sign = 's', \
1491 .realbits = 16, \
1492 .storagebits = 16, \
1493 .shift = 0, \
1494 .endianness = IIO_BE, \
1495 }, \
1496 }
1497
1498 #define INV_MPU6050_EVENT_CHAN(_type, _channel2, _events, _events_nb) \
1499 { \
1500 .type = _type, \
1501 .modified = 1, \
1502 .channel2 = _channel2, \
1503 .event_spec = _events, \
1504 .num_event_specs = _events_nb, \
1505 .scan_index = -1, \
1506 }
1507
1508 static const struct iio_chan_spec inv_mpu6050_channels[] = {
1509 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1510
1511 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1512
1513 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1514 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1515 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1516
1517 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1518 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1519 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1520 };
1521
1522 static const struct iio_chan_spec inv_mpu6500_channels[] = {
1523 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1524
1525 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1526
1527 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1528 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1529 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1530
1531 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1532 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1533 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1534
1535 INV_MPU6050_EVENT_CHAN(IIO_ACCEL, IIO_MOD_X_OR_Y_OR_Z,
1536 inv_wom_events, ARRAY_SIZE(inv_wom_events)),
1537 };
1538
1539 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \
1540 (BIT(INV_MPU6050_SCAN_ACCL_X) \
1541 | BIT(INV_MPU6050_SCAN_ACCL_Y) \
1542 | BIT(INV_MPU6050_SCAN_ACCL_Z))
1543
1544 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \
1545 (BIT(INV_MPU6050_SCAN_GYRO_X) \
1546 | BIT(INV_MPU6050_SCAN_GYRO_Y) \
1547 | BIT(INV_MPU6050_SCAN_GYRO_Z))
1548
1549 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP))
1550
1551 static const unsigned long inv_mpu_scan_masks[] = {
1552 /* 3-axis accel */
1553 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1554 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1555 /* 3-axis gyro */
1556 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1557 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1558 /* 6-axis accel + gyro */
1559 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1560 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1561 | INV_MPU6050_SCAN_MASK_TEMP,
1562 0,
1563 };
1564
1565 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \
1566 { \
1567 .type = IIO_MAGN, \
1568 .modified = 1, \
1569 .channel2 = _chan2, \
1570 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \
1571 BIT(IIO_CHAN_INFO_RAW), \
1572 .scan_index = _index, \
1573 .scan_type = { \
1574 .sign = 's', \
1575 .realbits = _bits, \
1576 .storagebits = 16, \
1577 .shift = 0, \
1578 .endianness = IIO_BE, \
1579 }, \
1580 .ext_info = inv_ext_info, \
1581 }
1582
1583 static const struct iio_chan_spec inv_mpu9150_channels[] = {
1584 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1585
1586 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1587
1588 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1589 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1590 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1591
1592 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1593 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1594 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1595
1596 /* Magnetometer resolution is 13 bits */
1597 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X),
1598 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y),
1599 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z),
1600 };
1601
1602 static const struct iio_chan_spec inv_mpu9250_channels[] = {
1603 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1604
1605 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1606
1607 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1608 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1609 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1610
1611 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1612 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1613 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1614
1615 /* Magnetometer resolution is 16 bits */
1616 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
1617 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
1618 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
1619 };
1620
1621 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \
1622 (BIT(INV_MPU9X50_SCAN_MAGN_X) \
1623 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \
1624 | BIT(INV_MPU9X50_SCAN_MAGN_Z))
1625
1626 static const unsigned long inv_mpu9x50_scan_masks[] = {
1627 /* 3-axis accel */
1628 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1629 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1630 /* 3-axis gyro */
1631 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1632 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1633 /* 3-axis magn */
1634 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1635 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP,
1636 /* 6-axis accel + gyro */
1637 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1638 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1639 | INV_MPU6050_SCAN_MASK_TEMP,
1640 /* 6-axis accel + magn */
1641 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1642 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1643 | INV_MPU6050_SCAN_MASK_TEMP,
1644 /* 6-axis gyro + magn */
1645 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1646 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1647 | INV_MPU6050_SCAN_MASK_TEMP,
1648 /* 9-axis accel + gyro + magn */
1649 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1650 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1651 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1652 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1653 | INV_MPU6050_SCAN_MASK_TEMP,
1654 0,
1655 };
1656
1657 static const unsigned long inv_icm20602_scan_masks[] = {
1658 /* 3-axis accel + temp (mandatory) */
1659 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1660 /* 3-axis gyro + temp (mandatory) */
1661 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1662 /* 6-axis accel + gyro + temp (mandatory) */
1663 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1664 | INV_MPU6050_SCAN_MASK_TEMP,
1665 0,
1666 };
1667
1668 /*
1669 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
1670 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
1671 * low-pass filter. Specifically, each of these sampling rates are about twice
1672 * the bandwidth of a corresponding low-pass filter, which should eliminate
1673 * aliasing following the Nyquist principle. By picking a frequency different
1674 * from these, the user risks aliasing effects.
1675 */
1676 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
1677 static IIO_CONST_ATTR(in_anglvel_scale_available,
1678 "0.000133090 0.000266181 0.000532362 0.001064724");
1679 static IIO_CONST_ATTR(in_accel_scale_available,
1680 "0.000598 0.001196 0.002392 0.004785");
1681 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
1682 inv_mpu6050_fifo_rate_store);
1683
1684 /* Deprecated: kept for userspace backward compatibility. */
1685 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
1686 ATTR_GYRO_MATRIX);
1687 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
1688 ATTR_ACCL_MATRIX);
1689
1690 static struct attribute *inv_attributes[] = {
1691 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
1692 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
1693 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1694 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1695 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1696 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
1697 NULL,
1698 };
1699
1700 static const struct attribute_group inv_attribute_group = {
1701 .attrs = inv_attributes
1702 };
1703
1704 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev,
1705 unsigned int reg,
1706 unsigned int writeval,
1707 unsigned int *readval)
1708 {
1709 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1710 int ret;
1711
1712 mutex_lock(&st->lock);
1713 if (readval)
1714 ret = regmap_read(st->map, reg, readval);
1715 else
1716 ret = regmap_write(st->map, reg, writeval);
1717 mutex_unlock(&st->lock);
1718
1719 return ret;
1720 }
1721
1722 static const struct iio_info mpu_info = {
1723 .read_raw = &inv_mpu6050_read_raw,
1724 .write_raw = &inv_mpu6050_write_raw,
1725 .write_raw_get_fmt = &inv_write_raw_get_fmt,
1726 .attrs = &inv_attribute_group,
1727 .read_event_config = inv_mpu6050_read_event_config,
1728 .write_event_config = inv_mpu6050_write_event_config,
1729 .read_event_value = inv_mpu6050_read_event_value,
1730 .write_event_value = inv_mpu6050_write_event_value,
1731 .validate_trigger = inv_mpu6050_validate_trigger,
1732 .debugfs_reg_access = &inv_mpu6050_reg_access,
1733 };
1734
1735 /*
1736 * inv_check_and_setup_chip() - check and setup chip.
1737 */
1738 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
1739 {
1740 int result;
1741 unsigned int regval, mask;
1742 int i;
1743
1744 st->hw = &hw_info[st->chip_type];
1745 st->reg = hw_info[st->chip_type].reg;
1746 memcpy(&st->chip_config, hw_info[st->chip_type].config,
1747 sizeof(st->chip_config));
1748 st->data = devm_kzalloc(regmap_get_device(st->map), st->hw->fifo_size, GFP_KERNEL);
1749 if (st->data == NULL)
1750 return -ENOMEM;
1751
1752 /* check chip self-identification */
1753 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, &regval);
1754 if (result)
1755 return result;
1756 if (regval != st->hw->whoami) {
1757 /* check whoami against all possible values */
1758 for (i = 0; i < INV_NUM_PARTS; ++i) {
1759 if (regval == hw_info[i].whoami) {
1760 dev_warn(regmap_get_device(st->map),
1761 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n",
1762 regval, hw_info[i].name,
1763 st->hw->whoami, st->hw->name);
1764 break;
1765 }
1766 }
1767 if (i >= INV_NUM_PARTS) {
1768 dev_err(regmap_get_device(st->map),
1769 "invalid whoami 0x%02x expected 0x%02x (%s)\n",
1770 regval, st->hw->whoami, st->hw->name);
1771 return -ENODEV;
1772 }
1773 }
1774
1775 /* reset to make sure previous state are not there */
1776 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1777 INV_MPU6050_BIT_H_RESET);
1778 if (result)
1779 return result;
1780 msleep(INV_MPU6050_POWER_UP_TIME);
1781 switch (st->chip_type) {
1782 case INV_MPU6000:
1783 case INV_MPU6500:
1784 case INV_MPU6515:
1785 case INV_MPU6880:
1786 case INV_MPU9250:
1787 case INV_MPU9255:
1788 /* reset signal path (required for spi connection) */
1789 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST |
1790 INV_MPU6050_BIT_GYRO_RST;
1791 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET,
1792 regval);
1793 if (result)
1794 return result;
1795 msleep(INV_MPU6050_POWER_UP_TIME);
1796 break;
1797 default:
1798 break;
1799 }
1800
1801 /*
1802 * Turn power on. After reset, the sleep bit could be on
1803 * or off depending on the OTP settings. Turning power on
1804 * make it in a definite state as well as making the hardware
1805 * state align with the software state
1806 */
1807 result = inv_mpu6050_set_power_itg(st, true);
1808 if (result)
1809 return result;
1810 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1811 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1812 result = inv_mpu6050_switch_engine(st, false, mask);
1813 if (result)
1814 goto error_power_off;
1815
1816 return 0;
1817
1818 error_power_off:
1819 inv_mpu6050_set_power_itg(st, false);
1820 return result;
1821 }
1822
1823 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
1824 {
1825 int result;
1826
1827 result = regulator_enable(st->vddio_supply);
1828 if (result) {
1829 dev_err(regmap_get_device(st->map),
1830 "Failed to enable vddio regulator: %d\n", result);
1831 } else {
1832 /* Give the device a little bit of time to start up. */
1833 usleep_range(3000, 5000);
1834 }
1835
1836 return result;
1837 }
1838
1839 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
1840 {
1841 int result;
1842
1843 result = regulator_disable(st->vddio_supply);
1844 if (result)
1845 dev_err(regmap_get_device(st->map),
1846 "Failed to disable vddio regulator: %d\n", result);
1847
1848 return result;
1849 }
1850
1851 static void inv_mpu_core_disable_regulator_action(void *_data)
1852 {
1853 struct inv_mpu6050_state *st = _data;
1854 int result;
1855
1856 result = regulator_disable(st->vdd_supply);
1857 if (result)
1858 dev_err(regmap_get_device(st->map),
1859 "Failed to disable vdd regulator: %d\n", result);
1860
1861 inv_mpu_core_disable_regulator_vddio(st);
1862 }
1863
1864 static void inv_mpu_pm_disable(void *data)
1865 {
1866 struct device *dev = data;
1867
1868 pm_runtime_disable(dev);
1869 }
1870
1871 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1872 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1873 {
1874 struct inv_mpu6050_state *st;
1875 struct iio_dev *indio_dev;
1876 struct inv_mpu6050_platform_data *pdata;
1877 struct device *dev = regmap_get_device(regmap);
1878 int result;
1879 int irq_type;
1880
1881 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1882 if (!indio_dev)
1883 return -ENOMEM;
1884
1885 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1886 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1887 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1888 chip_type, name);
1889 return -ENODEV;
1890 }
1891 st = iio_priv(indio_dev);
1892 mutex_init(&st->lock);
1893 st->chip_type = chip_type;
1894 st->irq = irq;
1895 st->map = regmap;
1896
1897 st->level_shifter = device_property_read_bool(dev,
1898 "invensense,level-shifter");
1899 pdata = dev_get_platdata(dev);
1900 if (!pdata) {
1901 result = iio_read_mount_matrix(dev, &st->orientation);
1902 if (result) {
1903 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1904 result);
1905 return result;
1906 }
1907 } else {
1908 st->plat_data = *pdata;
1909 }
1910
1911 if (irq > 0) {
1912 irq_type = irq_get_trigger_type(irq);
1913 if (!irq_type)
1914 irq_type = IRQF_TRIGGER_RISING;
1915 } else {
1916 /* Doesn't really matter, use the default */
1917 irq_type = IRQF_TRIGGER_RISING;
1918 }
1919
1920 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge
1921 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1922 else if (irq_type == IRQF_TRIGGER_FALLING)
1923 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1924 else if (irq_type == IRQF_TRIGGER_HIGH)
1925 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1926 INV_MPU6050_LATCH_INT_EN;
1927 else if (irq_type == IRQF_TRIGGER_LOW)
1928 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1929 INV_MPU6050_LATCH_INT_EN;
1930 else {
1931 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1932 irq_type);
1933 return -EINVAL;
1934 }
1935 device_set_wakeup_capable(dev, true);
1936
1937 st->vdd_supply = devm_regulator_get(dev, "vdd");
1938 if (IS_ERR(st->vdd_supply))
1939 return dev_err_probe(dev, PTR_ERR(st->vdd_supply),
1940 "Failed to get vdd regulator\n");
1941
1942 st->vddio_supply = devm_regulator_get(dev, "vddio");
1943 if (IS_ERR(st->vddio_supply))
1944 return dev_err_probe(dev, PTR_ERR(st->vddio_supply),
1945 "Failed to get vddio regulator\n");
1946
1947 result = regulator_enable(st->vdd_supply);
1948 if (result) {
1949 dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
1950 return result;
1951 }
1952 msleep(INV_MPU6050_POWER_UP_TIME);
1953
1954 result = inv_mpu_core_enable_regulator_vddio(st);
1955 if (result) {
1956 regulator_disable(st->vdd_supply);
1957 return result;
1958 }
1959
1960 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1961 st);
1962 if (result) {
1963 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1964 result);
1965 return result;
1966 }
1967
1968 /* fill magnetometer orientation */
1969 result = inv_mpu_magn_set_orient(st);
1970 if (result)
1971 return result;
1972
1973 /* power is turned on inside check chip type*/
1974 result = inv_check_and_setup_chip(st);
1975 if (result)
1976 return result;
1977
1978 result = inv_mpu6050_init_config(indio_dev);
1979 if (result) {
1980 dev_err(dev, "Could not initialize device.\n");
1981 goto error_power_off;
1982 }
1983
1984 dev_set_drvdata(dev, indio_dev);
1985 /* name will be NULL when enumerated via ACPI */
1986 if (name)
1987 indio_dev->name = name;
1988 else
1989 indio_dev->name = dev_name(dev);
1990
1991 /* requires parent device set in indio_dev */
1992 if (inv_mpu_bus_setup) {
1993 result = inv_mpu_bus_setup(indio_dev);
1994 if (result)
1995 goto error_power_off;
1996 }
1997
1998 /* chip init is done, turning on runtime power management */
1999 result = pm_runtime_set_active(dev);
2000 if (result)
2001 goto error_power_off;
2002 pm_runtime_get_noresume(dev);
2003 pm_runtime_enable(dev);
2004 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS);
2005 pm_runtime_use_autosuspend(dev);
2006 pm_runtime_put(dev);
2007 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev);
2008 if (result)
2009 return result;
2010
2011 switch (chip_type) {
2012 case INV_MPU6000:
2013 case INV_MPU6050:
2014 indio_dev->channels = inv_mpu6050_channels;
2015 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6050_channels);
2016 indio_dev->available_scan_masks = inv_mpu_scan_masks;
2017 break;
2018 case INV_MPU9150:
2019 indio_dev->channels = inv_mpu9150_channels;
2020 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels);
2021 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
2022 break;
2023 case INV_MPU9250:
2024 case INV_MPU9255:
2025 indio_dev->channels = inv_mpu9250_channels;
2026 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
2027 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
2028 break;
2029 case INV_ICM20600:
2030 case INV_ICM20602:
2031 indio_dev->channels = inv_mpu6500_channels;
2032 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels);
2033 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
2034 break;
2035 default:
2036 indio_dev->channels = inv_mpu6500_channels;
2037 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels);
2038 indio_dev->available_scan_masks = inv_mpu_scan_masks;
2039 break;
2040 }
2041 /*
2042 * Use magnetometer inside the chip only if there is no i2c
2043 * auxiliary device in use. Otherwise Going back to 6-axis only.
2044 */
2045 if (st->magn_disabled) {
2046 switch (chip_type) {
2047 case INV_MPU9150:
2048 indio_dev->channels = inv_mpu6050_channels;
2049 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6050_channels);
2050 indio_dev->available_scan_masks = inv_mpu_scan_masks;
2051 break;
2052 default:
2053 indio_dev->channels = inv_mpu6500_channels;
2054 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels);
2055 indio_dev->available_scan_masks = inv_mpu_scan_masks;
2056 break;
2057 }
2058 }
2059
2060 indio_dev->info = &mpu_info;
2061
2062 if (irq > 0) {
2063 /*
2064 * The driver currently only supports buffered capture with its
2065 * own trigger. So no IRQ, no trigger, no buffer
2066 */
2067 result = devm_iio_triggered_buffer_setup(dev, indio_dev,
2068 iio_pollfunc_store_time,
2069 inv_mpu6050_read_fifo,
2070 NULL);
2071 if (result) {
2072 dev_err(dev, "configure buffer fail %d\n", result);
2073 return result;
2074 }
2075
2076 result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
2077 if (result) {
2078 dev_err(dev, "trigger probe fail %d\n", result);
2079 return result;
2080 }
2081 }
2082
2083 result = devm_iio_device_register(dev, indio_dev);
2084 if (result) {
2085 dev_err(dev, "IIO register fail %d\n", result);
2086 return result;
2087 }
2088
2089 return 0;
2090
2091 error_power_off:
2092 inv_mpu6050_set_power_itg(st, false);
2093 return result;
2094 }
2095 EXPORT_SYMBOL_NS_GPL(inv_mpu_core_probe, "IIO_MPU6050");
2096
2097 static int inv_mpu_resume(struct device *dev)
2098 {
2099 struct iio_dev *indio_dev = dev_get_drvdata(dev);
2100 struct inv_mpu6050_state *st = iio_priv(indio_dev);
2101 bool wakeup;
2102 int result;
2103
2104 guard(mutex)(&st->lock);
2105
2106 wakeup = device_may_wakeup(dev) && st->chip_config.wom_en;
2107
2108 if (wakeup) {
2109 enable_irq(st->irq);
2110 disable_irq_wake(st->irq);
2111 result = inv_mpu6050_set_wom_lp(st, false);
2112 if (result)
2113 return result;
2114 } else {
2115 result = inv_mpu_core_enable_regulator_vddio(st);
2116 if (result)
2117 return result;
2118 result = inv_mpu6050_set_power_itg(st, true);
2119 if (result)
2120 return result;
2121 }
2122
2123 pm_runtime_disable(dev);
2124 pm_runtime_set_active(dev);
2125 pm_runtime_enable(dev);
2126
2127 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
2128 if (result)
2129 return result;
2130
2131 if (st->chip_config.wom_en && !wakeup) {
2132 result = inv_mpu6050_set_wom_int(st, true);
2133 if (result)
2134 return result;
2135 }
2136
2137 if (iio_buffer_enabled(indio_dev))
2138 result = inv_mpu6050_prepare_fifo(st, true);
2139
2140 return result;
2141 }
2142
2143 static int inv_mpu_suspend(struct device *dev)
2144 {
2145 struct iio_dev *indio_dev = dev_get_drvdata(dev);
2146 struct inv_mpu6050_state *st = iio_priv(indio_dev);
2147 bool wakeup;
2148 int result;
2149
2150 guard(mutex)(&st->lock);
2151
2152 st->suspended_sensors = 0;
2153 if (pm_runtime_suspended(dev))
2154 return 0;
2155
2156 if (iio_buffer_enabled(indio_dev)) {
2157 result = inv_mpu6050_prepare_fifo(st, false);
2158 if (result)
2159 return result;
2160 }
2161
2162 wakeup = device_may_wakeup(dev) && st->chip_config.wom_en;
2163
2164 if (st->chip_config.wom_en && !wakeup) {
2165 result = inv_mpu6050_set_wom_int(st, false);
2166 if (result)
2167 return result;
2168 }
2169
2170 if (st->chip_config.accl_en && !wakeup)
2171 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
2172 if (st->chip_config.gyro_en)
2173 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO;
2174 if (st->chip_config.temp_en)
2175 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP;
2176 if (st->chip_config.magn_en)
2177 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN;
2178 if (st->chip_config.wom_en && !wakeup)
2179 st->suspended_sensors |= INV_MPU6050_SENSOR_WOM;
2180 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors);
2181 if (result)
2182 return result;
2183
2184 if (wakeup) {
2185 result = inv_mpu6050_set_wom_lp(st, true);
2186 if (result)
2187 return result;
2188 enable_irq_wake(st->irq);
2189 disable_irq(st->irq);
2190 } else {
2191 result = inv_mpu6050_set_power_itg(st, false);
2192 if (result)
2193 return result;
2194 inv_mpu_core_disable_regulator_vddio(st);
2195 }
2196
2197 return 0;
2198 }
2199
2200 static int inv_mpu_runtime_suspend(struct device *dev)
2201 {
2202 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
2203 unsigned int sensors;
2204 int ret;
2205
2206 mutex_lock(&st->lock);
2207
2208 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
2209 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN |
2210 INV_MPU6050_SENSOR_WOM;
2211 ret = inv_mpu6050_switch_engine(st, false, sensors);
2212 if (ret)
2213 goto out_unlock;
2214
2215 ret = inv_mpu6050_set_power_itg(st, false);
2216 if (ret)
2217 goto out_unlock;
2218
2219 inv_mpu_core_disable_regulator_vddio(st);
2220
2221 out_unlock:
2222 mutex_unlock(&st->lock);
2223 return ret;
2224 }
2225
2226 static int inv_mpu_runtime_resume(struct device *dev)
2227 {
2228 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
2229 int ret;
2230
2231 ret = inv_mpu_core_enable_regulator_vddio(st);
2232 if (ret)
2233 return ret;
2234
2235 return inv_mpu6050_set_power_itg(st, true);
2236 }
2237
2238 EXPORT_NS_GPL_DEV_PM_OPS(inv_mpu_pmops, IIO_MPU6050) = {
2239 SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume)
2240 RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL)
2241 };
2242
2243 MODULE_AUTHOR("Invensense Corporation");
2244 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
2245 MODULE_LICENSE("GPL");
2246 MODULE_IMPORT_NS("IIO_INV_SENSORS_TIMESTAMP");
Linux Kernel