1 Altera SOCFPGA Arria10 FPGA Manager
4 - compatible : should contain "altr,socfpga-a10-fpga-mgr"
5 - reg : base address and size for memory mapped io.
6 - The first index is for FPGA manager register access.
7 - The second index is for writing FPGA configuration data.
8 - resets : Phandle and reset specifier for the device's reset.
9 - clocks : Clocks used by the device.
13 fpga_mgr: fpga-mgr@ffd03000 {
14 compatible = "altr,socfpga-a10-fpga-mgr";
15 reg = <0xffd03000 0x100
17 clocks = <&l4_mp_clk>;
18 resets = <&rst FPGAMGR_RESET>;