2 * IDT Interprise 79RC32434 watchdog driver
4 * Copyright (C) 2006, Ondrej Zajicek <santiago@crfreenet.org>
5 * Copyright (C) 2008, Florian Fainelli <florian@openwrt.org>
8 * SoftDog 0.05: A Software Watchdog Device
10 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
11 * All Rights Reserved.
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22 #include <linux/module.h> /* For module specific items */
23 #include <linux/moduleparam.h> /* For new moduleparam's */
24 #include <linux/types.h> /* For standard types (like size_t) */
25 #include <linux/errno.h> /* For the -ENODEV/... values */
26 #include <linux/kernel.h> /* For printk/panic/... */
27 #include <linux/fs.h> /* For file operations */
28 #include <linux/miscdevice.h> /* For struct miscdevice */
29 #include <linux/watchdog.h> /* For the watchdog specific items */
30 #include <linux/init.h> /* For __init/__exit/... */
31 #include <linux/platform_device.h> /* For platform_driver framework */
32 #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
33 #include <linux/uaccess.h> /* For copy_to_user/put_user/... */
34 #include <linux/io.h> /* For devm_ioremap_nocache */
36 #include <asm/mach-rc32434/integ.h> /* For the Watchdog registers */
45 static struct integ __iomem
*wdt_reg
;
47 static int expect_close
;
49 /* Board internal clock speed in Hz,
50 * the watchdog timer ticks at. */
51 extern unsigned int idt_cpu_freq
;
53 /* translate wtcompare value to seconds and vice versa */
54 #define WTCOMP2SEC(x) (x / idt_cpu_freq)
55 #define SEC2WTCOMP(x) (x * idt_cpu_freq)
57 /* Use a default timeout of 20s. This should be
58 * safe for CPU clock speeds up to 400MHz, as
59 * ((2 ^ 32) - 1) / (400MHz / 2) = 21s. */
60 #define WATCHDOG_TIMEOUT 20
62 static int timeout
= WATCHDOG_TIMEOUT
;
63 module_param(timeout
, int, 0);
64 MODULE_PARM_DESC(timeout
, "Watchdog timeout value, in seconds (default="
65 __MODULE_STRING(WATCHDOG_TIMEOUT
) ")");
67 static bool nowayout
= WATCHDOG_NOWAYOUT
;
68 module_param(nowayout
, bool, 0);
69 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default="
70 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
72 /* apply or and nand masks to data read from addr and write back */
73 #define SET_BITS(addr, or, nand) \
74 writel((readl(&addr) | or) & ~nand, &addr)
76 static int rc32434_wdt_set(int new_timeout
)
78 int max_to
= WTCOMP2SEC((u32
)-1);
80 if (new_timeout
< 0 || new_timeout
> max_to
) {
81 pr_err("timeout value must be between 0 and %d\n", max_to
);
84 timeout
= new_timeout
;
85 spin_lock(&rc32434_wdt_device
.io_lock
);
86 writel(SEC2WTCOMP(timeout
), &wdt_reg
->wtcompare
);
87 spin_unlock(&rc32434_wdt_device
.io_lock
);
92 static void rc32434_wdt_start(void)
96 spin_lock(&rc32434_wdt_device
.io_lock
);
98 /* zero the counter before enabling */
99 writel(0, &wdt_reg
->wtcount
);
101 /* don't generate a non-maskable interrupt,
102 * do a warm reset instead */
103 nand
= 1 << RC32434_ERR_WNE
;
104 or = 1 << RC32434_ERR_WRE
;
106 /* reset the ERRCS timeout bit in case it's set */
107 nand
|= 1 << RC32434_ERR_WTO
;
109 SET_BITS(wdt_reg
->errcs
, or, nand
);
111 /* set the timeout (either default or based on module param) */
112 rc32434_wdt_set(timeout
);
114 /* reset WTC timeout bit and enable WDT */
115 nand
= 1 << RC32434_WTC_TO
;
116 or = 1 << RC32434_WTC_EN
;
118 SET_BITS(wdt_reg
->wtc
, or, nand
);
120 spin_unlock(&rc32434_wdt_device
.io_lock
);
121 pr_info("Started watchdog timer\n");
124 static void rc32434_wdt_stop(void)
126 spin_lock(&rc32434_wdt_device
.io_lock
);
129 SET_BITS(wdt_reg
->wtc
, 0, 1 << RC32434_WTC_EN
);
131 spin_unlock(&rc32434_wdt_device
.io_lock
);
132 pr_info("Stopped watchdog timer\n");
135 static void rc32434_wdt_ping(void)
137 spin_lock(&rc32434_wdt_device
.io_lock
);
138 writel(0, &wdt_reg
->wtcount
);
139 spin_unlock(&rc32434_wdt_device
.io_lock
);
142 static int rc32434_wdt_open(struct inode
*inode
, struct file
*file
)
144 if (test_and_set_bit(0, &rc32434_wdt_device
.inuse
))
148 __module_get(THIS_MODULE
);
153 return nonseekable_open(inode
, file
);
156 static int rc32434_wdt_release(struct inode
*inode
, struct file
*file
)
158 if (expect_close
== 42) {
160 module_put(THIS_MODULE
);
162 pr_crit("device closed unexpectedly. WDT will not stop!\n");
165 clear_bit(0, &rc32434_wdt_device
.inuse
);
169 static ssize_t
rc32434_wdt_write(struct file
*file
, const char *data
,
170 size_t len
, loff_t
*ppos
)
176 /* In case it was set long ago */
179 for (i
= 0; i
!= len
; i
++) {
181 if (get_user(c
, data
+ i
))
193 static long rc32434_wdt_ioctl(struct file
*file
, unsigned int cmd
,
196 void __user
*argp
= (void __user
*)arg
;
199 static const struct watchdog_info ident
= {
200 .options
= WDIOF_SETTIMEOUT
|
201 WDIOF_KEEPALIVEPING
|
203 .identity
= "RC32434_WDT Watchdog",
206 case WDIOC_GETSUPPORT
:
207 if (copy_to_user(argp
, &ident
, sizeof(ident
)))
210 case WDIOC_GETSTATUS
:
211 case WDIOC_GETBOOTSTATUS
:
213 if (copy_to_user(argp
, &value
, sizeof(int)))
216 case WDIOC_SETOPTIONS
:
217 if (copy_from_user(&value
, argp
, sizeof(int)))
220 case WDIOS_ENABLECARD
:
223 case WDIOS_DISABLECARD
:
230 case WDIOC_KEEPALIVE
:
233 case WDIOC_SETTIMEOUT
:
234 if (copy_from_user(&new_timeout
, argp
, sizeof(int)))
236 if (rc32434_wdt_set(new_timeout
))
239 case WDIOC_GETTIMEOUT
:
240 return copy_to_user(argp
, &timeout
, sizeof(int));
248 static const struct file_operations rc32434_wdt_fops
= {
249 .owner
= THIS_MODULE
,
251 .write
= rc32434_wdt_write
,
252 .unlocked_ioctl
= rc32434_wdt_ioctl
,
253 .open
= rc32434_wdt_open
,
254 .release
= rc32434_wdt_release
,
257 static struct miscdevice rc32434_wdt_miscdev
= {
258 .minor
= WATCHDOG_MINOR
,
260 .fops
= &rc32434_wdt_fops
,
263 static int rc32434_wdt_probe(struct platform_device
*pdev
)
268 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "rb532_wdt_res");
270 pr_err("failed to retrieve resources\n");
274 wdt_reg
= devm_ioremap_nocache(&pdev
->dev
, r
->start
, resource_size(r
));
276 pr_err("failed to remap I/O resources\n");
280 spin_lock_init(&rc32434_wdt_device
.io_lock
);
282 /* Make sure the watchdog is not running */
285 /* Check that the heartbeat value is within it's range;
286 * if not reset to the default */
287 if (rc32434_wdt_set(timeout
)) {
288 rc32434_wdt_set(WATCHDOG_TIMEOUT
);
289 pr_info("timeout value must be between 0 and %d\n",
290 WTCOMP2SEC((u32
)-1));
293 ret
= misc_register(&rc32434_wdt_miscdev
);
295 pr_err("failed to register watchdog device\n");
299 pr_info("Watchdog Timer version " VERSION
", timer margin: %d sec\n",
305 static int rc32434_wdt_remove(struct platform_device
*pdev
)
307 misc_deregister(&rc32434_wdt_miscdev
);
311 static void rc32434_wdt_shutdown(struct platform_device
*pdev
)
316 static struct platform_driver rc32434_wdt_driver
= {
317 .probe
= rc32434_wdt_probe
,
318 .remove
= rc32434_wdt_remove
,
319 .shutdown
= rc32434_wdt_shutdown
,
321 .name
= "rc32434_wdt",
325 module_platform_driver(rc32434_wdt_driver
);
327 MODULE_AUTHOR("Ondrej Zajicek <santiago@crfreenet.org>,"
328 "Florian Fainelli <florian@openwrt.org>");
329 MODULE_DESCRIPTION("Driver for the IDT RC32434 SoC watchdog");
330 MODULE_LICENSE("GPL");