drivers/regulator/qcom_smd-regulator.c

   1 /*
   2  * Copyright (c) 2015, Sony Mobile Communications AB.
   3  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 and
   7  * only version 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/of_device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/regulator/driver.h>
  20 #include <linux/regulator/machine.h>
  21 #include <linux/regulator/of_regulator.h>
  22 #include <linux/soc/qcom/smd-rpm.h>
  23
  24 struct qcom_rpm_reg {
  25         struct device *dev;
  26
  27         struct qcom_smd_rpm *rpm;
  28
  29         u32 type;
  30         u32 id;
  31
  32         struct regulator_desc desc;
  33
  34         int is_enabled;
  35         int uV;
  36 };
  37
  38 struct rpm_regulator_req {
  39         __le32 key;
  40         __le32 nbytes;
  41         __le32 value;
  42 };
  43
  44 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
  45 #define RPM_KEY_UV      0x00007675 /* "uv" */
  46 #define RPM_KEY_MA      0x0000616d /* "ma" */
  47
  48 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
  49                                 struct rpm_regulator_req *req,
  50                                 size_t size)
  51 {
  52         return qcom_rpm_smd_write(vreg->rpm,
  53                                   QCOM_SMD_RPM_ACTIVE_STATE,
  54                                   vreg->type,
  55                                   vreg->id,
  56                                   req, size);
  57 }
  58
  59 static int rpm_reg_enable(struct regulator_dev *rdev)
  60 {
  61         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  62         struct rpm_regulator_req req;
  63         int ret;
  64
  65         req.key = cpu_to_le32(RPM_KEY_SWEN);
  66         req.nbytes = cpu_to_le32(sizeof(u32));
  67         req.value = cpu_to_le32(1);
  68
  69         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  70         if (!ret)
  71                 vreg->is_enabled = 1;
  72
  73         return ret;
  74 }
  75
  76 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
  77 {
  78         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  79
  80         return vreg->is_enabled;
  81 }
  82
  83 static int rpm_reg_disable(struct regulator_dev *rdev)
  84 {
  85         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  86         struct rpm_regulator_req req;
  87         int ret;
  88
  89         req.key = cpu_to_le32(RPM_KEY_SWEN);
  90         req.nbytes = cpu_to_le32(sizeof(u32));
  91         req.value = 0;
  92
  93         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  94         if (!ret)
  95                 vreg->is_enabled = 0;
  96
  97         return ret;
  98 }
  99
 100 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
 101 {
 102         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 103
 104         return vreg->uV;
 105 }
 106
 107 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
 108                                int min_uV,
 109                                int max_uV,
 110                                unsigned *selector)
 111 {
 112         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 113         struct rpm_regulator_req req;
 114         int ret = 0;
 115
 116         req.key = cpu_to_le32(RPM_KEY_UV);
 117         req.nbytes = cpu_to_le32(sizeof(u32));
 118         req.value = cpu_to_le32(min_uV);
 119
 120         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 121         if (!ret)
 122                 vreg->uV = min_uV;
 123
 124         return ret;
 125 }
 126
 127 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
 128 {
 129         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 130         struct rpm_regulator_req req;
 131
 132         req.key = cpu_to_le32(RPM_KEY_MA);
 133         req.nbytes = cpu_to_le32(sizeof(u32));
 134         req.value = cpu_to_le32(load_uA / 1000);
 135
 136         return rpm_reg_write_active(vreg, &req, sizeof(req));
 137 }
 138
 139 static const struct regulator_ops rpm_smps_ldo_ops = {
 140         .enable = rpm_reg_enable,
 141         .disable = rpm_reg_disable,
 142         .is_enabled = rpm_reg_is_enabled,
 143
 144         .get_voltage = rpm_reg_get_voltage,
 145         .set_voltage = rpm_reg_set_voltage,
 146
 147         .set_load = rpm_reg_set_load,
 148 };
 149
 150 static const struct regulator_ops rpm_switch_ops = {
 151         .enable = rpm_reg_enable,
 152         .disable = rpm_reg_disable,
 153         .is_enabled = rpm_reg_is_enabled,
 154 };
 155
 156 static const struct regulator_desc pma8084_hfsmps = {
 157         .linear_ranges = (struct regulator_linear_range[]) {
 158                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
 159                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 160         },
 161         .n_linear_ranges = 2,
 162         .n_voltages = 159,
 163         .ops = &rpm_smps_ldo_ops,
 164 };
 165
 166 static const struct regulator_desc pma8084_ftsmps = {
 167         .linear_ranges = (struct regulator_linear_range[]) {
 168                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 169                 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
 170         },
 171         .n_linear_ranges = 2,
 172         .n_voltages = 340,
 173         .ops = &rpm_smps_ldo_ops,
 174 };
 175
 176 static const struct regulator_desc pma8084_pldo = {
 177         .linear_ranges = (struct regulator_linear_range[]) {
 178                 REGULATOR_LINEAR_RANGE(750000,  0,  30, 25000),
 179                 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
 180         },
 181         .n_linear_ranges = 2,
 182         .n_voltages = 100,
 183         .ops = &rpm_smps_ldo_ops,
 184 };
 185
 186 static const struct regulator_desc pma8084_nldo = {
 187         .linear_ranges = (struct regulator_linear_range[]) {
 188                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 189         },
 190         .n_linear_ranges = 1,
 191         .n_voltages = 64,
 192         .ops = &rpm_smps_ldo_ops,
 193 };
 194
 195 static const struct regulator_desc pma8084_switch = {
 196         .ops = &rpm_switch_ops,
 197 };
 198
 199 static const struct regulator_desc pm8x41_hfsmps = {
 200         .linear_ranges = (struct regulator_linear_range[]) {
 201                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 202                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 203         },
 204         .n_linear_ranges = 2,
 205         .n_voltages = 159,
 206         .ops = &rpm_smps_ldo_ops,
 207 };
 208
 209 static const struct regulator_desc pm8841_ftsmps = {
 210         .linear_ranges = (struct regulator_linear_range[]) {
 211                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 212                 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
 213         },
 214         .n_linear_ranges = 2,
 215         .n_voltages = 340,
 216         .ops = &rpm_smps_ldo_ops,
 217 };
 218
 219 static const struct regulator_desc pm8941_boost = {
 220         .linear_ranges = (struct regulator_linear_range[]) {
 221                 REGULATOR_LINEAR_RANGE(4000000, 0, 15, 100000),
 222         },
 223         .n_linear_ranges = 1,
 224         .n_voltages = 16,
 225         .ops = &rpm_smps_ldo_ops,
 226 };
 227
 228 static const struct regulator_desc pm8941_pldo = {
 229         .linear_ranges = (struct regulator_linear_range[]) {
 230                 REGULATOR_LINEAR_RANGE( 750000,  0,  30, 25000),
 231                 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
 232         },
 233         .n_linear_ranges = 2,
 234         .n_voltages = 100,
 235         .ops = &rpm_smps_ldo_ops,
 236 };
 237
 238 static const struct regulator_desc pm8941_nldo = {
 239         .linear_ranges = (struct regulator_linear_range[]) {
 240                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 241         },
 242         .n_linear_ranges = 1,
 243         .n_voltages = 64,
 244         .ops = &rpm_smps_ldo_ops,
 245 };
 246
 247 static const struct regulator_desc pm8941_lnldo = {
 248         .fixed_uV = 1740000,
 249         .n_voltages = 1,
 250         .ops = &rpm_smps_ldo_ops,
 251 };
 252
 253 static const struct regulator_desc pm8941_switch = {
 254         .ops = &rpm_switch_ops,
 255 };
 256
 257 static const struct regulator_desc pm8916_pldo = {
 258         .linear_ranges = (struct regulator_linear_range[]) {
 259                 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
 260         },
 261         .n_linear_ranges = 1,
 262         .n_voltages = 209,
 263         .ops = &rpm_smps_ldo_ops,
 264 };
 265
 266 static const struct regulator_desc pm8916_nldo = {
 267         .linear_ranges = (struct regulator_linear_range[]) {
 268                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 269         },
 270         .n_linear_ranges = 1,
 271         .n_voltages = 94,
 272         .ops = &rpm_smps_ldo_ops,
 273 };
 274
 275 static const struct regulator_desc pm8916_buck_lvo_smps = {
 276         .linear_ranges = (struct regulator_linear_range[]) {
 277                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 278                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
 279         },
 280         .n_linear_ranges = 2,
 281         .n_voltages = 128,
 282         .ops = &rpm_smps_ldo_ops,
 283 };
 284
 285 static const struct regulator_desc pm8916_buck_hvo_smps = {
 286         .linear_ranges = (struct regulator_linear_range[]) {
 287                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
 288         },
 289         .n_linear_ranges = 1,
 290         .n_voltages = 32,
 291         .ops = &rpm_smps_ldo_ops,
 292 };
 293
 294 struct rpm_regulator_data {
 295         const char *name;
 296         u32 type;
 297         u32 id;
 298         const struct regulator_desc *desc;
 299         const char *supply;
 300 };
 301
 302 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
 303         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
 304         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
 305         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
 306         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
 307         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
 308         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
 309         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
 310         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
 311         {}
 312 };
 313
 314 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
 315         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 316         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
 317         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
 318         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
 319         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
 320         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
 321         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
 322         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
 323         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
 324         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
 325         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
 326         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 327         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 328         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 329         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 330         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 331         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 332         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 333         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 334         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 335         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 336         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 337         {}
 338 };
 339
 340 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
 341         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
 342         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
 343         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
 344         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
 345
 346         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
 347         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
 348         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
 349         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
 350         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
 351         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 352         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
 353         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 354         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 355         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 356         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
 357         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 358         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 359         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 360         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 361         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 362         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 363         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 364         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 365         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 366         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
 367         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 368         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 369         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 370
 371         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 372         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 373         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 374
 375         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
 376         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
 377
 378         {}
 379 };
 380
 381 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
 382         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
 383         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
 384         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
 385         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
 386         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
 387         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
 388         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
 389         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
 390         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
 391         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
 392         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
 393         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
 394
 395         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
 396         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 397         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 398         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 399         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
 400         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 401         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
 402         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
 403         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 404         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 405         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
 406         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 407         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 408         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 409         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 410         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
 411         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
 412         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
 413         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
 414         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 415         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
 416         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
 417         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 418         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 419         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
 420         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 421         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 422
 423         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
 424         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
 425         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
 426         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
 427         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
 428
 429         {}
 430 };
 431
 432 static const struct of_device_id rpm_of_match[] = {
 433         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
 434         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
 435         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
 436         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
 437         {}
 438 };
 439 MODULE_DEVICE_TABLE(of, rpm_of_match);
 440
 441 static int rpm_reg_probe(struct platform_device *pdev)
 442 {
 443         const struct rpm_regulator_data *reg;
 444         const struct of_device_id *match;
 445         struct regulator_config config = { };
 446         struct regulator_dev *rdev;
 447         struct qcom_rpm_reg *vreg;
 448         struct qcom_smd_rpm *rpm;
 449
 450         rpm = dev_get_drvdata(pdev->dev.parent);
 451         if (!rpm) {
 452                 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
 453                 return -ENODEV;
 454         }
 455
 456         match = of_match_device(rpm_of_match, &pdev->dev);
 457         for (reg = match->data; reg->name; reg++) {
 458                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
 459                 if (!vreg)
 460                         return -ENOMEM;
 461
 462                 vreg->dev = &pdev->dev;
 463                 vreg->type = reg->type;
 464                 vreg->id = reg->id;
 465                 vreg->rpm = rpm;
 466
 467                 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
 468
 469                 vreg->desc.id = -1;
 470                 vreg->desc.owner = THIS_MODULE;
 471                 vreg->desc.type = REGULATOR_VOLTAGE;
 472                 vreg->desc.name = reg->name;
 473                 vreg->desc.supply_name = reg->supply;
 474                 vreg->desc.of_match = reg->name;
 475
 476                 config.dev = &pdev->dev;
 477                 config.driver_data = vreg;
 478                 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
 479                 if (IS_ERR(rdev)) {
 480                         dev_err(&pdev->dev, "failed to register %s\n", reg->name);
 481                         return PTR_ERR(rdev);
 482                 }
 483         }
 484
 485         return 0;
 486 }
 487
 488 static struct platform_driver rpm_reg_driver = {
 489         .probe = rpm_reg_probe,
 490         .driver = {
 491                 .name  = "qcom_rpm_smd_regulator",
 492                 .of_match_table = rpm_of_match,
 493         },
 494 };
 495
 496 static int __init rpm_reg_init(void)
 497 {
 498         return platform_driver_register(&rpm_reg_driver);
 499 }
 500 subsys_initcall(rpm_reg_init);
 501
 502 static void __exit rpm_reg_exit(void)
 503 {
 504         platform_driver_unregister(&rpm_reg_driver);
 505 }
 506 module_exit(rpm_reg_exit)
 507
 508 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
 509 MODULE_LICENSE("GPL v2");