2 * Copyright 2007-2009 Analog Devices Inc.
3 * Graff Yang <graf.yang@analog.com>
5 * Licensed under the GPL-2 or later.
9 #include <asm/blackfin.h>
10 #include <asm/cacheflush.h>
15 void platform_cpu_die(void)
22 * When CoreB wakes up, the code in _coreb_trampoline_start cannot
23 * turn off the data cache. This causes the CoreB failed to boot.
24 * As a workaround, we invalidate all the data cache before sleep.
26 blackfin_invalidate_entire_dcache();
28 /* disable core timer */
31 /* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */
32 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));
35 /* set CoreB wakeup by ipi0, iwr will be discarded */
36 bfin_iwr_set_sup0(&iwr
, &iwr
, &iwr
);