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[PATCH] USB: Rename hcd->hub_suspend to hcd->bus_suspend
[linux/fpc-iii.git] / drivers / net / r8169.c
blob159b56a56ef49112fc5e58083c76a3066eb76958
1 /*
2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
5
6 History:
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 2004 - Massive updates. See kernel SCM system for details.
10 =========================================================================
11 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12 Command: 'insmod r8169 media = SET_MEDIA'
13 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
14
15 SET_MEDIA can be:
16 _10_Half = 0x01
17 _10_Full = 0x02
18 _100_Half = 0x04
19 _100_Full = 0x08
20 _1000_Full = 0x10
21
22 2. Support TBI mode.
23 =========================================================================
24 VERSION 1.1 <2002/10/4>
25
26 The bit4:0 of MII register 4 is called "selector field", and have to be
27 00001b to indicate support of IEEE std 802.3 during NWay process of
28 exchanging Link Code Word (FLP).
29
30 VERSION 1.2 <2002/11/30>
31
32 - Large style cleanup
33 - Use ether_crc in stock kernel (linux/crc32.h)
34 - Copy mc_filter setup code from 8139cp
35 (includes an optimization, and avoids set_bit use)
36
37 VERSION 1.6LK <2004/04/14>
38
39 - Merge of Realtek's version 1.6
40 - Conversion to DMA API
41 - Suspend/resume
42 - Endianness
43 - Misc Rx/Tx bugs
44
45 VERSION 2.2LK <2005/01/25>
46
47 - RX csum, TX csum/SG, TSO
48 - VLAN
49 - baby (< 7200) Jumbo frames support
50 - Merge of Realtek's version 2.2 (new phy)
51 */
52
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
63 #include <linux/in.h>
64 #include <linux/ip.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
68
69 #include <asm/io.h>
70 #include <asm/irq.h>
71
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX "-NAPI"
74 #else
75 #define NAPI_SUFFIX ""
76 #endif
77
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
81
82 #ifdef RTL8169_DEBUG
83 #define assert(expr) \
84 if(!(expr)) { \
85 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86 #expr,__FILE__,__FUNCTION__,__LINE__); \
87 }
88 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
89 #else
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...) do {} while (0)
92 #endif /* RTL8169_DEBUG */
93
94 #define R8169_MSG_DEFAULT \
95 (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
96
97 #define TX_BUFFS_AVAIL(tp) \
98 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
99
100 #ifdef CONFIG_R8169_NAPI
101 #define rtl8169_rx_skb netif_receive_skb
102 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
103 #define rtl8169_rx_quota(count, quota) min(count, quota)
104 #else
105 #define rtl8169_rx_skb netif_rx
106 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
107 #define rtl8169_rx_quota(count, quota) count
108 #endif
109
110 /* media options */
111 #define MAX_UNITS 8
112 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
113 static int num_media = 0;
114
115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
116 static int max_interrupt_work = 20;
117
118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
119 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
120 static int multicast_filter_limit = 32;
121
122 /* MAC address length */
123 #define MAC_ADDR_LEN 6
124
125 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
126 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
127 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
128 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
129 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
130 #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
131 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
132
133 #define R8169_REGS_SIZE 256
134 #define R8169_NAPI_WEIGHT 64
135 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
136 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
137 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
138 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
139 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
140
141 #define RTL8169_TX_TIMEOUT (6*HZ)
142 #define RTL8169_PHY_TIMEOUT (10*HZ)
143
144 /* write/read MMIO register */
145 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
146 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
147 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
148 #define RTL_R8(reg) readb (ioaddr + (reg))
149 #define RTL_R16(reg) readw (ioaddr + (reg))
150 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
151
152 enum mac_version {
153 RTL_GIGA_MAC_VER_B = 0x00,
154 /* RTL_GIGA_MAC_VER_C = 0x03, */
155 RTL_GIGA_MAC_VER_D = 0x01,
156 RTL_GIGA_MAC_VER_E = 0x02,
157 RTL_GIGA_MAC_VER_X = 0x04 /* Greater than RTL_GIGA_MAC_VER_E */
158 };
159
160 enum phy_version {
161 RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
162 RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
163 RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
164 RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
165 RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
166 RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
167 };
168
169
170 #define _R(NAME,MAC,MASK) \
171 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
172
173 const static struct {
174 const char *name;
175 u8 mac_version;
176 u32 RxConfigMask; /* Clears the bits supported by this chip */
177 } rtl_chip_info[] = {
178 _R("RTL8169", RTL_GIGA_MAC_VER_B, 0xff7e1880),
179 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_D, 0xff7e1880),
180 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_E, 0xff7e1880),
181 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_X, 0xff7e1880),
182 };
183 #undef _R
184
185 static struct pci_device_id rtl8169_pci_tbl[] = {
186 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), },
187 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), },
188 { PCI_DEVICE(0x16ec, 0x0116), },
189 { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, 0x0024, },
190 {0,},
191 };
192
193 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
194
195 static int rx_copybreak = 200;
196 static int use_dac;
197 static struct {
198 u32 msg_enable;
199 } debug = { -1 };
200
201 enum RTL8169_registers {
202 MAC0 = 0, /* Ethernet hardware address. */
203 MAR0 = 8, /* Multicast filter. */
204 CounterAddrLow = 0x10,
205 CounterAddrHigh = 0x14,
206 TxDescStartAddrLow = 0x20,
207 TxDescStartAddrHigh = 0x24,
208 TxHDescStartAddrLow = 0x28,
209 TxHDescStartAddrHigh = 0x2c,
210 FLASH = 0x30,
211 ERSR = 0x36,
212 ChipCmd = 0x37,
213 TxPoll = 0x38,
214 IntrMask = 0x3C,
215 IntrStatus = 0x3E,
216 TxConfig = 0x40,
217 RxConfig = 0x44,
218 RxMissed = 0x4C,
219 Cfg9346 = 0x50,
220 Config0 = 0x51,
221 Config1 = 0x52,
222 Config2 = 0x53,
223 Config3 = 0x54,
224 Config4 = 0x55,
225 Config5 = 0x56,
226 MultiIntr = 0x5C,
227 PHYAR = 0x60,
228 TBICSR = 0x64,
229 TBI_ANAR = 0x68,
230 TBI_LPAR = 0x6A,
231 PHYstatus = 0x6C,
232 RxMaxSize = 0xDA,
233 CPlusCmd = 0xE0,
234 IntrMitigate = 0xE2,
235 RxDescAddrLow = 0xE4,
236 RxDescAddrHigh = 0xE8,
237 EarlyTxThres = 0xEC,
238 FuncEvent = 0xF0,
239 FuncEventMask = 0xF4,
240 FuncPresetState = 0xF8,
241 FuncForceEvent = 0xFC,
242 };
243
244 enum RTL8169_register_content {
245 /* InterruptStatusBits */
246 SYSErr = 0x8000,
247 PCSTimeout = 0x4000,
248 SWInt = 0x0100,
249 TxDescUnavail = 0x80,
250 RxFIFOOver = 0x40,
251 LinkChg = 0x20,
252 RxOverflow = 0x10,
253 TxErr = 0x08,
254 TxOK = 0x04,
255 RxErr = 0x02,
256 RxOK = 0x01,
257
258 /* RxStatusDesc */
259 RxRES = 0x00200000,
260 RxCRC = 0x00080000,
261 RxRUNT = 0x00100000,
262 RxRWT = 0x00400000,
263
264 /* ChipCmdBits */
265 CmdReset = 0x10,
266 CmdRxEnb = 0x08,
267 CmdTxEnb = 0x04,
268 RxBufEmpty = 0x01,
269
270 /* Cfg9346Bits */
271 Cfg9346_Lock = 0x00,
272 Cfg9346_Unlock = 0xC0,
273
274 /* rx_mode_bits */
275 AcceptErr = 0x20,
276 AcceptRunt = 0x10,
277 AcceptBroadcast = 0x08,
278 AcceptMulticast = 0x04,
279 AcceptMyPhys = 0x02,
280 AcceptAllPhys = 0x01,
281
282 /* RxConfigBits */
283 RxCfgFIFOShift = 13,
284 RxCfgDMAShift = 8,
285
286 /* TxConfigBits */
287 TxInterFrameGapShift = 24,
288 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
289
290 /* TBICSR p.28 */
291 TBIReset = 0x80000000,
292 TBILoopback = 0x40000000,
293 TBINwEnable = 0x20000000,
294 TBINwRestart = 0x10000000,
295 TBILinkOk = 0x02000000,
296 TBINwComplete = 0x01000000,
297
298 /* CPlusCmd p.31 */
299 RxVlan = (1 << 6),
300 RxChkSum = (1 << 5),
301 PCIDAC = (1 << 4),
302 PCIMulRW = (1 << 3),
303
304 /* rtl8169_PHYstatus */
305 TBI_Enable = 0x80,
306 TxFlowCtrl = 0x40,
307 RxFlowCtrl = 0x20,
308 _1000bpsF = 0x10,
309 _100bps = 0x08,
310 _10bps = 0x04,
311 LinkStatus = 0x02,
312 FullDup = 0x01,
313
314 /* GIGABIT_PHY_registers */
315 PHY_CTRL_REG = 0,
316 PHY_STAT_REG = 1,
317 PHY_AUTO_NEGO_REG = 4,
318 PHY_1000_CTRL_REG = 9,
319
320 /* GIGABIT_PHY_REG_BIT */
321 PHY_Restart_Auto_Nego = 0x0200,
322 PHY_Enable_Auto_Nego = 0x1000,
323
324 /* PHY_STAT_REG = 1 */
325 PHY_Auto_Neco_Comp = 0x0020,
326
327 /* PHY_AUTO_NEGO_REG = 4 */
328 PHY_Cap_10_Half = 0x0020,
329 PHY_Cap_10_Full = 0x0040,
330 PHY_Cap_100_Half = 0x0080,
331 PHY_Cap_100_Full = 0x0100,
332
333 /* PHY_1000_CTRL_REG = 9 */
334 PHY_Cap_1000_Full = 0x0200,
335
336 PHY_Cap_Null = 0x0,
337
338 /* _MediaType */
339 _10_Half = 0x01,
340 _10_Full = 0x02,
341 _100_Half = 0x04,
342 _100_Full = 0x08,
343 _1000_Full = 0x10,
344
345 /* _TBICSRBit */
346 TBILinkOK = 0x02000000,
347
348 /* DumpCounterCommand */
349 CounterDump = 0x8,
350 };
351
352 enum _DescStatusBit {
353 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
354 RingEnd = (1 << 30), /* End of descriptor ring */
355 FirstFrag = (1 << 29), /* First segment of a packet */
356 LastFrag = (1 << 28), /* Final segment of a packet */
357
358 /* Tx private */
359 LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
360 MSSShift = 16, /* MSS value position */
361 MSSMask = 0xfff, /* MSS value + LargeSend bit: 12 bits */
362 IPCS = (1 << 18), /* Calculate IP checksum */
363 UDPCS = (1 << 17), /* Calculate UDP/IP checksum */
364 TCPCS = (1 << 16), /* Calculate TCP/IP checksum */
365 TxVlanTag = (1 << 17), /* Add VLAN tag */
366
367 /* Rx private */
368 PID1 = (1 << 18), /* Protocol ID bit 1/2 */
369 PID0 = (1 << 17), /* Protocol ID bit 2/2 */
370
371 #define RxProtoUDP (PID1)
372 #define RxProtoTCP (PID0)
373 #define RxProtoIP (PID1 | PID0)
374 #define RxProtoMask RxProtoIP
375
376 IPFail = (1 << 16), /* IP checksum failed */
377 UDPFail = (1 << 15), /* UDP/IP checksum failed */
378 TCPFail = (1 << 14), /* TCP/IP checksum failed */
379 RxVlanTag = (1 << 16), /* VLAN tag available */
380 };
381
382 #define RsvdMask 0x3fffc000
383
384 struct TxDesc {
385 u32 opts1;
386 u32 opts2;
387 u64 addr;
388 };
389
390 struct RxDesc {
391 u32 opts1;
392 u32 opts2;
393 u64 addr;
394 };
395
396 struct ring_info {
397 struct sk_buff *skb;
398 u32 len;
399 u8 __pad[sizeof(void *) - sizeof(u32)];
400 };
401
402 struct rtl8169_private {
403 void __iomem *mmio_addr; /* memory map physical address */
404 struct pci_dev *pci_dev; /* Index of PCI device */
405 struct net_device_stats stats; /* statistics of net device */
406 spinlock_t lock; /* spin lock flag */
407 u32 msg_enable;
408 int chipset;
409 int mac_version;
410 int phy_version;
411 u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
412 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
413 u32 dirty_rx;
414 u32 dirty_tx;
415 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
416 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
417 dma_addr_t TxPhyAddr;
418 dma_addr_t RxPhyAddr;
419 struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
420 struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
421 unsigned rx_buf_sz;
422 struct timer_list timer;
423 u16 cp_cmd;
424 u16 intr_mask;
425 int phy_auto_nego_reg;
426 int phy_1000_ctrl_reg;
427 #ifdef CONFIG_R8169_VLAN
428 struct vlan_group *vlgrp;
429 #endif
430 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
431 void (*get_settings)(struct net_device *, struct ethtool_cmd *);
432 void (*phy_reset_enable)(void __iomem *);
433 unsigned int (*phy_reset_pending)(void __iomem *);
434 unsigned int (*link_ok)(void __iomem *);
435 struct work_struct task;
436 };
437
438 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
439 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
440 module_param_array(media, int, &num_media, 0);
441 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
442 module_param(rx_copybreak, int, 0);
443 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
444 module_param(use_dac, int, 0);
445 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
446 module_param_named(debug, debug.msg_enable, int, 0);
447 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
448 MODULE_LICENSE("GPL");
449 MODULE_VERSION(RTL8169_VERSION);
450
451 static int rtl8169_open(struct net_device *dev);
452 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
453 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
454 struct pt_regs *regs);
455 static int rtl8169_init_ring(struct net_device *dev);
456 static void rtl8169_hw_start(struct net_device *dev);
457 static int rtl8169_close(struct net_device *dev);
458 static void rtl8169_set_rx_mode(struct net_device *dev);
459 static void rtl8169_tx_timeout(struct net_device *dev);
460 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
461 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
462 void __iomem *);
463 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
464 static void rtl8169_down(struct net_device *dev);
465
466 #ifdef CONFIG_R8169_NAPI
467 static int rtl8169_poll(struct net_device *dev, int *budget);
468 #endif
469
470 static const u16 rtl8169_intr_mask =
471 SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
472 static const u16 rtl8169_napi_event =
473 RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
474 static const unsigned int rtl8169_rx_config =
475 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
476
477 #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
478 #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
479 #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
480 #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
481
482 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
483 {
484 int i;
485
486 RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
487 udelay(1000);
488
489 for (i = 2000; i > 0; i--) {
490 /* Check if the RTL8169 has completed writing to the specified MII register */
491 if (!(RTL_R32(PHYAR) & 0x80000000))
492 break;
493 udelay(100);
494 }
495 }
496
497 static int mdio_read(void __iomem *ioaddr, int RegAddr)
498 {
499 int i, value = -1;
500
501 RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
502 udelay(1000);
503
504 for (i = 2000; i > 0; i--) {
505 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
506 if (RTL_R32(PHYAR) & 0x80000000) {
507 value = (int) (RTL_R32(PHYAR) & 0xFFFF);
508 break;
509 }
510 udelay(100);
511 }
512 return value;
513 }
514
515 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
516 {
517 RTL_W16(IntrMask, 0x0000);
518
519 RTL_W16(IntrStatus, 0xffff);
520 }
521
522 static void rtl8169_asic_down(void __iomem *ioaddr)
523 {
524 RTL_W8(ChipCmd, 0x00);
525 rtl8169_irq_mask_and_ack(ioaddr);
526 RTL_R16(CPlusCmd);
527 }
528
529 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
530 {
531 return RTL_R32(TBICSR) & TBIReset;
532 }
533
534 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
535 {
536 return mdio_read(ioaddr, 0) & 0x8000;
537 }
538
539 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
540 {
541 return RTL_R32(TBICSR) & TBILinkOk;
542 }
543
544 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
545 {
546 return RTL_R8(PHYstatus) & LinkStatus;
547 }
548
549 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
550 {
551 RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
552 }
553
554 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
555 {
556 unsigned int val;
557
558 val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff;
559 mdio_write(ioaddr, PHY_CTRL_REG, val);
560 }
561
562 static void rtl8169_check_link_status(struct net_device *dev,
563 struct rtl8169_private *tp, void __iomem *ioaddr)
564 {
565 unsigned long flags;
566
567 spin_lock_irqsave(&tp->lock, flags);
568 if (tp->link_ok(ioaddr)) {
569 netif_carrier_on(dev);
570 if (netif_msg_ifup(tp))
571 printk(KERN_INFO PFX "%s: link up\n", dev->name);
572 } else {
573 if (netif_msg_ifdown(tp))
574 printk(KERN_INFO PFX "%s: link down\n", dev->name);
575 netif_carrier_off(dev);
576 }
577 spin_unlock_irqrestore(&tp->lock, flags);
578 }
579
580 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
581 {
582 struct {
583 u16 speed;
584 u8 duplex;
585 u8 autoneg;
586 u8 media;
587 } link_settings[] = {
588 { SPEED_10, DUPLEX_HALF, AUTONEG_DISABLE, _10_Half },
589 { SPEED_10, DUPLEX_FULL, AUTONEG_DISABLE, _10_Full },
590 { SPEED_100, DUPLEX_HALF, AUTONEG_DISABLE, _100_Half },
591 { SPEED_100, DUPLEX_FULL, AUTONEG_DISABLE, _100_Full },
592 { SPEED_1000, DUPLEX_FULL, AUTONEG_DISABLE, _1000_Full },
593 /* Make TBI happy */
594 { SPEED_1000, DUPLEX_FULL, AUTONEG_ENABLE, 0xff }
595 }, *p;
596 unsigned char option;
597
598 option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
599
600 if ((option != 0xff) && !idx && netif_msg_drv(&debug))
601 printk(KERN_WARNING PFX "media option is deprecated.\n");
602
603 for (p = link_settings; p->media != 0xff; p++) {
604 if (p->media == option)
605 break;
606 }
607 *autoneg = p->autoneg;
608 *speed = p->speed;
609 *duplex = p->duplex;
610 }
611
612 static void rtl8169_get_drvinfo(struct net_device *dev,
613 struct ethtool_drvinfo *info)
614 {
615 struct rtl8169_private *tp = netdev_priv(dev);
616
617 strcpy(info->driver, MODULENAME);
618 strcpy(info->version, RTL8169_VERSION);
619 strcpy(info->bus_info, pci_name(tp->pci_dev));
620 }
621
622 static int rtl8169_get_regs_len(struct net_device *dev)
623 {
624 return R8169_REGS_SIZE;
625 }
626
627 static int rtl8169_set_speed_tbi(struct net_device *dev,
628 u8 autoneg, u16 speed, u8 duplex)
629 {
630 struct rtl8169_private *tp = netdev_priv(dev);
631 void __iomem *ioaddr = tp->mmio_addr;
632 int ret = 0;
633 u32 reg;
634
635 reg = RTL_R32(TBICSR);
636 if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
637 (duplex == DUPLEX_FULL)) {
638 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
639 } else if (autoneg == AUTONEG_ENABLE)
640 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
641 else {
642 if (netif_msg_link(tp)) {
643 printk(KERN_WARNING "%s: "
644 "incorrect speed setting refused in TBI mode\n",
645 dev->name);
646 }
647 ret = -EOPNOTSUPP;
648 }
649
650 return ret;
651 }
652
653 static int rtl8169_set_speed_xmii(struct net_device *dev,
654 u8 autoneg, u16 speed, u8 duplex)
655 {
656 struct rtl8169_private *tp = netdev_priv(dev);
657 void __iomem *ioaddr = tp->mmio_addr;
658 int auto_nego, giga_ctrl;
659
660 auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
661 auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full |
662 PHY_Cap_100_Half | PHY_Cap_100_Full);
663 giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG);
664 giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_Null);
665
666 if (autoneg == AUTONEG_ENABLE) {
667 auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full |
668 PHY_Cap_100_Half | PHY_Cap_100_Full);
669 giga_ctrl |= PHY_Cap_1000_Full;
670 } else {
671 if (speed == SPEED_10)
672 auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full;
673 else if (speed == SPEED_100)
674 auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full;
675 else if (speed == SPEED_1000)
676 giga_ctrl |= PHY_Cap_1000_Full;
677
678 if (duplex == DUPLEX_HALF)
679 auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full);
680 }
681
682 tp->phy_auto_nego_reg = auto_nego;
683 tp->phy_1000_ctrl_reg = giga_ctrl;
684
685 mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego);
686 mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl);
687 mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego |
688 PHY_Restart_Auto_Nego);
689 return 0;
690 }
691
692 static int rtl8169_set_speed(struct net_device *dev,
693 u8 autoneg, u16 speed, u8 duplex)
694 {
695 struct rtl8169_private *tp = netdev_priv(dev);
696 int ret;
697
698 ret = tp->set_speed(dev, autoneg, speed, duplex);
699
700 if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
701 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
702
703 return ret;
704 }
705
706 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
707 {
708 struct rtl8169_private *tp = netdev_priv(dev);
709 unsigned long flags;
710 int ret;
711
712 spin_lock_irqsave(&tp->lock, flags);
713 ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
714 spin_unlock_irqrestore(&tp->lock, flags);
715
716 return ret;
717 }
718
719 static u32 rtl8169_get_rx_csum(struct net_device *dev)
720 {
721 struct rtl8169_private *tp = netdev_priv(dev);
722
723 return tp->cp_cmd & RxChkSum;
724 }
725
726 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
727 {
728 struct rtl8169_private *tp = netdev_priv(dev);
729 void __iomem *ioaddr = tp->mmio_addr;
730 unsigned long flags;
731
732 spin_lock_irqsave(&tp->lock, flags);
733
734 if (data)
735 tp->cp_cmd |= RxChkSum;
736 else
737 tp->cp_cmd &= ~RxChkSum;
738
739 RTL_W16(CPlusCmd, tp->cp_cmd);
740 RTL_R16(CPlusCmd);
741
742 spin_unlock_irqrestore(&tp->lock, flags);
743
744 return 0;
745 }
746
747 #ifdef CONFIG_R8169_VLAN
748
749 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
750 struct sk_buff *skb)
751 {
752 return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
753 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
754 }
755
756 static void rtl8169_vlan_rx_register(struct net_device *dev,
757 struct vlan_group *grp)
758 {
759 struct rtl8169_private *tp = netdev_priv(dev);
760 void __iomem *ioaddr = tp->mmio_addr;
761 unsigned long flags;
762
763 spin_lock_irqsave(&tp->lock, flags);
764 tp->vlgrp = grp;
765 if (tp->vlgrp)
766 tp->cp_cmd |= RxVlan;
767 else
768 tp->cp_cmd &= ~RxVlan;
769 RTL_W16(CPlusCmd, tp->cp_cmd);
770 RTL_R16(CPlusCmd);
771 spin_unlock_irqrestore(&tp->lock, flags);
772 }
773
774 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
775 {
776 struct rtl8169_private *tp = netdev_priv(dev);
777 unsigned long flags;
778
779 spin_lock_irqsave(&tp->lock, flags);
780 if (tp->vlgrp)
781 tp->vlgrp->vlan_devices[vid] = NULL;
782 spin_unlock_irqrestore(&tp->lock, flags);
783 }
784
785 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
786 struct sk_buff *skb)
787 {
788 u32 opts2 = le32_to_cpu(desc->opts2);
789 int ret;
790
791 if (tp->vlgrp && (opts2 & RxVlanTag)) {
792 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
793 swab16(opts2 & 0xffff));
794 ret = 0;
795 } else
796 ret = -1;
797 desc->opts2 = 0;
798 return ret;
799 }
800
801 #else /* !CONFIG_R8169_VLAN */
802
803 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
804 struct sk_buff *skb)
805 {
806 return 0;
807 }
808
809 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
810 struct sk_buff *skb)
811 {
812 return -1;
813 }
814
815 #endif
816
817 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
818 {
819 struct rtl8169_private *tp = netdev_priv(dev);
820 void __iomem *ioaddr = tp->mmio_addr;
821 u32 status;
822
823 cmd->supported =
824 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
825 cmd->port = PORT_FIBRE;
826 cmd->transceiver = XCVR_INTERNAL;
827
828 status = RTL_R32(TBICSR);
829 cmd->advertising = (status & TBINwEnable) ? ADVERTISED_Autoneg : 0;
830 cmd->autoneg = !!(status & TBINwEnable);
831
832 cmd->speed = SPEED_1000;
833 cmd->duplex = DUPLEX_FULL; /* Always set */
834 }
835
836 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
837 {
838 struct rtl8169_private *tp = netdev_priv(dev);
839 void __iomem *ioaddr = tp->mmio_addr;
840 u8 status;
841
842 cmd->supported = SUPPORTED_10baseT_Half |
843 SUPPORTED_10baseT_Full |
844 SUPPORTED_100baseT_Half |
845 SUPPORTED_100baseT_Full |
846 SUPPORTED_1000baseT_Full |
847 SUPPORTED_Autoneg |
848 SUPPORTED_TP;
849
850 cmd->autoneg = 1;
851 cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
852
853 if (tp->phy_auto_nego_reg & PHY_Cap_10_Half)
854 cmd->advertising |= ADVERTISED_10baseT_Half;
855 if (tp->phy_auto_nego_reg & PHY_Cap_10_Full)
856 cmd->advertising |= ADVERTISED_10baseT_Full;
857 if (tp->phy_auto_nego_reg & PHY_Cap_100_Half)
858 cmd->advertising |= ADVERTISED_100baseT_Half;
859 if (tp->phy_auto_nego_reg & PHY_Cap_100_Full)
860 cmd->advertising |= ADVERTISED_100baseT_Full;
861 if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)
862 cmd->advertising |= ADVERTISED_1000baseT_Full;
863
864 status = RTL_R8(PHYstatus);
865
866 if (status & _1000bpsF)
867 cmd->speed = SPEED_1000;
868 else if (status & _100bps)
869 cmd->speed = SPEED_100;
870 else if (status & _10bps)
871 cmd->speed = SPEED_10;
872
873 cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
874 DUPLEX_FULL : DUPLEX_HALF;
875 }
876
877 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
878 {
879 struct rtl8169_private *tp = netdev_priv(dev);
880 unsigned long flags;
881
882 spin_lock_irqsave(&tp->lock, flags);
883
884 tp->get_settings(dev, cmd);
885
886 spin_unlock_irqrestore(&tp->lock, flags);
887 return 0;
888 }
889
890 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
891 void *p)
892 {
893 struct rtl8169_private *tp = netdev_priv(dev);
894 unsigned long flags;
895
896 if (regs->len > R8169_REGS_SIZE)
897 regs->len = R8169_REGS_SIZE;
898
899 spin_lock_irqsave(&tp->lock, flags);
900 memcpy_fromio(p, tp->mmio_addr, regs->len);
901 spin_unlock_irqrestore(&tp->lock, flags);
902 }
903
904 static u32 rtl8169_get_msglevel(struct net_device *dev)
905 {
906 struct rtl8169_private *tp = netdev_priv(dev);
907
908 return tp->msg_enable;
909 }
910
911 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
912 {
913 struct rtl8169_private *tp = netdev_priv(dev);
914
915 tp->msg_enable = value;
916 }
917
918 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
919 "tx_packets",
920 "rx_packets",
921 "tx_errors",
922 "rx_errors",
923 "rx_missed",
924 "align_errors",
925 "tx_single_collisions",
926 "tx_multi_collisions",
927 "unicast",
928 "broadcast",
929 "multicast",
930 "tx_aborted",
931 "tx_underrun",
932 };
933
934 struct rtl8169_counters {
935 u64 tx_packets;
936 u64 rx_packets;
937 u64 tx_errors;
938 u32 rx_errors;
939 u16 rx_missed;
940 u16 align_errors;
941 u32 tx_one_collision;
942 u32 tx_multi_collision;
943 u64 rx_unicast;
944 u64 rx_broadcast;
945 u32 rx_multicast;
946 u16 tx_aborted;
947 u16 tx_underun;
948 };
949
950 static int rtl8169_get_stats_count(struct net_device *dev)
951 {
952 return ARRAY_SIZE(rtl8169_gstrings);
953 }
954
955 static void rtl8169_get_ethtool_stats(struct net_device *dev,
956 struct ethtool_stats *stats, u64 *data)
957 {
958 struct rtl8169_private *tp = netdev_priv(dev);
959 void __iomem *ioaddr = tp->mmio_addr;
960 struct rtl8169_counters *counters;
961 dma_addr_t paddr;
962 u32 cmd;
963
964 ASSERT_RTNL();
965
966 counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
967 if (!counters)
968 return;
969
970 RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
971 cmd = (u64)paddr & DMA_32BIT_MASK;
972 RTL_W32(CounterAddrLow, cmd);
973 RTL_W32(CounterAddrLow, cmd | CounterDump);
974
975 while (RTL_R32(CounterAddrLow) & CounterDump) {
976 if (msleep_interruptible(1))
977 break;
978 }
979
980 RTL_W32(CounterAddrLow, 0);
981 RTL_W32(CounterAddrHigh, 0);
982
983 data[0] = le64_to_cpu(counters->tx_packets);
984 data[1] = le64_to_cpu(counters->rx_packets);
985 data[2] = le64_to_cpu(counters->tx_errors);
986 data[3] = le32_to_cpu(counters->rx_errors);
987 data[4] = le16_to_cpu(counters->rx_missed);
988 data[5] = le16_to_cpu(counters->align_errors);
989 data[6] = le32_to_cpu(counters->tx_one_collision);
990 data[7] = le32_to_cpu(counters->tx_multi_collision);
991 data[8] = le64_to_cpu(counters->rx_unicast);
992 data[9] = le64_to_cpu(counters->rx_broadcast);
993 data[10] = le32_to_cpu(counters->rx_multicast);
994 data[11] = le16_to_cpu(counters->tx_aborted);
995 data[12] = le16_to_cpu(counters->tx_underun);
996
997 pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
998 }
999
1000 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1001 {
1002 switch(stringset) {
1003 case ETH_SS_STATS:
1004 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1005 break;
1006 }
1007 }
1008
1009
1010 static struct ethtool_ops rtl8169_ethtool_ops = {
1011 .get_drvinfo = rtl8169_get_drvinfo,
1012 .get_regs_len = rtl8169_get_regs_len,
1013 .get_link = ethtool_op_get_link,
1014 .get_settings = rtl8169_get_settings,
1015 .set_settings = rtl8169_set_settings,
1016 .get_msglevel = rtl8169_get_msglevel,
1017 .set_msglevel = rtl8169_set_msglevel,
1018 .get_rx_csum = rtl8169_get_rx_csum,
1019 .set_rx_csum = rtl8169_set_rx_csum,
1020 .get_tx_csum = ethtool_op_get_tx_csum,
1021 .set_tx_csum = ethtool_op_set_tx_csum,
1022 .get_sg = ethtool_op_get_sg,
1023 .set_sg = ethtool_op_set_sg,
1024 .get_tso = ethtool_op_get_tso,
1025 .set_tso = ethtool_op_set_tso,
1026 .get_regs = rtl8169_get_regs,
1027 .get_strings = rtl8169_get_strings,
1028 .get_stats_count = rtl8169_get_stats_count,
1029 .get_ethtool_stats = rtl8169_get_ethtool_stats,
1030 .get_perm_addr = ethtool_op_get_perm_addr,
1031 };
1032
1033 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1034 int bitval)
1035 {
1036 int val;
1037
1038 val = mdio_read(ioaddr, reg);
1039 val = (bitval == 1) ?
1040 val | (bitval << bitnum) : val & ~(0x0001 << bitnum);
1041 mdio_write(ioaddr, reg, val & 0xffff);
1042 }
1043
1044 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1045 {
1046 const struct {
1047 u32 mask;
1048 int mac_version;
1049 } mac_info[] = {
1050 { 0x1 << 28, RTL_GIGA_MAC_VER_X },
1051 { 0x1 << 26, RTL_GIGA_MAC_VER_E },
1052 { 0x1 << 23, RTL_GIGA_MAC_VER_D },
1053 { 0x00000000, RTL_GIGA_MAC_VER_B } /* Catch-all */
1054 }, *p = mac_info;
1055 u32 reg;
1056
1057 reg = RTL_R32(TxConfig) & 0x7c800000;
1058 while ((reg & p->mask) != p->mask)
1059 p++;
1060 tp->mac_version = p->mac_version;
1061 }
1062
1063 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1064 {
1065 struct {
1066 int version;
1067 char *msg;
1068 } mac_print[] = {
1069 { RTL_GIGA_MAC_VER_E, "RTL_GIGA_MAC_VER_E" },
1070 { RTL_GIGA_MAC_VER_D, "RTL_GIGA_MAC_VER_D" },
1071 { RTL_GIGA_MAC_VER_B, "RTL_GIGA_MAC_VER_B" },
1072 { 0, NULL }
1073 }, *p;
1074
1075 for (p = mac_print; p->msg; p++) {
1076 if (tp->mac_version == p->version) {
1077 dprintk("mac_version == %s (%04d)\n", p->msg,
1078 p->version);
1079 return;
1080 }
1081 }
1082 dprintk("mac_version == Unknown\n");
1083 }
1084
1085 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1086 {
1087 const struct {
1088 u16 mask;
1089 u16 set;
1090 int phy_version;
1091 } phy_info[] = {
1092 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1093 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1094 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1095 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1096 }, *p = phy_info;
1097 u16 reg;
1098
1099 reg = mdio_read(ioaddr, 3) & 0xffff;
1100 while ((reg & p->mask) != p->set)
1101 p++;
1102 tp->phy_version = p->phy_version;
1103 }
1104
1105 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1106 {
1107 struct {
1108 int version;
1109 char *msg;
1110 u32 reg;
1111 } phy_print[] = {
1112 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1113 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1114 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1115 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1116 { 0, NULL, 0x0000 }
1117 }, *p;
1118
1119 for (p = phy_print; p->msg; p++) {
1120 if (tp->phy_version == p->version) {
1121 dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1122 return;
1123 }
1124 }
1125 dprintk("phy_version == Unknown\n");
1126 }
1127
1128 static void rtl8169_hw_phy_config(struct net_device *dev)
1129 {
1130 struct rtl8169_private *tp = netdev_priv(dev);
1131 void __iomem *ioaddr = tp->mmio_addr;
1132 struct {
1133 u16 regs[5]; /* Beware of bit-sign propagation */
1134 } phy_magic[5] = { {
1135 { 0x0000, //w 4 15 12 0
1136 0x00a1, //w 3 15 0 00a1
1137 0x0008, //w 2 15 0 0008
1138 0x1020, //w 1 15 0 1020
1139 0x1000 } },{ //w 0 15 0 1000
1140 { 0x7000, //w 4 15 12 7
1141 0xff41, //w 3 15 0 ff41
1142 0xde60, //w 2 15 0 de60
1143 0x0140, //w 1 15 0 0140
1144 0x0077 } },{ //w 0 15 0 0077
1145 { 0xa000, //w 4 15 12 a
1146 0xdf01, //w 3 15 0 df01
1147 0xdf20, //w 2 15 0 df20
1148 0xff95, //w 1 15 0 ff95
1149 0xfa00 } },{ //w 0 15 0 fa00
1150 { 0xb000, //w 4 15 12 b
1151 0xff41, //w 3 15 0 ff41
1152 0xde20, //w 2 15 0 de20
1153 0x0140, //w 1 15 0 0140
1154 0x00bb } },{ //w 0 15 0 00bb
1155 { 0xf000, //w 4 15 12 f
1156 0xdf01, //w 3 15 0 df01
1157 0xdf20, //w 2 15 0 df20
1158 0xff95, //w 1 15 0 ff95
1159 0xbf00 } //w 0 15 0 bf00
1160 }
1161 }, *p = phy_magic;
1162 int i;
1163
1164 rtl8169_print_mac_version(tp);
1165 rtl8169_print_phy_version(tp);
1166
1167 if (tp->mac_version <= RTL_GIGA_MAC_VER_B)
1168 return;
1169 if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1170 return;
1171
1172 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1173 dprintk("Do final_reg2.cfg\n");
1174
1175 /* Shazam ! */
1176
1177 if (tp->mac_version == RTL_GIGA_MAC_VER_X) {
1178 mdio_write(ioaddr, 31, 0x0001);
1179 mdio_write(ioaddr, 9, 0x273a);
1180 mdio_write(ioaddr, 14, 0x7bfb);
1181 mdio_write(ioaddr, 27, 0x841e);
1182
1183 mdio_write(ioaddr, 31, 0x0002);
1184 mdio_write(ioaddr, 1, 0x90d0);
1185 mdio_write(ioaddr, 31, 0x0000);
1186 return;
1187 }
1188
1189 /* phy config for RTL8169s mac_version C chip */
1190 mdio_write(ioaddr, 31, 0x0001); //w 31 2 0 1
1191 mdio_write(ioaddr, 21, 0x1000); //w 21 15 0 1000
1192 mdio_write(ioaddr, 24, 0x65c7); //w 24 15 0 65c7
1193 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1194
1195 for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1196 int val, pos = 4;
1197
1198 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1199 mdio_write(ioaddr, pos, val);
1200 while (--pos >= 0)
1201 mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1202 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1203 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1204 }
1205 mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1206 }
1207
1208 static void rtl8169_phy_timer(unsigned long __opaque)
1209 {
1210 struct net_device *dev = (struct net_device *)__opaque;
1211 struct rtl8169_private *tp = netdev_priv(dev);
1212 struct timer_list *timer = &tp->timer;
1213 void __iomem *ioaddr = tp->mmio_addr;
1214 unsigned long timeout = RTL8169_PHY_TIMEOUT;
1215
1216 assert(tp->mac_version > RTL_GIGA_MAC_VER_B);
1217 assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1218
1219 if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
1220 return;
1221
1222 spin_lock_irq(&tp->lock);
1223
1224 if (tp->phy_reset_pending(ioaddr)) {
1225 /*
1226 * A busy loop could burn quite a few cycles on nowadays CPU.
1227 * Let's delay the execution of the timer for a few ticks.
1228 */
1229 timeout = HZ/10;
1230 goto out_mod_timer;
1231 }
1232
1233 if (tp->link_ok(ioaddr))
1234 goto out_unlock;
1235
1236 if (netif_msg_link(tp))
1237 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1238
1239 tp->phy_reset_enable(ioaddr);
1240
1241 out_mod_timer:
1242 mod_timer(timer, jiffies + timeout);
1243 out_unlock:
1244 spin_unlock_irq(&tp->lock);
1245 }
1246
1247 static inline void rtl8169_delete_timer(struct net_device *dev)
1248 {
1249 struct rtl8169_private *tp = netdev_priv(dev);
1250 struct timer_list *timer = &tp->timer;
1251
1252 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1253 (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1254 return;
1255
1256 del_timer_sync(timer);
1257 }
1258
1259 static inline void rtl8169_request_timer(struct net_device *dev)
1260 {
1261 struct rtl8169_private *tp = netdev_priv(dev);
1262 struct timer_list *timer = &tp->timer;
1263
1264 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1265 (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1266 return;
1267
1268 init_timer(timer);
1269 timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1270 timer->data = (unsigned long)(dev);
1271 timer->function = rtl8169_phy_timer;
1272 add_timer(timer);
1273 }
1274
1275 #ifdef CONFIG_NET_POLL_CONTROLLER
1276 /*
1277 * Polling 'interrupt' - used by things like netconsole to send skbs
1278 * without having to re-enable interrupts. It's not called while
1279 * the interrupt routine is executing.
1280 */
1281 static void rtl8169_netpoll(struct net_device *dev)
1282 {
1283 struct rtl8169_private *tp = netdev_priv(dev);
1284 struct pci_dev *pdev = tp->pci_dev;
1285
1286 disable_irq(pdev->irq);
1287 rtl8169_interrupt(pdev->irq, dev, NULL);
1288 enable_irq(pdev->irq);
1289 }
1290 #endif
1291
1292 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1293 void __iomem *ioaddr)
1294 {
1295 iounmap(ioaddr);
1296 pci_release_regions(pdev);
1297 pci_disable_device(pdev);
1298 free_netdev(dev);
1299 }
1300
1301 static int __devinit
1302 rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
1303 void __iomem **ioaddr_out)
1304 {
1305 void __iomem *ioaddr;
1306 struct net_device *dev;
1307 struct rtl8169_private *tp;
1308 int rc = -ENOMEM, i, acpi_idle_state = 0, pm_cap;
1309
1310 assert(ioaddr_out != NULL);
1311
1312 /* dev zeroed in alloc_etherdev */
1313 dev = alloc_etherdev(sizeof (*tp));
1314 if (dev == NULL) {
1315 if (netif_msg_drv(&debug))
1316 printk(KERN_ERR PFX "unable to alloc new ethernet\n");
1317 goto err_out;
1318 }
1319
1320 SET_MODULE_OWNER(dev);
1321 SET_NETDEV_DEV(dev, &pdev->dev);
1322 tp = netdev_priv(dev);
1323 tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1324
1325 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1326 rc = pci_enable_device(pdev);
1327 if (rc < 0) {
1328 if (netif_msg_probe(tp)) {
1329 printk(KERN_ERR PFX "%s: enable failure\n",
1330 pci_name(pdev));
1331 }
1332 goto err_out_free_dev;
1333 }
1334
1335 rc = pci_set_mwi(pdev);
1336 if (rc < 0)
1337 goto err_out_disable;
1338
1339 /* save power state before pci_enable_device overwrites it */
1340 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1341 if (pm_cap) {
1342 u16 pwr_command;
1343
1344 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1345 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1346 } else {
1347 if (netif_msg_probe(tp)) {
1348 printk(KERN_ERR PFX
1349 "Cannot find PowerManagement capability. "
1350 "Aborting.\n");
1351 }
1352 goto err_out_mwi;
1353 }
1354
1355 /* make sure PCI base addr 1 is MMIO */
1356 if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1357 if (netif_msg_probe(tp)) {
1358 printk(KERN_ERR PFX
1359 "region #1 not an MMIO resource, aborting\n");
1360 }
1361 rc = -ENODEV;
1362 goto err_out_mwi;
1363 }
1364 /* check for weird/broken PCI region reporting */
1365 if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) {
1366 if (netif_msg_probe(tp)) {
1367 printk(KERN_ERR PFX
1368 "Invalid PCI region size(s), aborting\n");
1369 }
1370 rc = -ENODEV;
1371 goto err_out_mwi;
1372 }
1373
1374 rc = pci_request_regions(pdev, MODULENAME);
1375 if (rc < 0) {
1376 if (netif_msg_probe(tp)) {
1377 printk(KERN_ERR PFX "%s: could not request regions.\n",
1378 pci_name(pdev));
1379 }
1380 goto err_out_mwi;
1381 }
1382
1383 tp->cp_cmd = PCIMulRW | RxChkSum;
1384
1385 if ((sizeof(dma_addr_t) > 4) &&
1386 !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1387 tp->cp_cmd |= PCIDAC;
1388 dev->features |= NETIF_F_HIGHDMA;
1389 } else {
1390 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1391 if (rc < 0) {
1392 if (netif_msg_probe(tp)) {
1393 printk(KERN_ERR PFX
1394 "DMA configuration failed.\n");
1395 }
1396 goto err_out_free_res;
1397 }
1398 }
1399
1400 pci_set_master(pdev);
1401
1402 /* ioremap MMIO region */
1403 ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE);
1404 if (ioaddr == NULL) {
1405 if (netif_msg_probe(tp))
1406 printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
1407 rc = -EIO;
1408 goto err_out_free_res;
1409 }
1410
1411 /* Unneeded ? Don't mess with Mrs. Murphy. */
1412 rtl8169_irq_mask_and_ack(ioaddr);
1413
1414 /* Soft reset the chip. */
1415 RTL_W8(ChipCmd, CmdReset);
1416
1417 /* Check that the chip has finished the reset. */
1418 for (i = 1000; i > 0; i--) {
1419 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1420 break;
1421 udelay(10);
1422 }
1423
1424 /* Identify chip attached to board */
1425 rtl8169_get_mac_version(tp, ioaddr);
1426 rtl8169_get_phy_version(tp, ioaddr);
1427
1428 rtl8169_print_mac_version(tp);
1429 rtl8169_print_phy_version(tp);
1430
1431 for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1432 if (tp->mac_version == rtl_chip_info[i].mac_version)
1433 break;
1434 }
1435 if (i < 0) {
1436 /* Unknown chip: assume array element #0, original RTL-8169 */
1437 if (netif_msg_probe(tp)) {
1438 printk(KERN_DEBUG PFX "PCI device %s: "
1439 "unknown chip version, assuming %s\n",
1440 pci_name(pdev), rtl_chip_info[0].name);
1441 }
1442 i++;
1443 }
1444 tp->chipset = i;
1445
1446 *ioaddr_out = ioaddr;
1447 *dev_out = dev;
1448 out:
1449 return rc;
1450
1451 err_out_free_res:
1452 pci_release_regions(pdev);
1453
1454 err_out_mwi:
1455 pci_clear_mwi(pdev);
1456
1457 err_out_disable:
1458 pci_disable_device(pdev);
1459
1460 err_out_free_dev:
1461 free_netdev(dev);
1462 err_out:
1463 *ioaddr_out = NULL;
1464 *dev_out = NULL;
1465 goto out;
1466 }
1467
1468 static int __devinit
1469 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1470 {
1471 struct net_device *dev = NULL;
1472 struct rtl8169_private *tp;
1473 void __iomem *ioaddr = NULL;
1474 static int board_idx = -1;
1475 u8 autoneg, duplex;
1476 u16 speed;
1477 int i, rc;
1478
1479 assert(pdev != NULL);
1480 assert(ent != NULL);
1481
1482 board_idx++;
1483
1484 if (netif_msg_drv(&debug)) {
1485 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1486 MODULENAME, RTL8169_VERSION);
1487 }
1488
1489 rc = rtl8169_init_board(pdev, &dev, &ioaddr);
1490 if (rc)
1491 return rc;
1492
1493 tp = netdev_priv(dev);
1494 assert(ioaddr != NULL);
1495
1496 if (RTL_R8(PHYstatus) & TBI_Enable) {
1497 tp->set_speed = rtl8169_set_speed_tbi;
1498 tp->get_settings = rtl8169_gset_tbi;
1499 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1500 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1501 tp->link_ok = rtl8169_tbi_link_ok;
1502
1503 tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */
1504 } else {
1505 tp->set_speed = rtl8169_set_speed_xmii;
1506 tp->get_settings = rtl8169_gset_xmii;
1507 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1508 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1509 tp->link_ok = rtl8169_xmii_link_ok;
1510 }
1511
1512 /* Get MAC address. FIXME: read EEPROM */
1513 for (i = 0; i < MAC_ADDR_LEN; i++)
1514 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1515 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1516
1517 dev->open = rtl8169_open;
1518 dev->hard_start_xmit = rtl8169_start_xmit;
1519 dev->get_stats = rtl8169_get_stats;
1520 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1521 dev->stop = rtl8169_close;
1522 dev->tx_timeout = rtl8169_tx_timeout;
1523 dev->set_multicast_list = rtl8169_set_rx_mode;
1524 dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1525 dev->irq = pdev->irq;
1526 dev->base_addr = (unsigned long) ioaddr;
1527 dev->change_mtu = rtl8169_change_mtu;
1528
1529 #ifdef CONFIG_R8169_NAPI
1530 dev->poll = rtl8169_poll;
1531 dev->weight = R8169_NAPI_WEIGHT;
1532 #endif
1533
1534 #ifdef CONFIG_R8169_VLAN
1535 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1536 dev->vlan_rx_register = rtl8169_vlan_rx_register;
1537 dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1538 #endif
1539
1540 #ifdef CONFIG_NET_POLL_CONTROLLER
1541 dev->poll_controller = rtl8169_netpoll;
1542 #endif
1543
1544 tp->intr_mask = 0xffff;
1545 tp->pci_dev = pdev;
1546 tp->mmio_addr = ioaddr;
1547
1548 spin_lock_init(&tp->lock);
1549
1550 rc = register_netdev(dev);
1551 if (rc) {
1552 rtl8169_release_board(pdev, dev, ioaddr);
1553 return rc;
1554 }
1555
1556 if (netif_msg_probe(tp)) {
1557 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n",
1558 dev->name, rtl_chip_info[tp->chipset].name);
1559 }
1560
1561 pci_set_drvdata(pdev, dev);
1562
1563 if (netif_msg_probe(tp)) {
1564 printk(KERN_INFO "%s: %s at 0x%lx, "
1565 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1566 "IRQ %d\n",
1567 dev->name,
1568 rtl_chip_info[ent->driver_data].name,
1569 dev->base_addr,
1570 dev->dev_addr[0], dev->dev_addr[1],
1571 dev->dev_addr[2], dev->dev_addr[3],
1572 dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1573 }
1574
1575 rtl8169_hw_phy_config(dev);
1576
1577 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1578 RTL_W8(0x82, 0x01);
1579
1580 if (tp->mac_version < RTL_GIGA_MAC_VER_E) {
1581 dprintk("Set PCI Latency=0x40\n");
1582 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
1583 }
1584
1585 if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1586 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1587 RTL_W8(0x82, 0x01);
1588 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1589 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1590 }
1591
1592 rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1593
1594 rtl8169_set_speed(dev, autoneg, speed, duplex);
1595
1596 if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1597 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1598
1599 return 0;
1600 }
1601
1602 static void __devexit
1603 rtl8169_remove_one(struct pci_dev *pdev)
1604 {
1605 struct net_device *dev = pci_get_drvdata(pdev);
1606 struct rtl8169_private *tp = netdev_priv(dev);
1607
1608 assert(dev != NULL);
1609 assert(tp != NULL);
1610
1611 unregister_netdev(dev);
1612 rtl8169_release_board(pdev, dev, tp->mmio_addr);
1613 pci_set_drvdata(pdev, NULL);
1614 }
1615
1616 #ifdef CONFIG_PM
1617
1618 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
1619 {
1620 struct net_device *dev = pci_get_drvdata(pdev);
1621 struct rtl8169_private *tp = netdev_priv(dev);
1622 void __iomem *ioaddr = tp->mmio_addr;
1623 unsigned long flags;
1624
1625 if (!netif_running(dev))
1626 return 0;
1627
1628 netif_device_detach(dev);
1629 netif_stop_queue(dev);
1630 spin_lock_irqsave(&tp->lock, flags);
1631
1632 /* Disable interrupts, stop Rx and Tx */
1633 RTL_W16(IntrMask, 0);
1634 RTL_W8(ChipCmd, 0);
1635
1636 /* Update the error counts. */
1637 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1638 RTL_W32(RxMissed, 0);
1639 spin_unlock_irqrestore(&tp->lock, flags);
1640
1641 return 0;
1642 }
1643
1644 static int rtl8169_resume(struct pci_dev *pdev)
1645 {
1646 struct net_device *dev = pci_get_drvdata(pdev);
1647
1648 if (!netif_running(dev))
1649 return 0;
1650
1651 netif_device_attach(dev);
1652 rtl8169_hw_start(dev);
1653
1654 return 0;
1655 }
1656
1657 #endif /* CONFIG_PM */
1658
1659 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1660 struct net_device *dev)
1661 {
1662 unsigned int mtu = dev->mtu;
1663
1664 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1665 }
1666
1667 static int rtl8169_open(struct net_device *dev)
1668 {
1669 struct rtl8169_private *tp = netdev_priv(dev);
1670 struct pci_dev *pdev = tp->pci_dev;
1671 int retval;
1672
1673 rtl8169_set_rxbufsize(tp, dev);
1674
1675 retval =
1676 request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
1677 if (retval < 0)
1678 goto out;
1679
1680 retval = -ENOMEM;
1681
1682 /*
1683 * Rx and Tx desscriptors needs 256 bytes alignment.
1684 * pci_alloc_consistent provides more.
1685 */
1686 tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1687 &tp->TxPhyAddr);
1688 if (!tp->TxDescArray)
1689 goto err_free_irq;
1690
1691 tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1692 &tp->RxPhyAddr);
1693 if (!tp->RxDescArray)
1694 goto err_free_tx;
1695
1696 retval = rtl8169_init_ring(dev);
1697 if (retval < 0)
1698 goto err_free_rx;
1699
1700 INIT_WORK(&tp->task, NULL, dev);
1701
1702 rtl8169_hw_start(dev);
1703
1704 rtl8169_request_timer(dev);
1705
1706 rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1707 out:
1708 return retval;
1709
1710 err_free_rx:
1711 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1712 tp->RxPhyAddr);
1713 err_free_tx:
1714 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1715 tp->TxPhyAddr);
1716 err_free_irq:
1717 free_irq(dev->irq, dev);
1718 goto out;
1719 }
1720
1721 static void rtl8169_hw_reset(void __iomem *ioaddr)
1722 {
1723 /* Disable interrupts */
1724 rtl8169_irq_mask_and_ack(ioaddr);
1725
1726 /* Reset the chipset */
1727 RTL_W8(ChipCmd, CmdReset);
1728
1729 /* PCI commit */
1730 RTL_R8(ChipCmd);
1731 }
1732
1733 static void
1734 rtl8169_hw_start(struct net_device *dev)
1735 {
1736 struct rtl8169_private *tp = netdev_priv(dev);
1737 void __iomem *ioaddr = tp->mmio_addr;
1738 u32 i;
1739
1740 /* Soft reset the chip. */
1741 RTL_W8(ChipCmd, CmdReset);
1742
1743 /* Check that the chip has finished the reset. */
1744 for (i = 1000; i > 0; i--) {
1745 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1746 break;
1747 udelay(10);
1748 }
1749
1750 RTL_W8(Cfg9346, Cfg9346_Unlock);
1751 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1752 RTL_W8(EarlyTxThres, EarlyTxThld);
1753
1754 /* Low hurts. Let's disable the filtering. */
1755 RTL_W16(RxMaxSize, 16383);
1756
1757 /* Set Rx Config register */
1758 i = rtl8169_rx_config |
1759 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1760 RTL_W32(RxConfig, i);
1761
1762 /* Set DMA burst size and Interframe Gap Time */
1763 RTL_W32(TxConfig,
1764 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
1765 TxInterFrameGapShift));
1766 tp->cp_cmd |= RTL_R16(CPlusCmd);
1767 RTL_W16(CPlusCmd, tp->cp_cmd);
1768
1769 if ((tp->mac_version == RTL_GIGA_MAC_VER_D) ||
1770 (tp->mac_version == RTL_GIGA_MAC_VER_E)) {
1771 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1772 "Bit-3 and bit-14 MUST be 1\n");
1773 tp->cp_cmd |= (1 << 14) | PCIMulRW;
1774 RTL_W16(CPlusCmd, tp->cp_cmd);
1775 }
1776
1777 /*
1778 * Undocumented corner. Supposedly:
1779 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1780 */
1781 RTL_W16(IntrMitigate, 0x0000);
1782
1783 RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1784 RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1785 RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1786 RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1787 RTL_W8(Cfg9346, Cfg9346_Lock);
1788 udelay(10);
1789
1790 RTL_W32(RxMissed, 0);
1791
1792 rtl8169_set_rx_mode(dev);
1793
1794 /* no early-rx interrupts */
1795 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1796
1797 /* Enable all known interrupts by setting the interrupt mask. */
1798 RTL_W16(IntrMask, rtl8169_intr_mask);
1799
1800 netif_start_queue(dev);
1801 }
1802
1803 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1804 {
1805 struct rtl8169_private *tp = netdev_priv(dev);
1806 int ret = 0;
1807
1808 if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1809 return -EINVAL;
1810
1811 dev->mtu = new_mtu;
1812
1813 if (!netif_running(dev))
1814 goto out;
1815
1816 rtl8169_down(dev);
1817
1818 rtl8169_set_rxbufsize(tp, dev);
1819
1820 ret = rtl8169_init_ring(dev);
1821 if (ret < 0)
1822 goto out;
1823
1824 netif_poll_enable(dev);
1825
1826 rtl8169_hw_start(dev);
1827
1828 rtl8169_request_timer(dev);
1829
1830 out:
1831 return ret;
1832 }
1833
1834 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1835 {
1836 desc->addr = 0x0badbadbadbadbadull;
1837 desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1838 }
1839
1840 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1841 struct sk_buff **sk_buff, struct RxDesc *desc)
1842 {
1843 struct pci_dev *pdev = tp->pci_dev;
1844
1845 pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1846 PCI_DMA_FROMDEVICE);
1847 dev_kfree_skb(*sk_buff);
1848 *sk_buff = NULL;
1849 rtl8169_make_unusable_by_asic(desc);
1850 }
1851
1852 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1853 {
1854 u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1855
1856 desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1857 }
1858
1859 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1860 u32 rx_buf_sz)
1861 {
1862 desc->addr = cpu_to_le64(mapping);
1863 wmb();
1864 rtl8169_mark_to_asic(desc, rx_buf_sz);
1865 }
1866
1867 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1868 struct RxDesc *desc, int rx_buf_sz)
1869 {
1870 struct sk_buff *skb;
1871 dma_addr_t mapping;
1872 int ret = 0;
1873
1874 skb = dev_alloc_skb(rx_buf_sz + NET_IP_ALIGN);
1875 if (!skb)
1876 goto err_out;
1877
1878 skb_reserve(skb, NET_IP_ALIGN);
1879 *sk_buff = skb;
1880
1881 mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
1882 PCI_DMA_FROMDEVICE);
1883
1884 rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
1885
1886 out:
1887 return ret;
1888
1889 err_out:
1890 ret = -ENOMEM;
1891 rtl8169_make_unusable_by_asic(desc);
1892 goto out;
1893 }
1894
1895 static void rtl8169_rx_clear(struct rtl8169_private *tp)
1896 {
1897 int i;
1898
1899 for (i = 0; i < NUM_RX_DESC; i++) {
1900 if (tp->Rx_skbuff[i]) {
1901 rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
1902 tp->RxDescArray + i);
1903 }
1904 }
1905 }
1906
1907 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
1908 u32 start, u32 end)
1909 {
1910 u32 cur;
1911
1912 for (cur = start; end - cur > 0; cur++) {
1913 int ret, i = cur % NUM_RX_DESC;
1914
1915 if (tp->Rx_skbuff[i])
1916 continue;
1917
1918 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
1919 tp->RxDescArray + i, tp->rx_buf_sz);
1920 if (ret < 0)
1921 break;
1922 }
1923 return cur - start;
1924 }
1925
1926 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
1927 {
1928 desc->opts1 |= cpu_to_le32(RingEnd);
1929 }
1930
1931 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
1932 {
1933 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
1934 }
1935
1936 static int rtl8169_init_ring(struct net_device *dev)
1937 {
1938 struct rtl8169_private *tp = netdev_priv(dev);
1939
1940 rtl8169_init_ring_indexes(tp);
1941
1942 memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
1943 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
1944
1945 if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
1946 goto err_out;
1947
1948 rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
1949
1950 return 0;
1951
1952 err_out:
1953 rtl8169_rx_clear(tp);
1954 return -ENOMEM;
1955 }
1956
1957 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
1958 struct TxDesc *desc)
1959 {
1960 unsigned int len = tx_skb->len;
1961
1962 pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
1963 desc->opts1 = 0x00;
1964 desc->opts2 = 0x00;
1965 desc->addr = 0x00;
1966 tx_skb->len = 0;
1967 }
1968
1969 static void rtl8169_tx_clear(struct rtl8169_private *tp)
1970 {
1971 unsigned int i;
1972
1973 for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
1974 unsigned int entry = i % NUM_TX_DESC;
1975 struct ring_info *tx_skb = tp->tx_skb + entry;
1976 unsigned int len = tx_skb->len;
1977
1978 if (len) {
1979 struct sk_buff *skb = tx_skb->skb;
1980
1981 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
1982 tp->TxDescArray + entry);
1983 if (skb) {
1984 dev_kfree_skb(skb);
1985 tx_skb->skb = NULL;
1986 }
1987 tp->stats.tx_dropped++;
1988 }
1989 }
1990 tp->cur_tx = tp->dirty_tx = 0;
1991 }
1992
1993 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
1994 {
1995 struct rtl8169_private *tp = netdev_priv(dev);
1996
1997 PREPARE_WORK(&tp->task, task, dev);
1998 schedule_delayed_work(&tp->task, 4);
1999 }
2000
2001 static void rtl8169_wait_for_quiescence(struct net_device *dev)
2002 {
2003 struct rtl8169_private *tp = netdev_priv(dev);
2004 void __iomem *ioaddr = tp->mmio_addr;
2005
2006 synchronize_irq(dev->irq);
2007
2008 /* Wait for any pending NAPI task to complete */
2009 netif_poll_disable(dev);
2010
2011 rtl8169_irq_mask_and_ack(ioaddr);
2012
2013 netif_poll_enable(dev);
2014 }
2015
2016 static void rtl8169_reinit_task(void *_data)
2017 {
2018 struct net_device *dev = _data;
2019 int ret;
2020
2021 if (netif_running(dev)) {
2022 rtl8169_wait_for_quiescence(dev);
2023 rtl8169_close(dev);
2024 }
2025
2026 ret = rtl8169_open(dev);
2027 if (unlikely(ret < 0)) {
2028 if (net_ratelimit()) {
2029 struct rtl8169_private *tp = netdev_priv(dev);
2030
2031 if (netif_msg_drv(tp)) {
2032 printk(PFX KERN_ERR
2033 "%s: reinit failure (status = %d)."
2034 " Rescheduling.\n", dev->name, ret);
2035 }
2036 }
2037 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2038 }
2039 }
2040
2041 static void rtl8169_reset_task(void *_data)
2042 {
2043 struct net_device *dev = _data;
2044 struct rtl8169_private *tp = netdev_priv(dev);
2045
2046 if (!netif_running(dev))
2047 return;
2048
2049 rtl8169_wait_for_quiescence(dev);
2050
2051 rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2052 rtl8169_tx_clear(tp);
2053
2054 if (tp->dirty_rx == tp->cur_rx) {
2055 rtl8169_init_ring_indexes(tp);
2056 rtl8169_hw_start(dev);
2057 netif_wake_queue(dev);
2058 } else {
2059 if (net_ratelimit()) {
2060 struct rtl8169_private *tp = netdev_priv(dev);
2061
2062 if (netif_msg_intr(tp)) {
2063 printk(PFX KERN_EMERG
2064 "%s: Rx buffers shortage\n", dev->name);
2065 }
2066 }
2067 rtl8169_schedule_work(dev, rtl8169_reset_task);
2068 }
2069 }
2070
2071 static void rtl8169_tx_timeout(struct net_device *dev)
2072 {
2073 struct rtl8169_private *tp = netdev_priv(dev);
2074
2075 rtl8169_hw_reset(tp->mmio_addr);
2076
2077 /* Let's wait a bit while any (async) irq lands on */
2078 rtl8169_schedule_work(dev, rtl8169_reset_task);
2079 }
2080
2081 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2082 u32 opts1)
2083 {
2084 struct skb_shared_info *info = skb_shinfo(skb);
2085 unsigned int cur_frag, entry;
2086 struct TxDesc *txd;
2087
2088 entry = tp->cur_tx;
2089 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2090 skb_frag_t *frag = info->frags + cur_frag;
2091 dma_addr_t mapping;
2092 u32 status, len;
2093 void *addr;
2094
2095 entry = (entry + 1) % NUM_TX_DESC;
2096
2097 txd = tp->TxDescArray + entry;
2098 len = frag->size;
2099 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2100 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2101
2102 /* anti gcc 2.95.3 bugware (sic) */
2103 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2104
2105 txd->opts1 = cpu_to_le32(status);
2106 txd->addr = cpu_to_le64(mapping);
2107
2108 tp->tx_skb[entry].len = len;
2109 }
2110
2111 if (cur_frag) {
2112 tp->tx_skb[entry].skb = skb;
2113 txd->opts1 |= cpu_to_le32(LastFrag);
2114 }
2115
2116 return cur_frag;
2117 }
2118
2119 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2120 {
2121 if (dev->features & NETIF_F_TSO) {
2122 u32 mss = skb_shinfo(skb)->tso_size;
2123
2124 if (mss)
2125 return LargeSend | ((mss & MSSMask) << MSSShift);
2126 }
2127 if (skb->ip_summed == CHECKSUM_HW) {
2128 const struct iphdr *ip = skb->nh.iph;
2129
2130 if (ip->protocol == IPPROTO_TCP)
2131 return IPCS | TCPCS;
2132 else if (ip->protocol == IPPROTO_UDP)
2133 return IPCS | UDPCS;
2134 WARN_ON(1); /* we need a WARN() */
2135 }
2136 return 0;
2137 }
2138
2139 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2140 {
2141 struct rtl8169_private *tp = netdev_priv(dev);
2142 unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2143 struct TxDesc *txd = tp->TxDescArray + entry;
2144 void __iomem *ioaddr = tp->mmio_addr;
2145 dma_addr_t mapping;
2146 u32 status, len;
2147 u32 opts1;
2148 int ret = 0;
2149
2150 if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2151 if (netif_msg_drv(tp)) {
2152 printk(KERN_ERR
2153 "%s: BUG! Tx Ring full when queue awake!\n",
2154 dev->name);
2155 }
2156 goto err_stop;
2157 }
2158
2159 if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2160 goto err_stop;
2161
2162 opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2163
2164 frags = rtl8169_xmit_frags(tp, skb, opts1);
2165 if (frags) {
2166 len = skb_headlen(skb);
2167 opts1 |= FirstFrag;
2168 } else {
2169 len = skb->len;
2170
2171 if (unlikely(len < ETH_ZLEN)) {
2172 skb = skb_padto(skb, ETH_ZLEN);
2173 if (!skb)
2174 goto err_update_stats;
2175 len = ETH_ZLEN;
2176 }
2177
2178 opts1 |= FirstFrag | LastFrag;
2179 tp->tx_skb[entry].skb = skb;
2180 }
2181
2182 mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2183
2184 tp->tx_skb[entry].len = len;
2185 txd->addr = cpu_to_le64(mapping);
2186 txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2187
2188 wmb();
2189
2190 /* anti gcc 2.95.3 bugware (sic) */
2191 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2192 txd->opts1 = cpu_to_le32(status);
2193
2194 dev->trans_start = jiffies;
2195
2196 tp->cur_tx += frags + 1;
2197
2198 smp_wmb();
2199
2200 RTL_W8(TxPoll, 0x40); /* set polling bit */
2201
2202 if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2203 netif_stop_queue(dev);
2204 smp_rmb();
2205 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2206 netif_wake_queue(dev);
2207 }
2208
2209 out:
2210 return ret;
2211
2212 err_stop:
2213 netif_stop_queue(dev);
2214 ret = 1;
2215 err_update_stats:
2216 tp->stats.tx_dropped++;
2217 goto out;
2218 }
2219
2220 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2221 {
2222 struct rtl8169_private *tp = netdev_priv(dev);
2223 struct pci_dev *pdev = tp->pci_dev;
2224 void __iomem *ioaddr = tp->mmio_addr;
2225 u16 pci_status, pci_cmd;
2226
2227 pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2228 pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2229
2230 if (netif_msg_intr(tp)) {
2231 printk(KERN_ERR
2232 "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2233 dev->name, pci_cmd, pci_status);
2234 }
2235
2236 /*
2237 * The recovery sequence below admits a very elaborated explanation:
2238 * - it seems to work;
2239 * - I did not see what else could be done.
2240 *
2241 * Feel free to adjust to your needs.
2242 */
2243 pci_write_config_word(pdev, PCI_COMMAND,
2244 pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2245
2246 pci_write_config_word(pdev, PCI_STATUS,
2247 pci_status & (PCI_STATUS_DETECTED_PARITY |
2248 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2249 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2250
2251 /* The infamous DAC f*ckup only happens at boot time */
2252 if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2253 if (netif_msg_intr(tp))
2254 printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2255 tp->cp_cmd &= ~PCIDAC;
2256 RTL_W16(CPlusCmd, tp->cp_cmd);
2257 dev->features &= ~NETIF_F_HIGHDMA;
2258 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2259 }
2260
2261 rtl8169_hw_reset(ioaddr);
2262 }
2263
2264 static void
2265 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2266 void __iomem *ioaddr)
2267 {
2268 unsigned int dirty_tx, tx_left;
2269
2270 assert(dev != NULL);
2271 assert(tp != NULL);
2272 assert(ioaddr != NULL);
2273
2274 dirty_tx = tp->dirty_tx;
2275 smp_rmb();
2276 tx_left = tp->cur_tx - dirty_tx;
2277
2278 while (tx_left > 0) {
2279 unsigned int entry = dirty_tx % NUM_TX_DESC;
2280 struct ring_info *tx_skb = tp->tx_skb + entry;
2281 u32 len = tx_skb->len;
2282 u32 status;
2283
2284 rmb();
2285 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2286 if (status & DescOwn)
2287 break;
2288
2289 tp->stats.tx_bytes += len;
2290 tp->stats.tx_packets++;
2291
2292 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2293
2294 if (status & LastFrag) {
2295 dev_kfree_skb_irq(tx_skb->skb);
2296 tx_skb->skb = NULL;
2297 }
2298 dirty_tx++;
2299 tx_left--;
2300 }
2301
2302 if (tp->dirty_tx != dirty_tx) {
2303 tp->dirty_tx = dirty_tx;
2304 smp_wmb();
2305 if (netif_queue_stopped(dev) &&
2306 (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2307 netif_wake_queue(dev);
2308 }
2309 }
2310 }
2311
2312 static inline int rtl8169_fragmented_frame(u32 status)
2313 {
2314 return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2315 }
2316
2317 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2318 {
2319 u32 opts1 = le32_to_cpu(desc->opts1);
2320 u32 status = opts1 & RxProtoMask;
2321
2322 if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2323 ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2324 ((status == RxProtoIP) && !(opts1 & IPFail)))
2325 skb->ip_summed = CHECKSUM_UNNECESSARY;
2326 else
2327 skb->ip_summed = CHECKSUM_NONE;
2328 }
2329
2330 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2331 struct RxDesc *desc, int rx_buf_sz)
2332 {
2333 int ret = -1;
2334
2335 if (pkt_size < rx_copybreak) {
2336 struct sk_buff *skb;
2337
2338 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
2339 if (skb) {
2340 skb_reserve(skb, NET_IP_ALIGN);
2341 eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2342 *sk_buff = skb;
2343 rtl8169_mark_to_asic(desc, rx_buf_sz);
2344 ret = 0;
2345 }
2346 }
2347 return ret;
2348 }
2349
2350 static int
2351 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2352 void __iomem *ioaddr)
2353 {
2354 unsigned int cur_rx, rx_left;
2355 unsigned int delta, count;
2356
2357 assert(dev != NULL);
2358 assert(tp != NULL);
2359 assert(ioaddr != NULL);
2360
2361 cur_rx = tp->cur_rx;
2362 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2363 rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2364
2365 for (; rx_left > 0; rx_left--, cur_rx++) {
2366 unsigned int entry = cur_rx % NUM_RX_DESC;
2367 struct RxDesc *desc = tp->RxDescArray + entry;
2368 u32 status;
2369
2370 rmb();
2371 status = le32_to_cpu(desc->opts1);
2372
2373 if (status & DescOwn)
2374 break;
2375 if (unlikely(status & RxRES)) {
2376 if (netif_msg_rx_err(tp)) {
2377 printk(KERN_INFO
2378 "%s: Rx ERROR. status = %08x\n",
2379 dev->name, status);
2380 }
2381 tp->stats.rx_errors++;
2382 if (status & (RxRWT | RxRUNT))
2383 tp->stats.rx_length_errors++;
2384 if (status & RxCRC)
2385 tp->stats.rx_crc_errors++;
2386 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2387 } else {
2388 struct sk_buff *skb = tp->Rx_skbuff[entry];
2389 int pkt_size = (status & 0x00001FFF) - 4;
2390 void (*pci_action)(struct pci_dev *, dma_addr_t,
2391 size_t, int) = pci_dma_sync_single_for_device;
2392
2393 /*
2394 * The driver does not support incoming fragmented
2395 * frames. They are seen as a symptom of over-mtu
2396 * sized frames.
2397 */
2398 if (unlikely(rtl8169_fragmented_frame(status))) {
2399 tp->stats.rx_dropped++;
2400 tp->stats.rx_length_errors++;
2401 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2402 continue;
2403 }
2404
2405 rtl8169_rx_csum(skb, desc);
2406
2407 pci_dma_sync_single_for_cpu(tp->pci_dev,
2408 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2409 PCI_DMA_FROMDEVICE);
2410
2411 if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2412 tp->rx_buf_sz)) {
2413 pci_action = pci_unmap_single;
2414 tp->Rx_skbuff[entry] = NULL;
2415 }
2416
2417 pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2418 tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2419
2420 skb->dev = dev;
2421 skb_put(skb, pkt_size);
2422 skb->protocol = eth_type_trans(skb, dev);
2423
2424 if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2425 rtl8169_rx_skb(skb);
2426
2427 dev->last_rx = jiffies;
2428 tp->stats.rx_bytes += pkt_size;
2429 tp->stats.rx_packets++;
2430 }
2431 }
2432
2433 count = cur_rx - tp->cur_rx;
2434 tp->cur_rx = cur_rx;
2435
2436 delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2437 if (!delta && count && netif_msg_intr(tp))
2438 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2439 tp->dirty_rx += delta;
2440
2441 /*
2442 * FIXME: until there is periodic timer to try and refill the ring,
2443 * a temporary shortage may definitely kill the Rx process.
2444 * - disable the asic to try and avoid an overflow and kick it again
2445 * after refill ?
2446 * - how do others driver handle this condition (Uh oh...).
2447 */
2448 if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2449 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2450
2451 return count;
2452 }
2453
2454 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2455 static irqreturn_t
2456 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
2457 {
2458 struct net_device *dev = (struct net_device *) dev_instance;
2459 struct rtl8169_private *tp = netdev_priv(dev);
2460 int boguscnt = max_interrupt_work;
2461 void __iomem *ioaddr = tp->mmio_addr;
2462 int status;
2463 int handled = 0;
2464
2465 do {
2466 status = RTL_R16(IntrStatus);
2467
2468 /* hotplug/major error/no more work/shared irq */
2469 if ((status == 0xFFFF) || !status)
2470 break;
2471
2472 handled = 1;
2473
2474 if (unlikely(!netif_running(dev))) {
2475 rtl8169_asic_down(ioaddr);
2476 goto out;
2477 }
2478
2479 status &= tp->intr_mask;
2480 RTL_W16(IntrStatus,
2481 (status & RxFIFOOver) ? (status | RxOverflow) : status);
2482
2483 if (!(status & rtl8169_intr_mask))
2484 break;
2485
2486 if (unlikely(status & SYSErr)) {
2487 rtl8169_pcierr_interrupt(dev);
2488 break;
2489 }
2490
2491 if (status & LinkChg)
2492 rtl8169_check_link_status(dev, tp, ioaddr);
2493
2494 #ifdef CONFIG_R8169_NAPI
2495 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2496 tp->intr_mask = ~rtl8169_napi_event;
2497
2498 if (likely(netif_rx_schedule_prep(dev)))
2499 __netif_rx_schedule(dev);
2500 else if (netif_msg_intr(tp)) {
2501 printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2502 dev->name, status);
2503 }
2504 break;
2505 #else
2506 /* Rx interrupt */
2507 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2508 rtl8169_rx_interrupt(dev, tp, ioaddr);
2509 }
2510 /* Tx interrupt */
2511 if (status & (TxOK | TxErr))
2512 rtl8169_tx_interrupt(dev, tp, ioaddr);
2513 #endif
2514
2515 boguscnt--;
2516 } while (boguscnt > 0);
2517
2518 if (boguscnt <= 0) {
2519 if (net_ratelimit() && netif_msg_intr(tp)) {
2520 printk(KERN_WARNING
2521 "%s: Too much work at interrupt!\n", dev->name);
2522 }
2523 /* Clear all interrupt sources. */
2524 RTL_W16(IntrStatus, 0xffff);
2525 }
2526 out:
2527 return IRQ_RETVAL(handled);
2528 }
2529
2530 #ifdef CONFIG_R8169_NAPI
2531 static int rtl8169_poll(struct net_device *dev, int *budget)
2532 {
2533 unsigned int work_done, work_to_do = min(*budget, dev->quota);
2534 struct rtl8169_private *tp = netdev_priv(dev);
2535 void __iomem *ioaddr = tp->mmio_addr;
2536
2537 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2538 rtl8169_tx_interrupt(dev, tp, ioaddr);
2539
2540 *budget -= work_done;
2541 dev->quota -= work_done;
2542
2543 if (work_done < work_to_do) {
2544 netif_rx_complete(dev);
2545 tp->intr_mask = 0xffff;
2546 /*
2547 * 20040426: the barrier is not strictly required but the
2548 * behavior of the irq handler could be less predictable
2549 * without it. Btw, the lack of flush for the posted pci
2550 * write is safe - FR
2551 */
2552 smp_wmb();
2553 RTL_W16(IntrMask, rtl8169_intr_mask);
2554 }
2555
2556 return (work_done >= work_to_do);
2557 }
2558 #endif
2559
2560 static void rtl8169_down(struct net_device *dev)
2561 {
2562 struct rtl8169_private *tp = netdev_priv(dev);
2563 void __iomem *ioaddr = tp->mmio_addr;
2564 unsigned int poll_locked = 0;
2565
2566 rtl8169_delete_timer(dev);
2567
2568 netif_stop_queue(dev);
2569
2570 flush_scheduled_work();
2571
2572 core_down:
2573 spin_lock_irq(&tp->lock);
2574
2575 rtl8169_asic_down(ioaddr);
2576
2577 /* Update the error counts. */
2578 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2579 RTL_W32(RxMissed, 0);
2580
2581 spin_unlock_irq(&tp->lock);
2582
2583 synchronize_irq(dev->irq);
2584
2585 if (!poll_locked) {
2586 netif_poll_disable(dev);
2587 poll_locked++;
2588 }
2589
2590 /* Give a racing hard_start_xmit a few cycles to complete. */
2591 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2592
2593 /*
2594 * And now for the 50k$ question: are IRQ disabled or not ?
2595 *
2596 * Two paths lead here:
2597 * 1) dev->close
2598 * -> netif_running() is available to sync the current code and the
2599 * IRQ handler. See rtl8169_interrupt for details.
2600 * 2) dev->change_mtu
2601 * -> rtl8169_poll can not be issued again and re-enable the
2602 * interruptions. Let's simply issue the IRQ down sequence again.
2603 */
2604 if (RTL_R16(IntrMask))
2605 goto core_down;
2606
2607 rtl8169_tx_clear(tp);
2608
2609 rtl8169_rx_clear(tp);
2610 }
2611
2612 static int rtl8169_close(struct net_device *dev)
2613 {
2614 struct rtl8169_private *tp = netdev_priv(dev);
2615 struct pci_dev *pdev = tp->pci_dev;
2616
2617 rtl8169_down(dev);
2618
2619 free_irq(dev->irq, dev);
2620
2621 netif_poll_enable(dev);
2622
2623 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2624 tp->RxPhyAddr);
2625 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2626 tp->TxPhyAddr);
2627 tp->TxDescArray = NULL;
2628 tp->RxDescArray = NULL;
2629
2630 return 0;
2631 }
2632
2633 static void
2634 rtl8169_set_rx_mode(struct net_device *dev)
2635 {
2636 struct rtl8169_private *tp = netdev_priv(dev);
2637 void __iomem *ioaddr = tp->mmio_addr;
2638 unsigned long flags;
2639 u32 mc_filter[2]; /* Multicast hash filter */
2640 int i, rx_mode;
2641 u32 tmp = 0;
2642
2643 if (dev->flags & IFF_PROMISC) {
2644 /* Unconditionally log net taps. */
2645 if (netif_msg_link(tp)) {
2646 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2647 dev->name);
2648 }
2649 rx_mode =
2650 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2651 AcceptAllPhys;
2652 mc_filter[1] = mc_filter[0] = 0xffffffff;
2653 } else if ((dev->mc_count > multicast_filter_limit)
2654 || (dev->flags & IFF_ALLMULTI)) {
2655 /* Too many to filter perfectly -- accept all multicasts. */
2656 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2657 mc_filter[1] = mc_filter[0] = 0xffffffff;
2658 } else {
2659 struct dev_mc_list *mclist;
2660 rx_mode = AcceptBroadcast | AcceptMyPhys;
2661 mc_filter[1] = mc_filter[0] = 0;
2662 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2663 i++, mclist = mclist->next) {
2664 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2665 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2666 rx_mode |= AcceptMulticast;
2667 }
2668 }
2669
2670 spin_lock_irqsave(&tp->lock, flags);
2671
2672 tmp = rtl8169_rx_config | rx_mode |
2673 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2674
2675 RTL_W32(RxConfig, tmp);
2676 RTL_W32(MAR0 + 0, mc_filter[0]);
2677 RTL_W32(MAR0 + 4, mc_filter[1]);
2678
2679 spin_unlock_irqrestore(&tp->lock, flags);
2680 }
2681
2682 /**
2683 * rtl8169_get_stats - Get rtl8169 read/write statistics
2684 * @dev: The Ethernet Device to get statistics for
2685 *
2686 * Get TX/RX statistics for rtl8169
2687 */
2688 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2689 {
2690 struct rtl8169_private *tp = netdev_priv(dev);
2691 void __iomem *ioaddr = tp->mmio_addr;
2692 unsigned long flags;
2693
2694 if (netif_running(dev)) {
2695 spin_lock_irqsave(&tp->lock, flags);
2696 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2697 RTL_W32(RxMissed, 0);
2698 spin_unlock_irqrestore(&tp->lock, flags);
2699 }
2700
2701 return &tp->stats;
2702 }
2703
2704 static struct pci_driver rtl8169_pci_driver = {
2705 .name = MODULENAME,
2706 .id_table = rtl8169_pci_tbl,
2707 .probe = rtl8169_init_one,
2708 .remove = __devexit_p(rtl8169_remove_one),
2709 #ifdef CONFIG_PM
2710 .suspend = rtl8169_suspend,
2711 .resume = rtl8169_resume,
2712 #endif
2713 };
2714
2715 static int __init
2716 rtl8169_init_module(void)
2717 {
2718 return pci_module_init(&rtl8169_pci_driver);
2719 }
2720
2721 static void __exit
2722 rtl8169_cleanup_module(void)
2723 {
2724 pci_unregister_driver(&rtl8169_pci_driver);
2725 }
2726
2727 module_init(rtl8169_init_module);
2728 module_exit(rtl8169_cleanup_module);
Linux with added FPC-III support