arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Samsung Exynos5433 TM2E board device tree source
   4  *
   5  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
   6  *
   7  * Device tree source file for Samsung's TM2E(TM2 EDGE) board which is based on
   8  * Samsung Exynos5433 SoC.
   9  */
  10
  11 #include "exynos5433-tm2-common.dtsi"
  12
  13 / {
  14         model = "Samsung TM2E board";
  15         compatible = "samsung,tm2e", "samsung,exynos5433";
  16 };
  17
  18 &cmu_disp {
  19         /*
  20          * TM2 and TM2e differ only by DISP_PLL rate, but define all assigned
  21          * clocks properties for DISP CMU for each board to keep them together
  22          * for easier review and maintenance.
  23          */
  24         assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
  25                           <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
  26                           <&cmu_disp CLK_MOUT_ACLK_DISP_333_USER>,
  27                           <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
  28                           <&cmu_disp CLK_MOUT_SCLK_DSIM0>,
  29                           <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
  30                           <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK>,
  31                           <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER>,
  32                           <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER>,
  33                           <&cmu_disp CLK_MOUT_DISP_PLL>,
  34                           <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
  35                           <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
  36                           <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
  37         assigned-clock-parents = <0>, <0>,
  38                                  <&cmu_mif CLK_ACLK_DISP_333>,
  39                                  <&cmu_mif CLK_SCLK_DSIM0_DISP>,
  40                                  <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
  41                                  <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
  42                                  <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
  43                                  <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY>,
  44                                  <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY>,
  45                                  <&cmu_disp CLK_FOUT_DISP_PLL>,
  46                                  <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
  47                                  <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
  48                                  <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
  49         assigned-clock-rates = <278000000>, <400000000>;
  50 };
  51
  52 &dsi {
  53         panel@0 {
  54                 compatible = "samsung,s6e3hf2";
  55                 reg = <0>;
  56                 vdd3-supply = <&ldo27_reg>;
  57                 vci-supply = <&ldo28_reg>;
  58                 reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
  59                 enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
  60         };
  61 };
  62
  63 &ldo31_reg {
  64         regulator-name = "TSP_VDD_1.8V_AP";
  65         regulator-min-microvolt = <1800000>;
  66         regulator-max-microvolt = <1800000>;
  67 };
  68
  69 &ldo38_reg {
  70         regulator-name = "VCC_3.3V_MOTOR_AP";
  71         regulator-min-microvolt = <3300000>;
  72         regulator-max-microvolt = <3300000>;
  73 };
  74
  75 &stmfts {
  76         touchscreen-size-x = <1599>;
  77         touchscreen-size-y = <2559>;
  78         touch-key-connected;
  79         ledvdd-supply = <&ldo33_reg>;
  80 };