1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/include/asm-m68k/raw_io.h
5 * 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
14 #include <asm/byteorder.h>
16 /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
17 * two accesses to memory, which may be undesirable for some devices.
20 ({ u8 __v = (*(__force volatile u8 *) (addr)); __v; })
21 #define in_be16(addr) \
22 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
23 #define in_be32(addr) \
24 ({ u32 __v = (*(__force volatile u32 *) (addr)); __v; })
25 #define in_le16(addr) \
26 ({ u16 __v = le16_to_cpu(*(__force volatile __le16 *) (addr)); __v; })
27 #define in_le32(addr) \
28 ({ u32 __v = le32_to_cpu(*(__force volatile __le32 *) (addr)); __v; })
30 #define out_8(addr,b) (void)((*(__force volatile u8 *) (addr)) = (b))
31 #define out_be16(addr,w) (void)((*(__force volatile u16 *) (addr)) = (w))
32 #define out_be32(addr,l) (void)((*(__force volatile u32 *) (addr)) = (l))
33 #define out_le16(addr,w) (void)((*(__force volatile __le16 *) (addr)) = cpu_to_le16(w))
34 #define out_le32(addr,l) (void)((*(__force volatile __le32 *) (addr)) = cpu_to_le32(l))
37 #define raw_inw in_be16
38 #define raw_inl in_be32
39 #define __raw_readb in_8
40 #define __raw_readw in_be16
41 #define __raw_readl in_be32
43 #define raw_outb(val,port) out_8((port),(val))
44 #define raw_outw(val,port) out_be16((port),(val))
45 #define raw_outl(val,port) out_be32((port),(val))
46 #define __raw_writeb(val,addr) out_8((addr),(val))
47 #define __raw_writew(val,addr) out_be16((addr),(val))
48 #define __raw_writel(val,addr) out_be32((addr),(val))
51 * Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
52 * network card driver.
53 * The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
54 * and hardwires the rest of the ISA addresses for a base address of 0x300.
56 * Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
57 * For writes, address lines A1-A8 are latched to ISA data lines D0-D7
58 * (meaning the bit pattern on A1-A8 can be read back as byte).
60 * Read and write operations are distinguished by the base address used:
61 * reads are from the ROM A side range, writes are through the B side range
62 * addresses (A side base + 0x10000).
64 * Reads and writes are byte only.
66 * 16 bit reads and writes are necessary for the NetUSBee adapter's USB
67 * chipset - 16 bit words are read straight off the ROM port while 16 bit
68 * reads are split into two byte writes. The low byte is latched to the
69 * NetUSBee buffer by a read from the _read_ window (with the data pattern
70 * asserted as A1-A8 address pattern). The high byte is then written to the
71 * write range as usual, completing the write cycle.
74 #if defined(CONFIG_ATARI_ROM_ISA)
75 #define rom_in_8(addr) \
76 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
77 #define rom_in_be16(addr) \
78 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
79 #define rom_in_le16(addr) \
80 ({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v; })
82 #define rom_out_8(addr, b) \
83 ({u8 __w, __v = (b); u32 _addr = ((u32) (addr)); \
84 __w = ((*(__force volatile u8 *) ((_addr | 0x10000) + (__v<<1)))); })
85 #define rom_out_be16(addr, w) \
86 ({u16 __w, __v = (w); u32 _addr = ((u32) (addr)); \
87 __w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
88 __w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
89 #define rom_out_le16(addr, w) \
90 ({u16 __w, __v = (w); u32 _addr = ((u32) (addr)); \
91 __w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
92 __w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
94 #define raw_rom_inb rom_in_8
95 #define raw_rom_inw rom_in_be16
97 #define raw_rom_outb(val, port) rom_out_8((port), (val))
98 #define raw_rom_outw(val, port) rom_out_be16((port), (val))
99 #endif /* CONFIG_ATARI_ROM_ISA */
101 static inline void raw_insb(volatile u8 __iomem
*port
, u8
*buf
, unsigned int len
)
105 for (i
= 0; i
< len
; i
++)
109 static inline void raw_outsb(volatile u8 __iomem
*port
, const u8
*buf
,
117 "1: moveb %0@+,%2@; dbra %1,1b"
118 : "=a" (buf
), "=d" (tmp
)
119 : "a" (port
), "0" (buf
),
143 : "=a" (buf
), "=d" (tmp
)
144 : "a" (port
), "0" (buf
),
149 static inline void raw_insw(volatile u16 __iomem
*port
, u16
*buf
, unsigned int nr
)
156 "1: movew %2@,%0@+; dbra %1,1b"
157 : "=a" (buf
), "=d" (tmp
)
158 : "a" (port
), "0" (buf
),
182 : "=a" (buf
), "=d" (tmp
)
183 : "a" (port
), "0" (buf
),
188 static inline void raw_outsw(volatile u16 __iomem
*port
, const u16
*buf
,
196 "1: movew %0@+,%2@; dbra %1,1b"
197 : "=a" (buf
), "=d" (tmp
)
198 : "a" (port
), "0" (buf
),
222 : "=a" (buf
), "=d" (tmp
)
223 : "a" (port
), "0" (buf
),
228 static inline void raw_insl(volatile u32 __iomem
*port
, u32
*buf
, unsigned int nr
)
235 "1: movel %2@,%0@+; dbra %1,1b"
236 : "=a" (buf
), "=d" (tmp
)
237 : "a" (port
), "0" (buf
),
261 : "=a" (buf
), "=d" (tmp
)
262 : "a" (port
), "0" (buf
),
267 static inline void raw_outsl(volatile u32 __iomem
*port
, const u32
*buf
,
275 "1: movel %0@+,%2@; dbra %1,1b"
276 : "=a" (buf
), "=d" (tmp
)
277 : "a" (port
), "0" (buf
),
301 : "=a" (buf
), "=d" (tmp
)
302 : "a" (port
), "0" (buf
),
308 static inline void raw_insw_swapw(volatile u16 __iomem
*port
, u16
*buf
,
313 ("\tmovel %0,%/a0\n\t"
317 "1:\tmovew %/a0@,%/d0\n\t"
319 "movew %/d0,%/a1@+\n\t"
322 : "g" (port
), "g" (buf
), "g" (nr
)
323 : "d0", "a0", "a1", "d6");
331 "1:\tmovew %/a0@,%/d0\n\t"
333 "movew %/d0,%/a1@+\n\t"
334 "movew %/a0@,%/d0\n\t"
336 "movew %/d0,%/a1@+\n\t"
337 "movew %/a0@,%/d0\n\t"
339 "movew %/d0,%/a1@+\n\t"
340 "movew %/a0@,%/d0\n\t"
342 "movew %/d0,%/a1@+\n\t"
343 "movew %/a0@,%/d0\n\t"
345 "movew %/d0,%/a1@+\n\t"
346 "movew %/a0@,%/d0\n\t"
348 "movew %/d0,%/a1@+\n\t"
349 "movew %/a0@,%/d0\n\t"
351 "movew %/d0,%/a1@+\n\t"
352 "movew %/a0@,%/d0\n\t"
354 "movew %/d0,%/a1@+\n\t"
357 : "g" (port
), "g" (buf
), "g" (nr
)
358 : "d0", "a0", "a1", "d6");
361 static inline void raw_outsw_swapw(volatile u16 __iomem
*port
, const u16
*buf
,
370 "1:\tmovew %/a1@+,%/d0\n\t"
372 "movew %/d0,%/a0@\n\t"
375 : "g" (port
), "g" (buf
), "g" (nr
)
376 : "d0", "a0", "a1", "d6");
384 "1:\tmovew %/a1@+,%/d0\n\t"
386 "movew %/d0,%/a0@\n\t"
387 "movew %/a1@+,%/d0\n\t"
389 "movew %/d0,%/a0@\n\t"
390 "movew %/a1@+,%/d0\n\t"
392 "movew %/d0,%/a0@\n\t"
393 "movew %/a1@+,%/d0\n\t"
395 "movew %/d0,%/a0@\n\t"
396 "movew %/a1@+,%/d0\n\t"
398 "movew %/d0,%/a0@\n\t"
399 "movew %/a1@+,%/d0\n\t"
401 "movew %/d0,%/a0@\n\t"
402 "movew %/a1@+,%/d0\n\t"
404 "movew %/d0,%/a0@\n\t"
405 "movew %/a1@+,%/d0\n\t"
407 "movew %/d0,%/a0@\n\t"
410 : "g" (port
), "g" (buf
), "g" (nr
)
411 : "d0", "a0", "a1", "d6");
415 #if defined(CONFIG_ATARI_ROM_ISA)
416 static inline void raw_rom_insb(volatile u8 __iomem
*port
, u8
*buf
, unsigned int len
)
420 for (i
= 0; i
< len
; i
++)
421 *buf
++ = rom_in_8(port
);
424 static inline void raw_rom_outsb(volatile u8 __iomem
*port
, const u8
*buf
,
429 for (i
= 0; i
< len
; i
++)
430 rom_out_8(port
, *buf
++);
433 static inline void raw_rom_insw(volatile u16 __iomem
*port
, u16
*buf
,
438 for (i
= 0; i
< nr
; i
++)
439 *buf
++ = rom_in_be16(port
);
442 static inline void raw_rom_outsw(volatile u16 __iomem
*port
, const u16
*buf
,
447 for (i
= 0; i
< nr
; i
++)
448 rom_out_be16(port
, *buf
++);
451 static inline void raw_rom_insw_swapw(volatile u16 __iomem
*port
, u16
*buf
,
456 for (i
= 0; i
< nr
; i
++)
457 *buf
++ = rom_in_le16(port
);
460 static inline void raw_rom_outsw_swapw(volatile u16 __iomem
*port
, const u16
*buf
,
465 for (i
= 0; i
< nr
; i
++)
466 rom_out_le16(port
, *buf
++);
468 #endif /* CONFIG_ATARI_ROM_ISA */
470 #endif /* __KERNEL__ */
472 #endif /* _RAW_IO_H */