drivers/fpga/altera-pr-ip-core-plat.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Driver for Altera Partial Reconfiguration IP Core
   4  *
   5  * Copyright (C) 2016-2017 Intel Corporation
   6  *
   7  * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
   8  *  by Alan Tull <atull@opensource.altera.com>
   9  */
  10 #include <linux/fpga/altera-pr-ip-core.h>
  11 #include <linux/module.h>
  12 #include <linux/of_device.h>
  13
  14 static int alt_pr_platform_probe(struct platform_device *pdev)
  15 {
  16         struct device *dev = &pdev->dev;
  17         void __iomem *reg_base;
  18         struct resource *res;
  19
  20         /* First mmio base is for register access */
  21         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  22
  23         reg_base = devm_ioremap_resource(dev, res);
  24
  25         if (IS_ERR(reg_base))
  26                 return PTR_ERR(reg_base);
  27
  28         return alt_pr_register(dev, reg_base);
  29 }
  30
  31 static int alt_pr_platform_remove(struct platform_device *pdev)
  32 {
  33         struct device *dev = &pdev->dev;
  34
  35         return alt_pr_unregister(dev);
  36 }
  37
  38 static const struct of_device_id alt_pr_of_match[] = {
  39         { .compatible = "altr,a10-pr-ip", },
  40         {},
  41 };
  42
  43 MODULE_DEVICE_TABLE(of, alt_pr_of_match);
  44
  45 static struct platform_driver alt_pr_platform_driver = {
  46         .probe = alt_pr_platform_probe,
  47         .remove = alt_pr_platform_remove,
  48         .driver = {
  49                 .name   = "alt_a10_pr_ip",
  50                 .of_match_table = alt_pr_of_match,
  51         },
  52 };
  53
  54 module_platform_driver(alt_pr_platform_driver);
  55 MODULE_AUTHOR("Matthew Gerlach <matthew.gerlach@linux.intel.com>");
  56 MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Platform Driver");
  57 MODULE_LICENSE("GPL v2");