PCI: hotplug: Embed hotplug_slot
[linux/fpc-iii.git] / drivers / scsi / lpfc / lpfc_debugfs.h
blob30efc7bf91bd93d97c5ccc4938622fc56bd991b7
1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2007-2011 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * *
10 * This program is free software; you can redistribute it and/or *
11 * modify it under the terms of version 2 of the GNU General *
12 * Public License as published by the Free Software Foundation. *
13 * This program is distributed in the hope that it will be useful. *
14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18 * TO BE LEGALLY INVALID. See the GNU General Public License for *
19 * more details, a copy of which can be found in the file COPYING *
20 * included with this package. *
21 *******************************************************************/
23 #ifndef _H_LPFC_DEBUG_FS
24 #define _H_LPFC_DEBUG_FS
26 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
28 /* size of output line, for discovery_trace and slow_ring_trace */
29 #define LPFC_DEBUG_TRC_ENTRY_SIZE 100
31 /* nodelist output buffer size */
32 #define LPFC_NODELIST_SIZE 8192
33 #define LPFC_NODELIST_ENTRY_SIZE 120
35 /* dumpHBASlim output buffer size */
36 #define LPFC_DUMPHBASLIM_SIZE 4096
38 /* dumpHostSlim output buffer size */
39 #define LPFC_DUMPHOSTSLIM_SIZE 4096
41 /* dumpSLIqinfo output buffer size */
42 #define LPFC_DUMPSLIQINFO_SIZE 4096
44 /* hbqinfo output buffer size */
45 #define LPFC_HBQINFO_SIZE 8192
47 /* nvmestat output buffer size */
48 #define LPFC_NVMESTAT_SIZE 8192
49 #define LPFC_NVMEKTIME_SIZE 8192
50 #define LPFC_CPUCHECK_SIZE 8192
51 #define LPFC_NVMEIO_TRC_SIZE 8192
53 #define LPFC_DEBUG_OUT_LINE_SZ 80
56 * For SLI4 iDiag debugfs diagnostics tool
59 /* pciConf */
60 #define LPFC_PCI_CFG_BROWSE 0xffff
61 #define LPFC_PCI_CFG_RD_CMD_ARG 2
62 #define LPFC_PCI_CFG_WR_CMD_ARG 3
63 #define LPFC_PCI_CFG_SIZE 4096
64 #define LPFC_PCI_CFG_RD_SIZE (LPFC_PCI_CFG_SIZE/4)
66 #define IDIAG_PCICFG_WHERE_INDX 0
67 #define IDIAG_PCICFG_COUNT_INDX 1
68 #define IDIAG_PCICFG_VALUE_INDX 2
70 /* barAcc */
71 #define LPFC_PCI_BAR_BROWSE 0xffff
72 #define LPFC_PCI_BAR_RD_CMD_ARG 3
73 #define LPFC_PCI_BAR_WR_CMD_ARG 3
75 #define LPFC_PCI_IF0_BAR0_SIZE (1024 * 16)
76 #define LPFC_PCI_IF0_BAR1_SIZE (1024 * 128)
77 #define LPFC_PCI_IF0_BAR2_SIZE (1024 * 128)
78 #define LPFC_PCI_IF2_BAR0_SIZE (1024 * 32)
80 #define LPFC_PCI_BAR_RD_BUF_SIZE 4096
81 #define LPFC_PCI_BAR_RD_SIZE (LPFC_PCI_BAR_RD_BUF_SIZE/4)
83 #define LPFC_PCI_IF0_BAR0_RD_SIZE (LPFC_PCI_IF0_BAR0_SIZE/4)
84 #define LPFC_PCI_IF0_BAR1_RD_SIZE (LPFC_PCI_IF0_BAR1_SIZE/4)
85 #define LPFC_PCI_IF0_BAR2_RD_SIZE (LPFC_PCI_IF0_BAR2_SIZE/4)
86 #define LPFC_PCI_IF2_BAR0_RD_SIZE (LPFC_PCI_IF2_BAR0_SIZE/4)
88 #define IDIAG_BARACC_BAR_NUM_INDX 0
89 #define IDIAG_BARACC_OFF_SET_INDX 1
90 #define IDIAG_BARACC_ACC_MOD_INDX 2
91 #define IDIAG_BARACC_REG_VAL_INDX 2
92 #define IDIAG_BARACC_BAR_SZE_INDX 3
94 #define IDIAG_BARACC_BAR_0 0
95 #define IDIAG_BARACC_BAR_1 1
96 #define IDIAG_BARACC_BAR_2 2
98 #define SINGLE_WORD 1
100 /* queue info */
101 #define LPFC_QUE_INFO_GET_BUF_SIZE 4096
103 /* queue acc */
104 #define LPFC_QUE_ACC_BROWSE 0xffff
105 #define LPFC_QUE_ACC_RD_CMD_ARG 4
106 #define LPFC_QUE_ACC_WR_CMD_ARG 6
107 #define LPFC_QUE_ACC_BUF_SIZE 4096
108 #define LPFC_QUE_ACC_SIZE (LPFC_QUE_ACC_BUF_SIZE/2)
110 #define LPFC_IDIAG_EQ 1
111 #define LPFC_IDIAG_CQ 2
112 #define LPFC_IDIAG_MQ 3
113 #define LPFC_IDIAG_WQ 4
114 #define LPFC_IDIAG_RQ 5
116 #define IDIAG_QUEACC_QUETP_INDX 0
117 #define IDIAG_QUEACC_QUEID_INDX 1
118 #define IDIAG_QUEACC_INDEX_INDX 2
119 #define IDIAG_QUEACC_COUNT_INDX 3
120 #define IDIAG_QUEACC_OFFST_INDX 4
121 #define IDIAG_QUEACC_VALUE_INDX 5
123 /* doorbell register acc */
124 #define LPFC_DRB_ACC_ALL 0xffff
125 #define LPFC_DRB_ACC_RD_CMD_ARG 1
126 #define LPFC_DRB_ACC_WR_CMD_ARG 2
127 #define LPFC_DRB_ACC_BUF_SIZE 256
129 #define LPFC_DRB_EQ 1
130 #define LPFC_DRB_CQ 2
131 #define LPFC_DRB_MQ 3
132 #define LPFC_DRB_WQ 4
133 #define LPFC_DRB_RQ 5
135 #define LPFC_DRB_MAX 5
137 #define IDIAG_DRBACC_REGID_INDX 0
138 #define IDIAG_DRBACC_VALUE_INDX 1
140 /* control register acc */
141 #define LPFC_CTL_ACC_ALL 0xffff
142 #define LPFC_CTL_ACC_RD_CMD_ARG 1
143 #define LPFC_CTL_ACC_WR_CMD_ARG 2
144 #define LPFC_CTL_ACC_BUF_SIZE 256
146 #define LPFC_CTL_PORT_SEM 1
147 #define LPFC_CTL_PORT_STA 2
148 #define LPFC_CTL_PORT_CTL 3
149 #define LPFC_CTL_PORT_ER1 4
150 #define LPFC_CTL_PORT_ER2 5
151 #define LPFC_CTL_PDEV_CTL 6
153 #define LPFC_CTL_MAX 6
155 #define IDIAG_CTLACC_REGID_INDX 0
156 #define IDIAG_CTLACC_VALUE_INDX 1
158 /* mailbox access */
159 #define LPFC_MBX_DMP_ARG 4
161 #define LPFC_MBX_ACC_BUF_SIZE 512
162 #define LPFC_MBX_ACC_LBUF_SZ 128
164 #define LPFC_MBX_DMP_MBX_WORD 0x00000001
165 #define LPFC_MBX_DMP_MBX_BYTE 0x00000002
166 #define LPFC_MBX_DMP_MBX_ALL (LPFC_MBX_DMP_MBX_WORD | LPFC_MBX_DMP_MBX_BYTE)
168 #define LPFC_BSG_DMP_MBX_RD_MBX 0x00000001
169 #define LPFC_BSG_DMP_MBX_RD_BUF 0x00000002
170 #define LPFC_BSG_DMP_MBX_WR_MBX 0x00000004
171 #define LPFC_BSG_DMP_MBX_WR_BUF 0x00000008
172 #define LPFC_BSG_DMP_MBX_ALL (LPFC_BSG_DMP_MBX_RD_MBX | \
173 LPFC_BSG_DMP_MBX_RD_BUF | \
174 LPFC_BSG_DMP_MBX_WR_MBX | \
175 LPFC_BSG_DMP_MBX_WR_BUF)
177 #define LPFC_MBX_DMP_ALL 0xffff
178 #define LPFC_MBX_ALL_CMD 0xff
180 #define IDIAG_MBXACC_MBCMD_INDX 0
181 #define IDIAG_MBXACC_DPMAP_INDX 1
182 #define IDIAG_MBXACC_DPCNT_INDX 2
183 #define IDIAG_MBXACC_WDCNT_INDX 3
185 /* extents access */
186 #define LPFC_EXT_ACC_CMD_ARG 1
187 #define LPFC_EXT_ACC_BUF_SIZE 4096
189 #define LPFC_EXT_ACC_AVAIL 0x1
190 #define LPFC_EXT_ACC_ALLOC 0x2
191 #define LPFC_EXT_ACC_DRIVR 0x4
192 #define LPFC_EXT_ACC_ALL (LPFC_EXT_ACC_DRIVR | \
193 LPFC_EXT_ACC_AVAIL | \
194 LPFC_EXT_ACC_ALLOC)
196 #define IDIAG_EXTACC_EXMAP_INDX 0
198 #define SIZE_U8 sizeof(uint8_t)
199 #define SIZE_U16 sizeof(uint16_t)
200 #define SIZE_U32 sizeof(uint32_t)
202 #define lpfc_nvmeio_data(phba, fmt, arg...) \
204 if (phba->nvmeio_trc_on) \
205 lpfc_debugfs_nvme_trc(phba, fmt, ##arg); \
208 struct lpfc_debug {
209 char *i_private;
210 char op;
211 #define LPFC_IDIAG_OP_RD 1
212 #define LPFC_IDIAG_OP_WR 2
213 char *buffer;
214 int len;
217 struct lpfc_debugfs_trc {
218 char *fmt;
219 uint32_t data1;
220 uint32_t data2;
221 uint32_t data3;
222 uint32_t seq_cnt;
223 unsigned long jif;
226 struct lpfc_debugfs_nvmeio_trc {
227 char *fmt;
228 uint16_t data1;
229 uint16_t data2;
230 uint32_t data3;
233 struct lpfc_idiag_offset {
234 uint32_t last_rd;
237 #define LPFC_IDIAG_CMD_DATA_SIZE 8
238 struct lpfc_idiag_cmd {
239 uint32_t opcode;
240 #define LPFC_IDIAG_CMD_PCICFG_RD 0x00000001
241 #define LPFC_IDIAG_CMD_PCICFG_WR 0x00000002
242 #define LPFC_IDIAG_CMD_PCICFG_ST 0x00000003
243 #define LPFC_IDIAG_CMD_PCICFG_CL 0x00000004
245 #define LPFC_IDIAG_CMD_BARACC_RD 0x00000008
246 #define LPFC_IDIAG_CMD_BARACC_WR 0x00000009
247 #define LPFC_IDIAG_CMD_BARACC_ST 0x0000000a
248 #define LPFC_IDIAG_CMD_BARACC_CL 0x0000000b
250 #define LPFC_IDIAG_CMD_QUEACC_RD 0x00000011
251 #define LPFC_IDIAG_CMD_QUEACC_WR 0x00000012
252 #define LPFC_IDIAG_CMD_QUEACC_ST 0x00000013
253 #define LPFC_IDIAG_CMD_QUEACC_CL 0x00000014
255 #define LPFC_IDIAG_CMD_DRBACC_RD 0x00000021
256 #define LPFC_IDIAG_CMD_DRBACC_WR 0x00000022
257 #define LPFC_IDIAG_CMD_DRBACC_ST 0x00000023
258 #define LPFC_IDIAG_CMD_DRBACC_CL 0x00000024
260 #define LPFC_IDIAG_CMD_CTLACC_RD 0x00000031
261 #define LPFC_IDIAG_CMD_CTLACC_WR 0x00000032
262 #define LPFC_IDIAG_CMD_CTLACC_ST 0x00000033
263 #define LPFC_IDIAG_CMD_CTLACC_CL 0x00000034
265 #define LPFC_IDIAG_CMD_MBXACC_DP 0x00000041
266 #define LPFC_IDIAG_BSG_MBXACC_DP 0x00000042
268 #define LPFC_IDIAG_CMD_EXTACC_RD 0x00000051
270 uint32_t data[LPFC_IDIAG_CMD_DATA_SIZE];
273 struct lpfc_idiag {
274 uint32_t active;
275 struct lpfc_idiag_cmd cmd;
276 struct lpfc_idiag_offset offset;
277 void *ptr_private;
280 #else
282 #define lpfc_nvmeio_data(phba, fmt, arg...) \
283 no_printk(fmt, ##arg)
285 #endif
287 enum {
288 DUMP_FCP,
289 DUMP_NVME,
290 DUMP_MBX,
291 DUMP_ELS,
292 DUMP_NVMELS,
295 /* Mask for discovery_trace */
296 #define LPFC_DISC_TRC_ELS_CMD 0x1 /* Trace ELS commands */
297 #define LPFC_DISC_TRC_ELS_RSP 0x2 /* Trace ELS response */
298 #define LPFC_DISC_TRC_ELS_UNSOL 0x4 /* Trace ELS rcv'ed */
299 #define LPFC_DISC_TRC_ELS_ALL 0x7 /* Trace ELS */
300 #define LPFC_DISC_TRC_MBOX_VPORT 0x8 /* Trace vport MBOXs */
301 #define LPFC_DISC_TRC_MBOX 0x10 /* Trace other MBOXs */
302 #define LPFC_DISC_TRC_MBOX_ALL 0x18 /* Trace all MBOXs */
303 #define LPFC_DISC_TRC_CT 0x20 /* Trace disc CT requests */
304 #define LPFC_DISC_TRC_DSM 0x40 /* Trace DSM events */
305 #define LPFC_DISC_TRC_RPORT 0x80 /* Trace rport events */
306 #define LPFC_DISC_TRC_NODE 0x100 /* Trace ndlp state changes */
308 #define LPFC_DISC_TRC_DISCOVERY 0xef /* common mask for general
309 * discovery */
310 #endif /* H_LPFC_DEBUG_FS */
314 * Driver debug utility routines outside of debugfs. The debug utility
315 * routines implemented here is intended to be used in the instrumented
316 * debug driver for debugging host or port issues.
320 * lpfc_debug_dump_qe - dump an specific entry from a queue
321 * @q: Pointer to the queue descriptor.
322 * @idx: Index to the entry on the queue.
324 * This function dumps an entry indexed by @idx from a queue specified by the
325 * queue descriptor @q.
327 static inline void
328 lpfc_debug_dump_qe(struct lpfc_queue *q, uint32_t idx)
330 char line_buf[LPFC_LBUF_SZ];
331 int i, esize, qe_word_cnt, len;
332 uint32_t *pword;
334 /* sanity checks */
335 if (!q)
336 return;
337 if (idx >= q->entry_count)
338 return;
340 esize = q->entry_size;
341 qe_word_cnt = esize / sizeof(uint32_t);
342 pword = q->qe[idx].address;
344 len = 0;
345 len += snprintf(line_buf+len, LPFC_LBUF_SZ-len, "QE[%04d]: ", idx);
346 if (qe_word_cnt > 8)
347 printk(KERN_ERR "%s\n", line_buf);
349 for (i = 0; i < qe_word_cnt; i++) {
350 if (!(i % 8)) {
351 if (i != 0)
352 printk(KERN_ERR "%s\n", line_buf);
353 if (qe_word_cnt > 8) {
354 len = 0;
355 memset(line_buf, 0, LPFC_LBUF_SZ);
356 len += snprintf(line_buf+len, LPFC_LBUF_SZ-len,
357 "%03d: ", i);
360 len += snprintf(line_buf+len, LPFC_LBUF_SZ-len, "%08x ",
361 ((uint32_t)*pword) & 0xffffffff);
362 pword++;
364 if (qe_word_cnt <= 8 || (i - 1) % 8)
365 printk(KERN_ERR "%s\n", line_buf);
369 * lpfc_debug_dump_q - dump all entries from an specific queue
370 * @q: Pointer to the queue descriptor.
372 * This function dumps all entries from a queue specified by the queue
373 * descriptor @q.
375 static inline void
376 lpfc_debug_dump_q(struct lpfc_queue *q)
378 int idx, entry_count;
380 /* sanity check */
381 if (!q)
382 return;
384 dev_printk(KERN_ERR, &(((q->phba))->pcidev)->dev,
385 "%d: [qid:%d, type:%d, subtype:%d, "
386 "qe_size:%d, qe_count:%d, "
387 "host_index:%d, port_index:%d]\n",
388 (q->phba)->brd_no,
389 q->queue_id, q->type, q->subtype,
390 q->entry_size, q->entry_count,
391 q->host_index, q->hba_index);
392 entry_count = q->entry_count;
393 for (idx = 0; idx < entry_count; idx++)
394 lpfc_debug_dump_qe(q, idx);
395 printk(KERN_ERR "\n");
399 * lpfc_debug_dump_wq - dump all entries from the fcp or nvme work queue
400 * @phba: Pointer to HBA context object.
401 * @wqidx: Index to a FCP or NVME work queue.
403 * This function dumps all entries from a FCP or NVME work queue specified
404 * by the wqidx.
406 static inline void
407 lpfc_debug_dump_wq(struct lpfc_hba *phba, int qtype, int wqidx)
409 struct lpfc_queue *wq;
410 char *qtypestr;
412 if (qtype == DUMP_FCP) {
413 wq = phba->sli4_hba.fcp_wq[wqidx];
414 qtypestr = "FCP";
415 } else if (qtype == DUMP_NVME) {
416 wq = phba->sli4_hba.nvme_wq[wqidx];
417 qtypestr = "NVME";
418 } else if (qtype == DUMP_MBX) {
419 wq = phba->sli4_hba.mbx_wq;
420 qtypestr = "MBX";
421 } else if (qtype == DUMP_ELS) {
422 wq = phba->sli4_hba.els_wq;
423 qtypestr = "ELS";
424 } else if (qtype == DUMP_NVMELS) {
425 wq = phba->sli4_hba.nvmels_wq;
426 qtypestr = "NVMELS";
427 } else
428 return;
430 if (qtype == DUMP_FCP || qtype == DUMP_NVME)
431 pr_err("%s WQ: WQ[Idx:%d|Qid:%d]\n",
432 qtypestr, wqidx, wq->queue_id);
433 else
434 pr_err("%s WQ: WQ[Qid:%d]\n",
435 qtypestr, wq->queue_id);
437 lpfc_debug_dump_q(wq);
441 * lpfc_debug_dump_cq - dump all entries from a fcp or nvme work queue's
442 * cmpl queue
443 * @phba: Pointer to HBA context object.
444 * @wqidx: Index to a FCP work queue.
446 * This function dumps all entries from a FCP or NVME completion queue
447 * which is associated to the work queue specified by the @wqidx.
449 static inline void
450 lpfc_debug_dump_cq(struct lpfc_hba *phba, int qtype, int wqidx)
452 struct lpfc_queue *wq, *cq, *eq;
453 char *qtypestr;
454 int eqidx;
456 /* fcp/nvme wq and cq are 1:1, thus same indexes */
458 if (qtype == DUMP_FCP) {
459 wq = phba->sli4_hba.fcp_wq[wqidx];
460 cq = phba->sli4_hba.fcp_cq[wqidx];
461 qtypestr = "FCP";
462 } else if (qtype == DUMP_NVME) {
463 wq = phba->sli4_hba.nvme_wq[wqidx];
464 cq = phba->sli4_hba.nvme_cq[wqidx];
465 qtypestr = "NVME";
466 } else if (qtype == DUMP_MBX) {
467 wq = phba->sli4_hba.mbx_wq;
468 cq = phba->sli4_hba.mbx_cq;
469 qtypestr = "MBX";
470 } else if (qtype == DUMP_ELS) {
471 wq = phba->sli4_hba.els_wq;
472 cq = phba->sli4_hba.els_cq;
473 qtypestr = "ELS";
474 } else if (qtype == DUMP_NVMELS) {
475 wq = phba->sli4_hba.nvmels_wq;
476 cq = phba->sli4_hba.nvmels_cq;
477 qtypestr = "NVMELS";
478 } else
479 return;
481 for (eqidx = 0; eqidx < phba->io_channel_irqs; eqidx++) {
482 if (cq->assoc_qid == phba->sli4_hba.hba_eq[eqidx]->queue_id)
483 break;
485 if (eqidx == phba->io_channel_irqs) {
486 pr_err("Couldn't find EQ for CQ. Using EQ[0]\n");
487 eqidx = 0;
490 eq = phba->sli4_hba.hba_eq[eqidx];
492 if (qtype == DUMP_FCP || qtype == DUMP_NVME)
493 pr_err("%s CQ: WQ[Idx:%d|Qid%d]->CQ[Idx%d|Qid%d]"
494 "->EQ[Idx:%d|Qid:%d]:\n",
495 qtypestr, wqidx, wq->queue_id, wqidx, cq->queue_id,
496 eqidx, eq->queue_id);
497 else
498 pr_err("%s CQ: WQ[Qid:%d]->CQ[Qid:%d]"
499 "->EQ[Idx:%d|Qid:%d]:\n",
500 qtypestr, wq->queue_id, cq->queue_id,
501 eqidx, eq->queue_id);
503 lpfc_debug_dump_q(cq);
507 * lpfc_debug_dump_hba_eq - dump all entries from a fcp work queue's evt queue
508 * @phba: Pointer to HBA context object.
509 * @fcp_wqidx: Index to a FCP work queue.
511 * This function dumps all entries from a FCP event queue which is
512 * associated to the FCP work queue specified by the @fcp_wqidx.
514 static inline void
515 lpfc_debug_dump_hba_eq(struct lpfc_hba *phba, int qidx)
517 struct lpfc_queue *qp;
519 qp = phba->sli4_hba.hba_eq[qidx];
521 pr_err("EQ[Idx:%d|Qid:%d]\n", qidx, qp->queue_id);
523 lpfc_debug_dump_q(qp);
527 * lpfc_debug_dump_dat_rq - dump all entries from the receive data queue
528 * @phba: Pointer to HBA context object.
530 * This function dumps all entries from the receive data queue.
532 static inline void
533 lpfc_debug_dump_dat_rq(struct lpfc_hba *phba)
535 printk(KERN_ERR "DAT RQ: RQ[Qid:%d]\n",
536 phba->sli4_hba.dat_rq->queue_id);
537 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
541 * lpfc_debug_dump_hdr_rq - dump all entries from the receive header queue
542 * @phba: Pointer to HBA context object.
544 * This function dumps all entries from the receive header queue.
546 static inline void
547 lpfc_debug_dump_hdr_rq(struct lpfc_hba *phba)
549 printk(KERN_ERR "HDR RQ: RQ[Qid:%d]\n",
550 phba->sli4_hba.hdr_rq->queue_id);
551 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
555 * lpfc_debug_dump_wq_by_id - dump all entries from a work queue by queue id
556 * @phba: Pointer to HBA context object.
557 * @qid: Work queue identifier.
559 * This function dumps all entries from a work queue identified by the queue
560 * identifier.
562 static inline void
563 lpfc_debug_dump_wq_by_id(struct lpfc_hba *phba, int qid)
565 int wq_idx;
567 for (wq_idx = 0; wq_idx < phba->cfg_fcp_io_channel; wq_idx++)
568 if (phba->sli4_hba.fcp_wq[wq_idx]->queue_id == qid)
569 break;
570 if (wq_idx < phba->cfg_fcp_io_channel) {
571 pr_err("FCP WQ[Idx:%d|Qid:%d]\n", wq_idx, qid);
572 lpfc_debug_dump_q(phba->sli4_hba.fcp_wq[wq_idx]);
573 return;
576 for (wq_idx = 0; wq_idx < phba->cfg_nvme_io_channel; wq_idx++)
577 if (phba->sli4_hba.nvme_wq[wq_idx]->queue_id == qid)
578 break;
579 if (wq_idx < phba->cfg_nvme_io_channel) {
580 pr_err("NVME WQ[Idx:%d|Qid:%d]\n", wq_idx, qid);
581 lpfc_debug_dump_q(phba->sli4_hba.nvme_wq[wq_idx]);
582 return;
585 if (phba->sli4_hba.els_wq->queue_id == qid) {
586 pr_err("ELS WQ[Qid:%d]\n", qid);
587 lpfc_debug_dump_q(phba->sli4_hba.els_wq);
588 return;
591 if (phba->sli4_hba.nvmels_wq->queue_id == qid) {
592 pr_err("NVME LS WQ[Qid:%d]\n", qid);
593 lpfc_debug_dump_q(phba->sli4_hba.nvmels_wq);
598 * lpfc_debug_dump_mq_by_id - dump all entries from a mbox queue by queue id
599 * @phba: Pointer to HBA context object.
600 * @qid: Mbox work queue identifier.
602 * This function dumps all entries from a mbox work queue identified by the
603 * queue identifier.
605 static inline void
606 lpfc_debug_dump_mq_by_id(struct lpfc_hba *phba, int qid)
608 if (phba->sli4_hba.mbx_wq->queue_id == qid) {
609 printk(KERN_ERR "MBX WQ[Qid:%d]\n", qid);
610 lpfc_debug_dump_q(phba->sli4_hba.mbx_wq);
615 * lpfc_debug_dump_rq_by_id - dump all entries from a receive queue by queue id
616 * @phba: Pointer to HBA context object.
617 * @qid: Receive queue identifier.
619 * This function dumps all entries from a receive queue identified by the
620 * queue identifier.
622 static inline void
623 lpfc_debug_dump_rq_by_id(struct lpfc_hba *phba, int qid)
625 if (phba->sli4_hba.hdr_rq->queue_id == qid) {
626 printk(KERN_ERR "HDR RQ[Qid:%d]\n", qid);
627 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
628 return;
630 if (phba->sli4_hba.dat_rq->queue_id == qid) {
631 printk(KERN_ERR "DAT RQ[Qid:%d]\n", qid);
632 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
637 * lpfc_debug_dump_cq_by_id - dump all entries from a cmpl queue by queue id
638 * @phba: Pointer to HBA context object.
639 * @qid: Complete queue identifier.
641 * This function dumps all entries from a complete queue identified by the
642 * queue identifier.
644 static inline void
645 lpfc_debug_dump_cq_by_id(struct lpfc_hba *phba, int qid)
647 int cq_idx;
649 for (cq_idx = 0; cq_idx < phba->cfg_fcp_io_channel; cq_idx++)
650 if (phba->sli4_hba.fcp_cq[cq_idx]->queue_id == qid)
651 break;
653 if (cq_idx < phba->cfg_fcp_io_channel) {
654 pr_err("FCP CQ[Idx:%d|Qid:%d]\n", cq_idx, qid);
655 lpfc_debug_dump_q(phba->sli4_hba.fcp_cq[cq_idx]);
656 return;
659 for (cq_idx = 0; cq_idx < phba->cfg_nvme_io_channel; cq_idx++)
660 if (phba->sli4_hba.nvme_cq[cq_idx]->queue_id == qid)
661 break;
663 if (cq_idx < phba->cfg_nvme_io_channel) {
664 pr_err("NVME CQ[Idx:%d|Qid:%d]\n", cq_idx, qid);
665 lpfc_debug_dump_q(phba->sli4_hba.nvme_cq[cq_idx]);
666 return;
669 if (phba->sli4_hba.els_cq->queue_id == qid) {
670 pr_err("ELS CQ[Qid:%d]\n", qid);
671 lpfc_debug_dump_q(phba->sli4_hba.els_cq);
672 return;
675 if (phba->sli4_hba.nvmels_cq->queue_id == qid) {
676 pr_err("NVME LS CQ[Qid:%d]\n", qid);
677 lpfc_debug_dump_q(phba->sli4_hba.nvmels_cq);
678 return;
681 if (phba->sli4_hba.mbx_cq->queue_id == qid) {
682 pr_err("MBX CQ[Qid:%d]\n", qid);
683 lpfc_debug_dump_q(phba->sli4_hba.mbx_cq);
688 * lpfc_debug_dump_eq_by_id - dump all entries from an event queue by queue id
689 * @phba: Pointer to HBA context object.
690 * @qid: Complete queue identifier.
692 * This function dumps all entries from an event queue identified by the
693 * queue identifier.
695 static inline void
696 lpfc_debug_dump_eq_by_id(struct lpfc_hba *phba, int qid)
698 int eq_idx;
700 for (eq_idx = 0; eq_idx < phba->io_channel_irqs; eq_idx++)
701 if (phba->sli4_hba.hba_eq[eq_idx]->queue_id == qid)
702 break;
704 if (eq_idx < phba->io_channel_irqs) {
705 printk(KERN_ERR "FCP EQ[Idx:%d|Qid:%d]\n", eq_idx, qid);
706 lpfc_debug_dump_q(phba->sli4_hba.hba_eq[eq_idx]);
707 return;
711 void lpfc_debug_dump_all_queues(struct lpfc_hba *);