UML: fix the MODE_TT compilation
[linux/fpc-iii.git] / include / asm-sparc64 / cache.h
blobf7d35a2ae9b8a41401b73f70b74080080ddfcba4
1 /*
2 * include/asm-sparc64/cache.h
3 */
4 #ifndef __ARCH_SPARC64_CACHE_H
5 #define __ARCH_SPARC64_CACHE_H
7 /* bytes per L1 cache line */
8 #define L1_CACHE_SHIFT 5
9 #define L1_CACHE_BYTES 32 /* Two 16-byte sub-blocks per line. */
11 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
13 #define SMP_CACHE_BYTES_SHIFT 6
14 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) /* L2 cache line size. */
16 #endif