2 * Glue Code for the AVX assembler implemention of the Cast5 Cipher
4 * Copyright (C) 2012 Johannes Goetzfried
5 * <Johannes.Goetzfried@informatik.stud.uni-erlangen.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
24 #include <linux/module.h>
25 #include <linux/hardirq.h>
26 #include <linux/types.h>
27 #include <linux/crypto.h>
28 #include <linux/err.h>
29 #include <crypto/ablk_helper.h>
30 #include <crypto/algapi.h>
31 #include <crypto/cast5.h>
32 #include <crypto/cryptd.h>
33 #include <crypto/ctr.h>
34 #include <asm/fpu/api.h>
35 #include <asm/crypto/glue_helper.h>
37 #define CAST5_PARALLEL_BLOCKS 16
39 asmlinkage
void cast5_ecb_enc_16way(struct cast5_ctx
*ctx
, u8
*dst
,
41 asmlinkage
void cast5_ecb_dec_16way(struct cast5_ctx
*ctx
, u8
*dst
,
43 asmlinkage
void cast5_cbc_dec_16way(struct cast5_ctx
*ctx
, u8
*dst
,
45 asmlinkage
void cast5_ctr_16way(struct cast5_ctx
*ctx
, u8
*dst
, const u8
*src
,
48 static inline bool cast5_fpu_begin(bool fpu_enabled
, unsigned int nbytes
)
50 return glue_fpu_begin(CAST5_BLOCK_SIZE
, CAST5_PARALLEL_BLOCKS
,
51 NULL
, fpu_enabled
, nbytes
);
54 static inline void cast5_fpu_end(bool fpu_enabled
)
56 return glue_fpu_end(fpu_enabled
);
59 static int ecb_crypt(struct blkcipher_desc
*desc
, struct blkcipher_walk
*walk
,
62 bool fpu_enabled
= false;
63 struct cast5_ctx
*ctx
= crypto_blkcipher_ctx(desc
->tfm
);
64 const unsigned int bsize
= CAST5_BLOCK_SIZE
;
66 void (*fn
)(struct cast5_ctx
*ctx
, u8
*dst
, const u8
*src
);
69 fn
= (enc
) ? cast5_ecb_enc_16way
: cast5_ecb_dec_16way
;
71 err
= blkcipher_walk_virt(desc
, walk
);
72 desc
->flags
&= ~CRYPTO_TFM_REQ_MAY_SLEEP
;
74 while ((nbytes
= walk
->nbytes
)) {
75 u8
*wsrc
= walk
->src
.virt
.addr
;
76 u8
*wdst
= walk
->dst
.virt
.addr
;
78 fpu_enabled
= cast5_fpu_begin(fpu_enabled
, nbytes
);
80 /* Process multi-block batch */
81 if (nbytes
>= bsize
* CAST5_PARALLEL_BLOCKS
) {
85 wsrc
+= bsize
* CAST5_PARALLEL_BLOCKS
;
86 wdst
+= bsize
* CAST5_PARALLEL_BLOCKS
;
87 nbytes
-= bsize
* CAST5_PARALLEL_BLOCKS
;
88 } while (nbytes
>= bsize
* CAST5_PARALLEL_BLOCKS
);
94 fn
= (enc
) ? __cast5_encrypt
: __cast5_decrypt
;
96 /* Handle leftovers */
103 } while (nbytes
>= bsize
);
106 err
= blkcipher_walk_done(desc
, walk
, nbytes
);
109 cast5_fpu_end(fpu_enabled
);
113 static int ecb_encrypt(struct blkcipher_desc
*desc
, struct scatterlist
*dst
,
114 struct scatterlist
*src
, unsigned int nbytes
)
116 struct blkcipher_walk walk
;
118 blkcipher_walk_init(&walk
, dst
, src
, nbytes
);
119 return ecb_crypt(desc
, &walk
, true);
122 static int ecb_decrypt(struct blkcipher_desc
*desc
, struct scatterlist
*dst
,
123 struct scatterlist
*src
, unsigned int nbytes
)
125 struct blkcipher_walk walk
;
127 blkcipher_walk_init(&walk
, dst
, src
, nbytes
);
128 return ecb_crypt(desc
, &walk
, false);
131 static unsigned int __cbc_encrypt(struct blkcipher_desc
*desc
,
132 struct blkcipher_walk
*walk
)
134 struct cast5_ctx
*ctx
= crypto_blkcipher_ctx(desc
->tfm
);
135 const unsigned int bsize
= CAST5_BLOCK_SIZE
;
136 unsigned int nbytes
= walk
->nbytes
;
137 u64
*src
= (u64
*)walk
->src
.virt
.addr
;
138 u64
*dst
= (u64
*)walk
->dst
.virt
.addr
;
139 u64
*iv
= (u64
*)walk
->iv
;
143 __cast5_encrypt(ctx
, (u8
*)dst
, (u8
*)dst
);
149 } while (nbytes
>= bsize
);
151 *(u64
*)walk
->iv
= *iv
;
155 static int cbc_encrypt(struct blkcipher_desc
*desc
, struct scatterlist
*dst
,
156 struct scatterlist
*src
, unsigned int nbytes
)
158 struct blkcipher_walk walk
;
161 blkcipher_walk_init(&walk
, dst
, src
, nbytes
);
162 err
= blkcipher_walk_virt(desc
, &walk
);
164 while ((nbytes
= walk
.nbytes
)) {
165 nbytes
= __cbc_encrypt(desc
, &walk
);
166 err
= blkcipher_walk_done(desc
, &walk
, nbytes
);
172 static unsigned int __cbc_decrypt(struct blkcipher_desc
*desc
,
173 struct blkcipher_walk
*walk
)
175 struct cast5_ctx
*ctx
= crypto_blkcipher_ctx(desc
->tfm
);
176 const unsigned int bsize
= CAST5_BLOCK_SIZE
;
177 unsigned int nbytes
= walk
->nbytes
;
178 u64
*src
= (u64
*)walk
->src
.virt
.addr
;
179 u64
*dst
= (u64
*)walk
->dst
.virt
.addr
;
182 /* Start of the last block. */
183 src
+= nbytes
/ bsize
- 1;
184 dst
+= nbytes
/ bsize
- 1;
188 /* Process multi-block batch */
189 if (nbytes
>= bsize
* CAST5_PARALLEL_BLOCKS
) {
191 nbytes
-= bsize
* (CAST5_PARALLEL_BLOCKS
- 1);
192 src
-= CAST5_PARALLEL_BLOCKS
- 1;
193 dst
-= CAST5_PARALLEL_BLOCKS
- 1;
195 cast5_cbc_dec_16way(ctx
, (u8
*)dst
, (u8
*)src
);
204 } while (nbytes
>= bsize
* CAST5_PARALLEL_BLOCKS
);
207 /* Handle leftovers */
209 __cast5_decrypt(ctx
, (u8
*)dst
, (u8
*)src
);
221 *dst
^= *(u64
*)walk
->iv
;
222 *(u64
*)walk
->iv
= last_iv
;
227 static int cbc_decrypt(struct blkcipher_desc
*desc
, struct scatterlist
*dst
,
228 struct scatterlist
*src
, unsigned int nbytes
)
230 bool fpu_enabled
= false;
231 struct blkcipher_walk walk
;
234 blkcipher_walk_init(&walk
, dst
, src
, nbytes
);
235 err
= blkcipher_walk_virt(desc
, &walk
);
236 desc
->flags
&= ~CRYPTO_TFM_REQ_MAY_SLEEP
;
238 while ((nbytes
= walk
.nbytes
)) {
239 fpu_enabled
= cast5_fpu_begin(fpu_enabled
, nbytes
);
240 nbytes
= __cbc_decrypt(desc
, &walk
);
241 err
= blkcipher_walk_done(desc
, &walk
, nbytes
);
244 cast5_fpu_end(fpu_enabled
);
248 static void ctr_crypt_final(struct blkcipher_desc
*desc
,
249 struct blkcipher_walk
*walk
)
251 struct cast5_ctx
*ctx
= crypto_blkcipher_ctx(desc
->tfm
);
252 u8
*ctrblk
= walk
->iv
;
253 u8 keystream
[CAST5_BLOCK_SIZE
];
254 u8
*src
= walk
->src
.virt
.addr
;
255 u8
*dst
= walk
->dst
.virt
.addr
;
256 unsigned int nbytes
= walk
->nbytes
;
258 __cast5_encrypt(ctx
, keystream
, ctrblk
);
259 crypto_xor(keystream
, src
, nbytes
);
260 memcpy(dst
, keystream
, nbytes
);
262 crypto_inc(ctrblk
, CAST5_BLOCK_SIZE
);
265 static unsigned int __ctr_crypt(struct blkcipher_desc
*desc
,
266 struct blkcipher_walk
*walk
)
268 struct cast5_ctx
*ctx
= crypto_blkcipher_ctx(desc
->tfm
);
269 const unsigned int bsize
= CAST5_BLOCK_SIZE
;
270 unsigned int nbytes
= walk
->nbytes
;
271 u64
*src
= (u64
*)walk
->src
.virt
.addr
;
272 u64
*dst
= (u64
*)walk
->dst
.virt
.addr
;
274 /* Process multi-block batch */
275 if (nbytes
>= bsize
* CAST5_PARALLEL_BLOCKS
) {
277 cast5_ctr_16way(ctx
, (u8
*)dst
, (u8
*)src
,
280 src
+= CAST5_PARALLEL_BLOCKS
;
281 dst
+= CAST5_PARALLEL_BLOCKS
;
282 nbytes
-= bsize
* CAST5_PARALLEL_BLOCKS
;
283 } while (nbytes
>= bsize
* CAST5_PARALLEL_BLOCKS
);
289 /* Handle leftovers */
296 ctrblk
= *(u64
*)walk
->iv
;
297 be64_add_cpu((__be64
*)walk
->iv
, 1);
299 __cast5_encrypt(ctx
, (u8
*)&ctrblk
, (u8
*)&ctrblk
);
305 } while (nbytes
>= bsize
);
311 static int ctr_crypt(struct blkcipher_desc
*desc
, struct scatterlist
*dst
,
312 struct scatterlist
*src
, unsigned int nbytes
)
314 bool fpu_enabled
= false;
315 struct blkcipher_walk walk
;
318 blkcipher_walk_init(&walk
, dst
, src
, nbytes
);
319 err
= blkcipher_walk_virt_block(desc
, &walk
, CAST5_BLOCK_SIZE
);
320 desc
->flags
&= ~CRYPTO_TFM_REQ_MAY_SLEEP
;
322 while ((nbytes
= walk
.nbytes
) >= CAST5_BLOCK_SIZE
) {
323 fpu_enabled
= cast5_fpu_begin(fpu_enabled
, nbytes
);
324 nbytes
= __ctr_crypt(desc
, &walk
);
325 err
= blkcipher_walk_done(desc
, &walk
, nbytes
);
328 cast5_fpu_end(fpu_enabled
);
331 ctr_crypt_final(desc
, &walk
);
332 err
= blkcipher_walk_done(desc
, &walk
, 0);
339 static struct crypto_alg cast5_algs
[6] = { {
340 .cra_name
= "__ecb-cast5-avx",
341 .cra_driver_name
= "__driver-ecb-cast5-avx",
343 .cra_flags
= CRYPTO_ALG_TYPE_BLKCIPHER
|
345 .cra_blocksize
= CAST5_BLOCK_SIZE
,
346 .cra_ctxsize
= sizeof(struct cast5_ctx
),
348 .cra_type
= &crypto_blkcipher_type
,
349 .cra_module
= THIS_MODULE
,
352 .min_keysize
= CAST5_MIN_KEY_SIZE
,
353 .max_keysize
= CAST5_MAX_KEY_SIZE
,
354 .setkey
= cast5_setkey
,
355 .encrypt
= ecb_encrypt
,
356 .decrypt
= ecb_decrypt
,
360 .cra_name
= "__cbc-cast5-avx",
361 .cra_driver_name
= "__driver-cbc-cast5-avx",
363 .cra_flags
= CRYPTO_ALG_TYPE_BLKCIPHER
|
365 .cra_blocksize
= CAST5_BLOCK_SIZE
,
366 .cra_ctxsize
= sizeof(struct cast5_ctx
),
368 .cra_type
= &crypto_blkcipher_type
,
369 .cra_module
= THIS_MODULE
,
372 .min_keysize
= CAST5_MIN_KEY_SIZE
,
373 .max_keysize
= CAST5_MAX_KEY_SIZE
,
374 .setkey
= cast5_setkey
,
375 .encrypt
= cbc_encrypt
,
376 .decrypt
= cbc_decrypt
,
380 .cra_name
= "__ctr-cast5-avx",
381 .cra_driver_name
= "__driver-ctr-cast5-avx",
383 .cra_flags
= CRYPTO_ALG_TYPE_BLKCIPHER
|
386 .cra_ctxsize
= sizeof(struct cast5_ctx
),
388 .cra_type
= &crypto_blkcipher_type
,
389 .cra_module
= THIS_MODULE
,
392 .min_keysize
= CAST5_MIN_KEY_SIZE
,
393 .max_keysize
= CAST5_MAX_KEY_SIZE
,
394 .ivsize
= CAST5_BLOCK_SIZE
,
395 .setkey
= cast5_setkey
,
396 .encrypt
= ctr_crypt
,
397 .decrypt
= ctr_crypt
,
401 .cra_name
= "ecb(cast5)",
402 .cra_driver_name
= "ecb-cast5-avx",
404 .cra_flags
= CRYPTO_ALG_TYPE_ABLKCIPHER
| CRYPTO_ALG_ASYNC
,
405 .cra_blocksize
= CAST5_BLOCK_SIZE
,
406 .cra_ctxsize
= sizeof(struct async_helper_ctx
),
408 .cra_type
= &crypto_ablkcipher_type
,
409 .cra_module
= THIS_MODULE
,
410 .cra_init
= ablk_init
,
411 .cra_exit
= ablk_exit
,
414 .min_keysize
= CAST5_MIN_KEY_SIZE
,
415 .max_keysize
= CAST5_MAX_KEY_SIZE
,
416 .setkey
= ablk_set_key
,
417 .encrypt
= ablk_encrypt
,
418 .decrypt
= ablk_decrypt
,
422 .cra_name
= "cbc(cast5)",
423 .cra_driver_name
= "cbc-cast5-avx",
425 .cra_flags
= CRYPTO_ALG_TYPE_ABLKCIPHER
| CRYPTO_ALG_ASYNC
,
426 .cra_blocksize
= CAST5_BLOCK_SIZE
,
427 .cra_ctxsize
= sizeof(struct async_helper_ctx
),
429 .cra_type
= &crypto_ablkcipher_type
,
430 .cra_module
= THIS_MODULE
,
431 .cra_init
= ablk_init
,
432 .cra_exit
= ablk_exit
,
435 .min_keysize
= CAST5_MIN_KEY_SIZE
,
436 .max_keysize
= CAST5_MAX_KEY_SIZE
,
437 .ivsize
= CAST5_BLOCK_SIZE
,
438 .setkey
= ablk_set_key
,
439 .encrypt
= __ablk_encrypt
,
440 .decrypt
= ablk_decrypt
,
444 .cra_name
= "ctr(cast5)",
445 .cra_driver_name
= "ctr-cast5-avx",
447 .cra_flags
= CRYPTO_ALG_TYPE_ABLKCIPHER
| CRYPTO_ALG_ASYNC
,
449 .cra_ctxsize
= sizeof(struct async_helper_ctx
),
451 .cra_type
= &crypto_ablkcipher_type
,
452 .cra_module
= THIS_MODULE
,
453 .cra_init
= ablk_init
,
454 .cra_exit
= ablk_exit
,
457 .min_keysize
= CAST5_MIN_KEY_SIZE
,
458 .max_keysize
= CAST5_MAX_KEY_SIZE
,
459 .ivsize
= CAST5_BLOCK_SIZE
,
460 .setkey
= ablk_set_key
,
461 .encrypt
= ablk_encrypt
,
462 .decrypt
= ablk_encrypt
,
468 static int __init
cast5_init(void)
470 const char *feature_name
;
472 if (!cpu_has_xfeatures(XSTATE_SSE
| XSTATE_YMM
, &feature_name
)) {
473 pr_info("CPU feature '%s' is not supported.\n", feature_name
);
477 return crypto_register_algs(cast5_algs
, ARRAY_SIZE(cast5_algs
));
480 static void __exit
cast5_exit(void)
482 crypto_unregister_algs(cast5_algs
, ARRAY_SIZE(cast5_algs
));
485 module_init(cast5_init
);
486 module_exit(cast5_exit
);
488 MODULE_DESCRIPTION("Cast5 Cipher Algorithm, AVX optimized");
489 MODULE_LICENSE("GPL");
490 MODULE_ALIAS_CRYPTO("cast5");