2 * Routines common to most mpc85xx-based boards.
4 * This is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/of_irq.h>
10 #include <linux/of_platform.h>
12 #include <asm/fsl_pm.h>
13 #include <soc/fsl/qe/qe.h>
14 #include <sysdev/cpm2_pic.h>
18 const struct fsl_pm_ops
*qoriq_pm_ops
;
20 static const struct of_device_id mpc85xx_common_ids
[] __initconst
= {
22 { .compatible
= "soc", },
23 { .compatible
= "simple-bus", },
25 { .name
= "localbus", },
26 { .compatible
= "gianfar", },
27 { .compatible
= "fsl,qe", },
28 { .compatible
= "fsl,cpm2", },
29 { .compatible
= "fsl,srio", },
30 /* So that the DMA channel nodes can be probed individually: */
31 { .compatible
= "fsl,eloplus-dma", },
32 /* For the PMC driver */
33 { .compatible
= "fsl,mpc8548-guts", },
34 /* Probably unnecessary? */
35 { .compatible
= "gpio-leds", },
36 /* For all PCI controllers */
37 { .compatible
= "fsl,mpc8540-pci", },
38 { .compatible
= "fsl,mpc8548-pcie", },
39 { .compatible
= "fsl,p1022-pcie", },
40 { .compatible
= "fsl,p1010-pcie", },
41 { .compatible
= "fsl,p1023-pcie", },
42 { .compatible
= "fsl,p4080-pcie", },
43 { .compatible
= "fsl,qoriq-pcie-v2.4", },
44 { .compatible
= "fsl,qoriq-pcie-v2.3", },
45 { .compatible
= "fsl,qoriq-pcie-v2.2", },
46 { .compatible
= "fsl,fman", },
50 int __init
mpc85xx_common_publish_devices(void)
52 return of_platform_bus_probe(NULL
, mpc85xx_common_ids
, NULL
);
55 static void cpm2_cascade(struct irq_desc
*desc
)
57 struct irq_chip
*chip
= irq_desc_get_chip(desc
);
60 while ((cascade_irq
= cpm2_get_irq()) >= 0)
61 generic_handle_irq(cascade_irq
);
63 chip
->irq_eoi(&desc
->irq_data
);
67 void __init
mpc85xx_cpm2_pic_init(void)
69 struct device_node
*np
;
73 np
= of_find_compatible_node(NULL
, NULL
, "fsl,cpm2-pic");
75 printk(KERN_ERR
"PIC init: can not find fsl,cpm2-pic node\n");
78 irq
= irq_of_parse_and_map(np
, 0);
81 printk(KERN_ERR
"PIC init: got no IRQ for cpm cascade\n");
87 irq_set_chained_handler(irq
, cpm2_cascade
);
91 #ifdef CONFIG_QUICC_ENGINE
92 void __init
mpc85xx_qe_init(void)
94 struct device_node
*np
;
96 np
= of_find_compatible_node(NULL
, NULL
, "fsl,qe");
98 np
= of_find_node_by_name(NULL
, "qe");
100 pr_err("%s: Could not find Quicc Engine node\n",
106 if (!of_device_is_available(np
)) {
115 void __init
mpc85xx_qe_par_io_init(void)
117 struct device_node
*np
;
119 np
= of_find_node_by_name(NULL
, "par_io");
121 struct device_node
*ucc
;
126 for_each_node_by_name(ucc
, "ucc")
127 par_io_of_config(ucc
);