2 * Wind River SBC8548 setup and early boot code.
4 * Copyright 2007 Wind River Systems Inc.
6 * By Paul Gortmaker (see MAINTAINERS for contact information)
8 * Based largely on the MPC8548CDS support - Copyright 2005 Freescale Inc.
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
17 #include <linux/stddef.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/errno.h>
21 #include <linux/reboot.h>
22 #include <linux/pci.h>
23 #include <linux/kdev_t.h>
24 #include <linux/major.h>
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/seq_file.h>
28 #include <linux/initrd.h>
29 #include <linux/interrupt.h>
30 #include <linux/fsl_devices.h>
31 #include <linux/of_platform.h>
33 #include <asm/pgtable.h>
35 #include <linux/atomic.h>
38 #include <asm/machdep.h>
40 #include <asm/pci-bridge.h>
42 #include <mm/mmu_decl.h>
47 #include <sysdev/fsl_soc.h>
48 #include <sysdev/fsl_pci.h>
54 static void __init
sbc8548_pic_init(void)
56 struct mpic
*mpic
= mpic_alloc(NULL
, 0, MPIC_BIG_ENDIAN
,
62 /* Extract the HW Rev from the EPLD on the board */
63 static int __init
sbc8548_hw_rev(void)
65 struct device_node
*np
;
70 np
= of_find_compatible_node(NULL
, NULL
, "hw-rev");
72 printk("No HW-REV found in DTB.\n");
76 of_address_to_resource(np
, 0, &res
);
79 rev
= ioremap(res
.start
,sizeof(unsigned int));
80 board_rev
= (*rev
) >> 28;
87 * Setup the architecture
89 static void __init
sbc8548_setup_arch(void)
92 ppc_md
.progress("sbc8548_setup_arch()", 0);
94 fsl_pci_assign_primary();
96 sbc_rev
= sbc8548_hw_rev();
99 static void sbc8548_show_cpuinfo(struct seq_file
*m
)
101 uint pvid
, svid
, phid1
;
103 pvid
= mfspr(SPRN_PVR
);
104 svid
= mfspr(SPRN_SVR
);
106 seq_printf(m
, "Vendor\t\t: Wind River\n");
107 seq_printf(m
, "Machine\t\t: SBC8548 v%d\n", sbc_rev
);
108 seq_printf(m
, "PVR\t\t: 0x%x\n", pvid
);
109 seq_printf(m
, "SVR\t\t: 0x%x\n", svid
);
111 /* Display cpu Pll setting */
112 phid1
= mfspr(SPRN_HID1
);
113 seq_printf(m
, "PLL setting\t: 0x%x\n", ((phid1
>> 24) & 0x3f));
116 machine_arch_initcall(sbc8548
, mpc85xx_common_publish_devices
);
119 * Called very early, device-tree isn't unflattened
121 static int __init
sbc8548_probe(void)
123 return of_machine_is_compatible("SBC8548");
126 define_machine(sbc8548
) {
128 .probe
= sbc8548_probe
,
129 .setup_arch
= sbc8548_setup_arch
,
130 .init_IRQ
= sbc8548_pic_init
,
131 .show_cpuinfo
= sbc8548_show_cpuinfo
,
132 .get_irq
= mpic_get_irq
,
134 .pcibios_fixup_bus
= fsl_pcibios_fixup_bus
,
135 .pcibios_fixup_phb
= fsl_pcibios_fixup_phb
,
137 .calibrate_decr
= generic_calibrate_decr
,
138 .progress
= udbg_progress
,