powerpc/powernv: Report size of OPAL memcons log
[linux/fpc-iii.git] / include / dt-bindings / mfd / stm32f4-rcc.h
blobe98942dc0d44e22aa30c68b0001c14e727b688f4
1 /*
2 * This header provides constants for the STM32F4 RCC IP
3 */
5 #ifndef _DT_BINDINGS_MFD_STM32F4_RCC_H
6 #define _DT_BINDINGS_MFD_STM32F4_RCC_H
8 /* AHB1 */
9 #define STM32F4_RCC_AHB1_GPIOA 0
10 #define STM32F4_RCC_AHB1_GPIOB 1
11 #define STM32F4_RCC_AHB1_GPIOC 2
12 #define STM32F4_RCC_AHB1_GPIOD 3
13 #define STM32F4_RCC_AHB1_GPIOE 4
14 #define STM32F4_RCC_AHB1_GPIOF 5
15 #define STM32F4_RCC_AHB1_GPIOG 6
16 #define STM32F4_RCC_AHB1_GPIOH 7
17 #define STM32F4_RCC_AHB1_GPIOI 8
18 #define STM32F4_RCC_AHB1_GPIOJ 9
19 #define STM32F4_RCC_AHB1_GPIOK 10
20 #define STM32F4_RCC_AHB1_CRC 12
21 #define STM32F4_RCC_AHB1_DMA1 21
22 #define STM32F4_RCC_AHB1_DMA2 22
23 #define STM32F4_RCC_AHB1_DMA2D 23
24 #define STM32F4_RCC_AHB1_ETHMAC 25
25 #define STM32F4_RCC_AHB1_OTGHS 29
27 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
28 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit + (0x30 * 8))
31 /* AHB2 */
32 #define STM32F4_RCC_AHB2_DCMI 0
33 #define STM32F4_RCC_AHB2_CRYP 4
34 #define STM32F4_RCC_AHB2_HASH 5
35 #define STM32F4_RCC_AHB2_RNG 6
36 #define STM32F4_RCC_AHB2_OTGFS 7
38 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8))
39 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + (0x34 * 8))
41 /* AHB3 */
42 #define STM32F4_RCC_AHB3_FMC 0
44 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8))
45 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + (0x38 * 8))
47 /* APB1 */
48 #define STM32F4_RCC_APB1_TIM2 0
49 #define STM32F4_RCC_APB1_TIM3 1
50 #define STM32F4_RCC_APB1_TIM4 2
51 #define STM32F4_RCC_APB1_TIM5 3
52 #define STM32F4_RCC_APB1_TIM6 4
53 #define STM32F4_RCC_APB1_TIM7 5
54 #define STM32F4_RCC_APB1_TIM12 6
55 #define STM32F4_RCC_APB1_TIM13 7
56 #define STM32F4_RCC_APB1_TIM14 8
57 #define STM32F4_RCC_APB1_WWDG 11
58 #define STM32F4_RCC_APB1_SPI2 14
59 #define STM32F4_RCC_APB1_SPI3 15
60 #define STM32F4_RCC_APB1_UART2 17
61 #define STM32F4_RCC_APB1_UART3 18
62 #define STM32F4_RCC_APB1_UART4 19
63 #define STM32F4_RCC_APB1_UART5 20
64 #define STM32F4_RCC_APB1_I2C1 21
65 #define STM32F4_RCC_APB1_I2C2 22
66 #define STM32F4_RCC_APB1_I2C3 23
67 #define STM32F4_RCC_APB1_CAN1 25
68 #define STM32F4_RCC_APB1_CAN2 26
69 #define STM32F4_RCC_APB1_PWR 28
70 #define STM32F4_RCC_APB1_DAC 29
71 #define STM32F4_RCC_APB1_UART7 30
72 #define STM32F4_RCC_APB1_UART8 31
74 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8))
75 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + (0x40 * 8))
77 /* APB2 */
78 #define STM32F4_RCC_APB2_TIM1 0
79 #define STM32F4_RCC_APB2_TIM8 1
80 #define STM32F4_RCC_APB2_USART1 4
81 #define STM32F4_RCC_APB2_USART6 5
82 #define STM32F4_RCC_APB2_ADC 8
83 #define STM32F4_RCC_APB2_SDIO 11
84 #define STM32F4_RCC_APB2_SPI1 12
85 #define STM32F4_RCC_APB2_SPI4 13
86 #define STM32F4_RCC_APB2_SYSCFG 14
87 #define STM32F4_RCC_APB2_TIM9 16
88 #define STM32F4_RCC_APB2_TIM10 17
89 #define STM32F4_RCC_APB2_TIM11 18
90 #define STM32F4_RCC_APB2_SPI5 20
91 #define STM32F4_RCC_APB2_SPI6 21
92 #define STM32F4_RCC_APB2_SAI1 22
93 #define STM32F4_RCC_APB2_LTDC 26
95 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8))
96 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + (0x44 * 8))
98 #endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */