?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
r8152: fix tx packets accounting
[linux/fpc-iii.git] / drivers / gpio / gpio-mcp23s08.c
blob99d37b56c258a24b67505022431ceb1e92403d68
1 /*
2 * MCP23S08 SPI/I2C GPIO gpio expander driver
3 *
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
5 * supported.
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
10 * support that yet.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/device.h>
15 #include <linux/mutex.h>
16 #include <linux/module.h>
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/mcp23s08.h>
21 #include <linux/slab.h>
22 #include <asm/byteorder.h>
23 #include <linux/interrupt.h>
24 #include <linux/of_irq.h>
25 #include <linux/of_device.h>
26
27 /**
28 * MCP types supported by driver
29 */
30 #define MCP_TYPE_S08 0
31 #define MCP_TYPE_S17 1
32 #define MCP_TYPE_008 2
33 #define MCP_TYPE_017 3
34 #define MCP_TYPE_S18 4
35
36 /* Registers are all 8 bits wide.
37 *
38 * The mcp23s17 has twice as many bits, and can be configured to work
39 * with either 16 bit registers or with two adjacent 8 bit banks.
40 */
41 #define MCP_IODIR 0x00 /* init/reset: all ones */
42 #define MCP_IPOL 0x01
43 #define MCP_GPINTEN 0x02
44 #define MCP_DEFVAL 0x03
45 #define MCP_INTCON 0x04
46 #define MCP_IOCON 0x05
47 # define IOCON_MIRROR (1 << 6)
48 # define IOCON_SEQOP (1 << 5)
49 # define IOCON_HAEN (1 << 3)
50 # define IOCON_ODR (1 << 2)
51 # define IOCON_INTPOL (1 << 1)
52 # define IOCON_INTCC (1)
53 #define MCP_GPPU 0x06
54 #define MCP_INTF 0x07
55 #define MCP_INTCAP 0x08
56 #define MCP_GPIO 0x09
57 #define MCP_OLAT 0x0a
58
59 struct mcp23s08;
60
61 struct mcp23s08_ops {
62 int (*read)(struct mcp23s08 *mcp, unsigned reg);
63 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
64 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
65 u16 *vals, unsigned n);
66 };
67
68 struct mcp23s08 {
69 u8 addr;
70 bool irq_active_high;
71
72 u16 cache[11];
73 u16 irq_rise;
74 u16 irq_fall;
75 int irq;
76 bool irq_controller;
77 /* lock protects the cached values */
78 struct mutex lock;
79 struct mutex irq_lock;
80
81 struct gpio_chip chip;
82
83 const struct mcp23s08_ops *ops;
84 void *data; /* ops specific data */
85 };
86
87 /* A given spi_device can represent up to eight mcp23sxx chips
88 * sharing the same chipselect but using different addresses
89 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
90 * Driver data holds all the per-chip data.
91 */
92 struct mcp23s08_driver_data {
93 unsigned ngpio;
94 struct mcp23s08 *mcp[8];
95 struct mcp23s08 chip[];
96 };
97
98 /*----------------------------------------------------------------------*/
99
100 #if IS_ENABLED(CONFIG_I2C)
101
102 static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
103 {
104 return i2c_smbus_read_byte_data(mcp->data, reg);
105 }
106
107 static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
108 {
109 return i2c_smbus_write_byte_data(mcp->data, reg, val);
110 }
111
112 static int
113 mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
114 {
115 while (n--) {
116 int ret = mcp23008_read(mcp, reg++);
117 if (ret < 0)
118 return ret;
119 *vals++ = ret;
120 }
121
122 return 0;
123 }
124
125 static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
126 {
127 return i2c_smbus_read_word_data(mcp->data, reg << 1);
128 }
129
130 static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
131 {
132 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
133 }
134
135 static int
136 mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
137 {
138 while (n--) {
139 int ret = mcp23017_read(mcp, reg++);
140 if (ret < 0)
141 return ret;
142 *vals++ = ret;
143 }
144
145 return 0;
146 }
147
148 static const struct mcp23s08_ops mcp23008_ops = {
149 .read = mcp23008_read,
150 .write = mcp23008_write,
151 .read_regs = mcp23008_read_regs,
152 };
153
154 static const struct mcp23s08_ops mcp23017_ops = {
155 .read = mcp23017_read,
156 .write = mcp23017_write,
157 .read_regs = mcp23017_read_regs,
158 };
159
160 #endif /* CONFIG_I2C */
161
162 /*----------------------------------------------------------------------*/
163
164 #ifdef CONFIG_SPI_MASTER
165
166 static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
167 {
168 u8 tx[2], rx[1];
169 int status;
170
171 tx[0] = mcp->addr | 0x01;
172 tx[1] = reg;
173 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
174 return (status < 0) ? status : rx[0];
175 }
176
177 static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
178 {
179 u8 tx[3];
180
181 tx[0] = mcp->addr;
182 tx[1] = reg;
183 tx[2] = val;
184 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
185 }
186
187 static int
188 mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
189 {
190 u8 tx[2], *tmp;
191 int status;
192
193 if ((n + reg) > sizeof(mcp->cache))
194 return -EINVAL;
195 tx[0] = mcp->addr | 0x01;
196 tx[1] = reg;
197
198 tmp = (u8 *)vals;
199 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
200 if (status >= 0) {
201 while (n--)
202 vals[n] = tmp[n]; /* expand to 16bit */
203 }
204 return status;
205 }
206
207 static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
208 {
209 u8 tx[2], rx[2];
210 int status;
211
212 tx[0] = mcp->addr | 0x01;
213 tx[1] = reg << 1;
214 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
215 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
216 }
217
218 static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
219 {
220 u8 tx[4];
221
222 tx[0] = mcp->addr;
223 tx[1] = reg << 1;
224 tx[2] = val;
225 tx[3] = val >> 8;
226 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
227 }
228
229 static int
230 mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
231 {
232 u8 tx[2];
233 int status;
234
235 if ((n + reg) > sizeof(mcp->cache))
236 return -EINVAL;
237 tx[0] = mcp->addr | 0x01;
238 tx[1] = reg << 1;
239
240 status = spi_write_then_read(mcp->data, tx, sizeof(tx),
241 (u8 *)vals, n * 2);
242 if (status >= 0) {
243 while (n--)
244 vals[n] = __le16_to_cpu((__le16)vals[n]);
245 }
246
247 return status;
248 }
249
250 static const struct mcp23s08_ops mcp23s08_ops = {
251 .read = mcp23s08_read,
252 .write = mcp23s08_write,
253 .read_regs = mcp23s08_read_regs,
254 };
255
256 static const struct mcp23s08_ops mcp23s17_ops = {
257 .read = mcp23s17_read,
258 .write = mcp23s17_write,
259 .read_regs = mcp23s17_read_regs,
260 };
261
262 #endif /* CONFIG_SPI_MASTER */
263
264 /*----------------------------------------------------------------------*/
265
266 static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
267 {
268 struct mcp23s08 *mcp = gpiochip_get_data(chip);
269 int status;
270
271 mutex_lock(&mcp->lock);
272 mcp->cache[MCP_IODIR] |= (1 << offset);
273 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
274 mutex_unlock(&mcp->lock);
275 return status;
276 }
277
278 static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
279 {
280 struct mcp23s08 *mcp = gpiochip_get_data(chip);
281 int status;
282
283 mutex_lock(&mcp->lock);
284
285 /* REVISIT reading this clears any IRQ ... */
286 status = mcp->ops->read(mcp, MCP_GPIO);
287 if (status < 0)
288 status = 0;
289 else {
290 mcp->cache[MCP_GPIO] = status;
291 status = !!(status & (1 << offset));
292 }
293 mutex_unlock(&mcp->lock);
294 return status;
295 }
296
297 static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
298 {
299 unsigned olat = mcp->cache[MCP_OLAT];
300
301 if (value)
302 olat |= mask;
303 else
304 olat &= ~mask;
305 mcp->cache[MCP_OLAT] = olat;
306 return mcp->ops->write(mcp, MCP_OLAT, olat);
307 }
308
309 static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
310 {
311 struct mcp23s08 *mcp = gpiochip_get_data(chip);
312 unsigned mask = 1 << offset;
313
314 mutex_lock(&mcp->lock);
315 __mcp23s08_set(mcp, mask, value);
316 mutex_unlock(&mcp->lock);
317 }
318
319 static int
320 mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
321 {
322 struct mcp23s08 *mcp = gpiochip_get_data(chip);
323 unsigned mask = 1 << offset;
324 int status;
325
326 mutex_lock(&mcp->lock);
327 status = __mcp23s08_set(mcp, mask, value);
328 if (status == 0) {
329 mcp->cache[MCP_IODIR] &= ~mask;
330 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
331 }
332 mutex_unlock(&mcp->lock);
333 return status;
334 }
335
336 /*----------------------------------------------------------------------*/
337 static irqreturn_t mcp23s08_irq(int irq, void *data)
338 {
339 struct mcp23s08 *mcp = data;
340 int intcap, intf, i;
341 unsigned int child_irq;
342
343 mutex_lock(&mcp->lock);
344 intf = mcp->ops->read(mcp, MCP_INTF);
345 if (intf < 0) {
346 mutex_unlock(&mcp->lock);
347 return IRQ_HANDLED;
348 }
349
350 mcp->cache[MCP_INTF] = intf;
351
352 intcap = mcp->ops->read(mcp, MCP_INTCAP);
353 if (intcap < 0) {
354 mutex_unlock(&mcp->lock);
355 return IRQ_HANDLED;
356 }
357
358 mcp->cache[MCP_INTCAP] = intcap;
359 mutex_unlock(&mcp->lock);
360
361
362 for (i = 0; i < mcp->chip.ngpio; i++) {
363 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
364 ((BIT(i) & intcap & mcp->irq_rise) ||
365 (mcp->irq_fall & ~intcap & BIT(i)) ||
366 (BIT(i) & mcp->cache[MCP_INTCON]))) {
367 child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
368 handle_nested_irq(child_irq);
369 }
370 }
371
372 return IRQ_HANDLED;
373 }
374
375 static void mcp23s08_irq_mask(struct irq_data *data)
376 {
377 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
378 struct mcp23s08 *mcp = gpiochip_get_data(gc);
379 unsigned int pos = data->hwirq;
380
381 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
382 }
383
384 static void mcp23s08_irq_unmask(struct irq_data *data)
385 {
386 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
387 struct mcp23s08 *mcp = gpiochip_get_data(gc);
388 unsigned int pos = data->hwirq;
389
390 mcp->cache[MCP_GPINTEN] |= BIT(pos);
391 }
392
393 static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
394 {
395 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
396 struct mcp23s08 *mcp = gpiochip_get_data(gc);
397 unsigned int pos = data->hwirq;
398 int status = 0;
399
400 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
401 mcp->cache[MCP_INTCON] &= ~BIT(pos);
402 mcp->irq_rise |= BIT(pos);
403 mcp->irq_fall |= BIT(pos);
404 } else if (type & IRQ_TYPE_EDGE_RISING) {
405 mcp->cache[MCP_INTCON] &= ~BIT(pos);
406 mcp->irq_rise |= BIT(pos);
407 mcp->irq_fall &= ~BIT(pos);
408 } else if (type & IRQ_TYPE_EDGE_FALLING) {
409 mcp->cache[MCP_INTCON] &= ~BIT(pos);
410 mcp->irq_rise &= ~BIT(pos);
411 mcp->irq_fall |= BIT(pos);
412 } else if (type & IRQ_TYPE_LEVEL_HIGH) {
413 mcp->cache[MCP_INTCON] |= BIT(pos);
414 mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
415 } else if (type & IRQ_TYPE_LEVEL_LOW) {
416 mcp->cache[MCP_INTCON] |= BIT(pos);
417 mcp->cache[MCP_DEFVAL] |= BIT(pos);
418 } else
419 return -EINVAL;
420
421 return status;
422 }
423
424 static void mcp23s08_irq_bus_lock(struct irq_data *data)
425 {
426 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
427 struct mcp23s08 *mcp = gpiochip_get_data(gc);
428
429 mutex_lock(&mcp->irq_lock);
430 }
431
432 static void mcp23s08_irq_bus_unlock(struct irq_data *data)
433 {
434 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
435 struct mcp23s08 *mcp = gpiochip_get_data(gc);
436
437 mutex_lock(&mcp->lock);
438 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
439 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
440 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
441 mutex_unlock(&mcp->lock);
442 mutex_unlock(&mcp->irq_lock);
443 }
444
445 static struct irq_chip mcp23s08_irq_chip = {
446 .name = "gpio-mcp23xxx",
447 .irq_mask = mcp23s08_irq_mask,
448 .irq_unmask = mcp23s08_irq_unmask,
449 .irq_set_type = mcp23s08_irq_set_type,
450 .irq_bus_lock = mcp23s08_irq_bus_lock,
451 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
452 };
453
454 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
455 {
456 struct gpio_chip *chip = &mcp->chip;
457 int err;
458 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
459
460 mutex_init(&mcp->irq_lock);
461
462 if (mcp->irq_active_high)
463 irqflags |= IRQF_TRIGGER_HIGH;
464 else
465 irqflags |= IRQF_TRIGGER_LOW;
466
467 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
468 mcp23s08_irq,
469 irqflags, dev_name(chip->parent), mcp);
470 if (err != 0) {
471 dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
472 mcp->irq, err);
473 return err;
474 }
475
476 err = gpiochip_irqchip_add(chip,
477 &mcp23s08_irq_chip,
478 0,
479 handle_simple_irq,
480 IRQ_TYPE_NONE);
481 if (err) {
482 dev_err(chip->parent,
483 "could not connect irqchip to gpiochip: %d\n", err);
484 return err;
485 }
486
487 gpiochip_set_chained_irqchip(chip,
488 &mcp23s08_irq_chip,
489 mcp->irq,
490 NULL);
491
492 return 0;
493 }
494
495 /*----------------------------------------------------------------------*/
496
497 #ifdef CONFIG_DEBUG_FS
498
499 #include <linux/seq_file.h>
500
501 /*
502 * This shows more info than the generic gpio dump code:
503 * pullups, deglitching, open drain drive.
504 */
505 static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
506 {
507 struct mcp23s08 *mcp;
508 char bank;
509 int t;
510 unsigned mask;
511
512 mcp = gpiochip_get_data(chip);
513
514 /* NOTE: we only handle one bank for now ... */
515 bank = '0' + ((mcp->addr >> 1) & 0x7);
516
517 mutex_lock(&mcp->lock);
518 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
519 if (t < 0) {
520 seq_printf(s, " I/O ERROR %d\n", t);
521 goto done;
522 }
523
524 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
525 const char *label;
526
527 label = gpiochip_is_requested(chip, t);
528 if (!label)
529 continue;
530
531 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
532 chip->base + t, bank, t, label,
533 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
534 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
535 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
536 /* NOTE: ignoring the irq-related registers */
537 seq_puts(s, "\n");
538 }
539 done:
540 mutex_unlock(&mcp->lock);
541 }
542
543 #else
544 #define mcp23s08_dbg_show NULL
545 #endif
546
547 /*----------------------------------------------------------------------*/
548
549 static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
550 void *data, unsigned addr, unsigned type,
551 struct mcp23s08_platform_data *pdata, int cs)
552 {
553 int status;
554 bool mirror = false;
555
556 mutex_init(&mcp->lock);
557
558 mcp->data = data;
559 mcp->addr = addr;
560 mcp->irq_active_high = false;
561
562 mcp->chip.direction_input = mcp23s08_direction_input;
563 mcp->chip.get = mcp23s08_get;
564 mcp->chip.direction_output = mcp23s08_direction_output;
565 mcp->chip.set = mcp23s08_set;
566 mcp->chip.dbg_show = mcp23s08_dbg_show;
567 #ifdef CONFIG_OF_GPIO
568 mcp->chip.of_gpio_n_cells = 2;
569 mcp->chip.of_node = dev->of_node;
570 #endif
571
572 switch (type) {
573 #ifdef CONFIG_SPI_MASTER
574 case MCP_TYPE_S08:
575 mcp->ops = &mcp23s08_ops;
576 mcp->chip.ngpio = 8;
577 mcp->chip.label = "mcp23s08";
578 break;
579
580 case MCP_TYPE_S17:
581 mcp->ops = &mcp23s17_ops;
582 mcp->chip.ngpio = 16;
583 mcp->chip.label = "mcp23s17";
584 break;
585
586 case MCP_TYPE_S18:
587 mcp->ops = &mcp23s17_ops;
588 mcp->chip.ngpio = 16;
589 mcp->chip.label = "mcp23s18";
590 break;
591 #endif /* CONFIG_SPI_MASTER */
592
593 #if IS_ENABLED(CONFIG_I2C)
594 case MCP_TYPE_008:
595 mcp->ops = &mcp23008_ops;
596 mcp->chip.ngpio = 8;
597 mcp->chip.label = "mcp23008";
598 break;
599
600 case MCP_TYPE_017:
601 mcp->ops = &mcp23017_ops;
602 mcp->chip.ngpio = 16;
603 mcp->chip.label = "mcp23017";
604 break;
605 #endif /* CONFIG_I2C */
606
607 default:
608 dev_err(dev, "invalid device type (%d)\n", type);
609 return -EINVAL;
610 }
611
612 mcp->chip.base = pdata->base;
613 mcp->chip.can_sleep = true;
614 mcp->chip.parent = dev;
615 mcp->chip.owner = THIS_MODULE;
616
617 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
618 * and MCP_IOCON.HAEN = 1, so we work with all chips.
619 */
620
621 status = mcp->ops->read(mcp, MCP_IOCON);
622 if (status < 0)
623 goto fail;
624
625 mcp->irq_controller = pdata->irq_controller;
626 if (mcp->irq && mcp->irq_controller) {
627 mcp->irq_active_high =
628 of_property_read_bool(mcp->chip.parent->of_node,
629 "microchip,irq-active-high");
630
631 mirror = pdata->mirror;
632 }
633
634 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
635 mcp->irq_active_high) {
636 /* mcp23s17 has IOCON twice, make sure they are in sync */
637 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
638 status |= IOCON_HAEN | (IOCON_HAEN << 8);
639 if (mcp->irq_active_high)
640 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
641 else
642 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
643
644 if (mirror)
645 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
646
647 if (type == MCP_TYPE_S18)
648 status |= IOCON_INTCC | (IOCON_INTCC << 8);
649
650 status = mcp->ops->write(mcp, MCP_IOCON, status);
651 if (status < 0)
652 goto fail;
653 }
654
655 /* configure ~100K pullups */
656 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
657 if (status < 0)
658 goto fail;
659
660 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
661 if (status < 0)
662 goto fail;
663
664 /* disable inverter on input */
665 if (mcp->cache[MCP_IPOL] != 0) {
666 mcp->cache[MCP_IPOL] = 0;
667 status = mcp->ops->write(mcp, MCP_IPOL, 0);
668 if (status < 0)
669 goto fail;
670 }
671
672 /* disable irqs */
673 if (mcp->cache[MCP_GPINTEN] != 0) {
674 mcp->cache[MCP_GPINTEN] = 0;
675 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
676 if (status < 0)
677 goto fail;
678 }
679
680 status = gpiochip_add_data(&mcp->chip, mcp);
681 if (status < 0)
682 goto fail;
683
684 if (mcp->irq && mcp->irq_controller) {
685 status = mcp23s08_irq_setup(mcp);
686 if (status) {
687 goto fail;
688 }
689 }
690 fail:
691 if (status < 0)
692 dev_dbg(dev, "can't setup chip %d, --> %d\n",
693 addr, status);
694 return status;
695 }
696
697 /*----------------------------------------------------------------------*/
698
699 #ifdef CONFIG_OF
700 #ifdef CONFIG_SPI_MASTER
701 static const struct of_device_id mcp23s08_spi_of_match[] = {
702 {
703 .compatible = "microchip,mcp23s08",
704 .data = (void *) MCP_TYPE_S08,
705 },
706 {
707 .compatible = "microchip,mcp23s17",
708 .data = (void *) MCP_TYPE_S17,
709 },
710 {
711 .compatible = "microchip,mcp23s18",
712 .data = (void *) MCP_TYPE_S18,
713 },
714 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
715 {
716 .compatible = "mcp,mcp23s08",
717 .data = (void *) MCP_TYPE_S08,
718 },
719 {
720 .compatible = "mcp,mcp23s17",
721 .data = (void *) MCP_TYPE_S17,
722 },
723 { },
724 };
725 MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
726 #endif
727
728 #if IS_ENABLED(CONFIG_I2C)
729 static const struct of_device_id mcp23s08_i2c_of_match[] = {
730 {
731 .compatible = "microchip,mcp23008",
732 .data = (void *) MCP_TYPE_008,
733 },
734 {
735 .compatible = "microchip,mcp23017",
736 .data = (void *) MCP_TYPE_017,
737 },
738 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
739 {
740 .compatible = "mcp,mcp23008",
741 .data = (void *) MCP_TYPE_008,
742 },
743 {
744 .compatible = "mcp,mcp23017",
745 .data = (void *) MCP_TYPE_017,
746 },
747 { },
748 };
749 MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
750 #endif
751 #endif /* CONFIG_OF */
752
753
754 #if IS_ENABLED(CONFIG_I2C)
755
756 static int mcp230xx_probe(struct i2c_client *client,
757 const struct i2c_device_id *id)
758 {
759 struct mcp23s08_platform_data *pdata, local_pdata;
760 struct mcp23s08 *mcp;
761 int status;
762 const struct of_device_id *match;
763
764 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
765 &client->dev);
766 if (match) {
767 pdata = &local_pdata;
768 pdata->base = -1;
769 pdata->chip[0].pullups = 0;
770 pdata->irq_controller = of_property_read_bool(
771 client->dev.of_node,
772 "interrupt-controller");
773 pdata->mirror = of_property_read_bool(client->dev.of_node,
774 "microchip,irq-mirror");
775 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
776 } else {
777 pdata = dev_get_platdata(&client->dev);
778 if (!pdata) {
779 pdata = devm_kzalloc(&client->dev,
780 sizeof(struct mcp23s08_platform_data),
781 GFP_KERNEL);
782 if (!pdata)
783 return -ENOMEM;
784 pdata->base = -1;
785 }
786 }
787
788 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
789 if (!mcp)
790 return -ENOMEM;
791
792 mcp->irq = client->irq;
793 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
794 id->driver_data, pdata, 0);
795 if (status)
796 goto fail;
797
798 i2c_set_clientdata(client, mcp);
799
800 return 0;
801
802 fail:
803 kfree(mcp);
804
805 return status;
806 }
807
808 static int mcp230xx_remove(struct i2c_client *client)
809 {
810 struct mcp23s08 *mcp = i2c_get_clientdata(client);
811
812 gpiochip_remove(&mcp->chip);
813 kfree(mcp);
814
815 return 0;
816 }
817
818 static const struct i2c_device_id mcp230xx_id[] = {
819 { "mcp23008", MCP_TYPE_008 },
820 { "mcp23017", MCP_TYPE_017 },
821 { },
822 };
823 MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
824
825 static struct i2c_driver mcp230xx_driver = {
826 .driver = {
827 .name = "mcp230xx",
828 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
829 },
830 .probe = mcp230xx_probe,
831 .remove = mcp230xx_remove,
832 .id_table = mcp230xx_id,
833 };
834
835 static int __init mcp23s08_i2c_init(void)
836 {
837 return i2c_add_driver(&mcp230xx_driver);
838 }
839
840 static void mcp23s08_i2c_exit(void)
841 {
842 i2c_del_driver(&mcp230xx_driver);
843 }
844
845 #else
846
847 static int __init mcp23s08_i2c_init(void) { return 0; }
848 static void mcp23s08_i2c_exit(void) { }
849
850 #endif /* CONFIG_I2C */
851
852 /*----------------------------------------------------------------------*/
853
854 #ifdef CONFIG_SPI_MASTER
855
856 static int mcp23s08_probe(struct spi_device *spi)
857 {
858 struct mcp23s08_platform_data *pdata, local_pdata;
859 unsigned addr;
860 int chips = 0;
861 struct mcp23s08_driver_data *data;
862 int status, type;
863 unsigned ngpio = 0;
864 const struct of_device_id *match;
865 u32 spi_present_mask = 0;
866
867 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
868 if (match) {
869 type = (int)(uintptr_t)match->data;
870 status = of_property_read_u32(spi->dev.of_node,
871 "microchip,spi-present-mask", &spi_present_mask);
872 if (status) {
873 status = of_property_read_u32(spi->dev.of_node,
874 "mcp,spi-present-mask", &spi_present_mask);
875 if (status) {
876 dev_err(&spi->dev,
877 "DT has no spi-present-mask\n");
878 return -ENODEV;
879 }
880 }
881 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
882 dev_err(&spi->dev, "invalid spi-present-mask\n");
883 return -ENODEV;
884 }
885
886 pdata = &local_pdata;
887 pdata->base = -1;
888 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
889 pdata->chip[addr].pullups = 0;
890 if (spi_present_mask & (1 << addr))
891 chips++;
892 }
893 pdata->irq_controller = of_property_read_bool(
894 spi->dev.of_node,
895 "interrupt-controller");
896 pdata->mirror = of_property_read_bool(spi->dev.of_node,
897 "microchip,irq-mirror");
898 } else {
899 type = spi_get_device_id(spi)->driver_data;
900 pdata = dev_get_platdata(&spi->dev);
901 if (!pdata) {
902 pdata = devm_kzalloc(&spi->dev,
903 sizeof(struct mcp23s08_platform_data),
904 GFP_KERNEL);
905 pdata->base = -1;
906 }
907
908 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
909 if (!pdata->chip[addr].is_present)
910 continue;
911 chips++;
912 if ((type == MCP_TYPE_S08) && (addr > 3)) {
913 dev_err(&spi->dev,
914 "mcp23s08 only supports address 0..3\n");
915 return -EINVAL;
916 }
917 spi_present_mask |= 1 << addr;
918 }
919 }
920
921 if (!chips)
922 return -ENODEV;
923
924 data = devm_kzalloc(&spi->dev,
925 sizeof(*data) + chips * sizeof(struct mcp23s08),
926 GFP_KERNEL);
927 if (!data)
928 return -ENOMEM;
929
930 spi_set_drvdata(spi, data);
931
932 spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
933
934 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
935 if (!(spi_present_mask & (1 << addr)))
936 continue;
937 chips--;
938 data->mcp[addr] = &data->chip[chips];
939 data->mcp[addr]->irq = spi->irq;
940 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
941 0x40 | (addr << 1), type, pdata,
942 addr);
943 if (status < 0)
944 goto fail;
945
946 if (pdata->base != -1)
947 pdata->base += data->mcp[addr]->chip.ngpio;
948 ngpio += data->mcp[addr]->chip.ngpio;
949 }
950 data->ngpio = ngpio;
951
952 /* NOTE: these chips have a relatively sane IRQ framework, with
953 * per-signal masking and level/edge triggering. It's not yet
954 * handled here...
955 */
956
957 return 0;
958
959 fail:
960 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
961
962 if (!data->mcp[addr])
963 continue;
964 gpiochip_remove(&data->mcp[addr]->chip);
965 }
966 return status;
967 }
968
969 static int mcp23s08_remove(struct spi_device *spi)
970 {
971 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
972 unsigned addr;
973
974 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
975
976 if (!data->mcp[addr])
977 continue;
978
979 gpiochip_remove(&data->mcp[addr]->chip);
980 }
981
982 return 0;
983 }
984
985 static const struct spi_device_id mcp23s08_ids[] = {
986 { "mcp23s08", MCP_TYPE_S08 },
987 { "mcp23s17", MCP_TYPE_S17 },
988 { "mcp23s18", MCP_TYPE_S18 },
989 { },
990 };
991 MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
992
993 static struct spi_driver mcp23s08_driver = {
994 .probe = mcp23s08_probe,
995 .remove = mcp23s08_remove,
996 .id_table = mcp23s08_ids,
997 .driver = {
998 .name = "mcp23s08",
999 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1000 },
1001 };
1002
1003 static int __init mcp23s08_spi_init(void)
1004 {
1005 return spi_register_driver(&mcp23s08_driver);
1006 }
1007
1008 static void mcp23s08_spi_exit(void)
1009 {
1010 spi_unregister_driver(&mcp23s08_driver);
1011 }
1012
1013 #else
1014
1015 static int __init mcp23s08_spi_init(void) { return 0; }
1016 static void mcp23s08_spi_exit(void) { }
1017
1018 #endif /* CONFIG_SPI_MASTER */
1019
1020 /*----------------------------------------------------------------------*/
1021
1022 static int __init mcp23s08_init(void)
1023 {
1024 int ret;
1025
1026 ret = mcp23s08_spi_init();
1027 if (ret)
1028 goto spi_fail;
1029
1030 ret = mcp23s08_i2c_init();
1031 if (ret)
1032 goto i2c_fail;
1033
1034 return 0;
1035
1036 i2c_fail:
1037 mcp23s08_spi_exit();
1038 spi_fail:
1039 return ret;
1040 }
1041 /* register after spi/i2c postcore initcall and before
1042 * subsys initcalls that may rely on these GPIOs
1043 */
1044 subsys_initcall(mcp23s08_init);
1045
1046 static void __exit mcp23s08_exit(void)
1047 {
1048 mcp23s08_spi_exit();
1049 mcp23s08_i2c_exit();
1050 }
1051 module_exit(mcp23s08_exit);
1052
1053 MODULE_LICENSE("GPL");
Linux with added FPC-III support