2 * Copyright 2012 Alexandre Pereira da Silva <aletes.xgr@gmail.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2.
10 #include <linux/clk.h>
11 #include <linux/err.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
16 #include <linux/of_address.h>
17 #include <linux/platform_device.h>
18 #include <linux/pwm.h>
19 #include <linux/slab.h>
21 struct lpc32xx_pwm_chip
{
27 #define PWM_ENABLE BIT(31)
29 #define to_lpc32xx_pwm_chip(_chip) \
30 container_of(_chip, struct lpc32xx_pwm_chip, chip)
32 static int lpc32xx_pwm_config(struct pwm_chip
*chip
, struct pwm_device
*pwm
,
33 int duty_ns
, int period_ns
)
35 struct lpc32xx_pwm_chip
*lpc32xx
= to_lpc32xx_pwm_chip(chip
);
37 int period_cycles
, duty_cycles
;
39 c
= clk_get_rate(lpc32xx
->clk
);
41 /* The highest acceptable divisor is 256, which is represented by 0 */
42 period_cycles
= div64_u64(c
* period_ns
,
43 (unsigned long long)NSEC_PER_SEC
* 256);
44 if (!period_cycles
|| period_cycles
> 256)
46 if (period_cycles
== 256)
49 /* Compute 256 x #duty/period value and care for corner cases */
50 duty_cycles
= div64_u64((unsigned long long)(period_ns
- duty_ns
) * 256,
54 if (duty_cycles
> 255)
57 val
= readl(lpc32xx
->base
+ (pwm
->hwpwm
<< 2));
59 val
|= (period_cycles
<< 8) | duty_cycles
;
60 writel(val
, lpc32xx
->base
+ (pwm
->hwpwm
<< 2));
65 static int lpc32xx_pwm_enable(struct pwm_chip
*chip
, struct pwm_device
*pwm
)
67 struct lpc32xx_pwm_chip
*lpc32xx
= to_lpc32xx_pwm_chip(chip
);
71 ret
= clk_prepare_enable(lpc32xx
->clk
);
75 val
= readl(lpc32xx
->base
+ (pwm
->hwpwm
<< 2));
77 writel(val
, lpc32xx
->base
+ (pwm
->hwpwm
<< 2));
82 static void lpc32xx_pwm_disable(struct pwm_chip
*chip
, struct pwm_device
*pwm
)
84 struct lpc32xx_pwm_chip
*lpc32xx
= to_lpc32xx_pwm_chip(chip
);
87 val
= readl(lpc32xx
->base
+ (pwm
->hwpwm
<< 2));
89 writel(val
, lpc32xx
->base
+ (pwm
->hwpwm
<< 2));
91 clk_disable_unprepare(lpc32xx
->clk
);
94 static const struct pwm_ops lpc32xx_pwm_ops
= {
95 .config
= lpc32xx_pwm_config
,
96 .enable
= lpc32xx_pwm_enable
,
97 .disable
= lpc32xx_pwm_disable
,
101 static int lpc32xx_pwm_probe(struct platform_device
*pdev
)
103 struct lpc32xx_pwm_chip
*lpc32xx
;
104 struct resource
*res
;
107 lpc32xx
= devm_kzalloc(&pdev
->dev
, sizeof(*lpc32xx
), GFP_KERNEL
);
111 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
112 lpc32xx
->base
= devm_ioremap_resource(&pdev
->dev
, res
);
113 if (IS_ERR(lpc32xx
->base
))
114 return PTR_ERR(lpc32xx
->base
);
116 lpc32xx
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
117 if (IS_ERR(lpc32xx
->clk
))
118 return PTR_ERR(lpc32xx
->clk
);
120 lpc32xx
->chip
.dev
= &pdev
->dev
;
121 lpc32xx
->chip
.ops
= &lpc32xx_pwm_ops
;
122 lpc32xx
->chip
.npwm
= 1;
123 lpc32xx
->chip
.base
= -1;
125 ret
= pwmchip_add(&lpc32xx
->chip
);
127 dev_err(&pdev
->dev
, "failed to add PWM chip, error %d\n", ret
);
131 platform_set_drvdata(pdev
, lpc32xx
);
136 static int lpc32xx_pwm_remove(struct platform_device
*pdev
)
138 struct lpc32xx_pwm_chip
*lpc32xx
= platform_get_drvdata(pdev
);
141 for (i
= 0; i
< lpc32xx
->chip
.npwm
; i
++)
142 pwm_disable(&lpc32xx
->chip
.pwms
[i
]);
144 return pwmchip_remove(&lpc32xx
->chip
);
147 static const struct of_device_id lpc32xx_pwm_dt_ids
[] = {
148 { .compatible
= "nxp,lpc3220-pwm", },
151 MODULE_DEVICE_TABLE(of
, lpc32xx_pwm_dt_ids
);
153 static struct platform_driver lpc32xx_pwm_driver
= {
155 .name
= "lpc32xx-pwm",
156 .of_match_table
= lpc32xx_pwm_dt_ids
,
158 .probe
= lpc32xx_pwm_probe
,
159 .remove
= lpc32xx_pwm_remove
,
161 module_platform_driver(lpc32xx_pwm_driver
);
163 MODULE_ALIAS("platform:lpc32xx-pwm");
164 MODULE_AUTHOR("Alexandre Pereira da Silva <aletes.xgr@gmail.com>");
165 MODULE_DESCRIPTION("LPC32XX PWM Driver");
166 MODULE_LICENSE("GPL v2");