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drm/omap: Fix error handling path in 'omap_dmm_probe()'
[linux/fpc-iii.git] / drivers / block / rsxx / core.c
blobd8b2488aaade109847a3b9156e1279b112907c14
1 /*
2 * Filename: core.c
3 *
4 *
5 * Authors: Joshua Morris <josh.h.morris@us.ibm.com>
6 * Philip Kelleher <pjk1939@linux.vnet.ibm.com>
7 *
8 * (C) Copyright 2013 IBM Corporation
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software Foundation,
22 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25 #include <linux/kernel.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/reboot.h>
31 #include <linux/slab.h>
32 #include <linux/bitops.h>
33 #include <linux/delay.h>
34 #include <linux/debugfs.h>
35 #include <linux/seq_file.h>
36
37 #include <linux/genhd.h>
38 #include <linux/idr.h>
39
40 #include "rsxx_priv.h"
41 #include "rsxx_cfg.h"
42
43 #define NO_LEGACY 0
44 #define SYNC_START_TIMEOUT (10 * 60) /* 10 minutes */
45
46 MODULE_DESCRIPTION("IBM Flash Adapter 900GB Full Height Device Driver");
47 MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRIVER_VERSION);
50
51 static unsigned int force_legacy = NO_LEGACY;
52 module_param(force_legacy, uint, 0444);
53 MODULE_PARM_DESC(force_legacy, "Force the use of legacy type PCI interrupts");
54
55 static unsigned int sync_start = 1;
56 module_param(sync_start, uint, 0444);
57 MODULE_PARM_DESC(sync_start, "On by Default: Driver load will not complete "
58 "until the card startup has completed.");
59
60 static DEFINE_IDA(rsxx_disk_ida);
61 static DEFINE_SPINLOCK(rsxx_ida_lock);
62
63 /* --------------------Debugfs Setup ------------------- */
64
65 static int rsxx_attr_pci_regs_show(struct seq_file *m, void *p)
66 {
67 struct rsxx_cardinfo *card = m->private;
68
69 seq_printf(m, "HWID 0x%08x\n",
70 ioread32(card->regmap + HWID));
71 seq_printf(m, "SCRATCH 0x%08x\n",
72 ioread32(card->regmap + SCRATCH));
73 seq_printf(m, "IER 0x%08x\n",
74 ioread32(card->regmap + IER));
75 seq_printf(m, "IPR 0x%08x\n",
76 ioread32(card->regmap + IPR));
77 seq_printf(m, "CREG_CMD 0x%08x\n",
78 ioread32(card->regmap + CREG_CMD));
79 seq_printf(m, "CREG_ADD 0x%08x\n",
80 ioread32(card->regmap + CREG_ADD));
81 seq_printf(m, "CREG_CNT 0x%08x\n",
82 ioread32(card->regmap + CREG_CNT));
83 seq_printf(m, "CREG_STAT 0x%08x\n",
84 ioread32(card->regmap + CREG_STAT));
85 seq_printf(m, "CREG_DATA0 0x%08x\n",
86 ioread32(card->regmap + CREG_DATA0));
87 seq_printf(m, "CREG_DATA1 0x%08x\n",
88 ioread32(card->regmap + CREG_DATA1));
89 seq_printf(m, "CREG_DATA2 0x%08x\n",
90 ioread32(card->regmap + CREG_DATA2));
91 seq_printf(m, "CREG_DATA3 0x%08x\n",
92 ioread32(card->regmap + CREG_DATA3));
93 seq_printf(m, "CREG_DATA4 0x%08x\n",
94 ioread32(card->regmap + CREG_DATA4));
95 seq_printf(m, "CREG_DATA5 0x%08x\n",
96 ioread32(card->regmap + CREG_DATA5));
97 seq_printf(m, "CREG_DATA6 0x%08x\n",
98 ioread32(card->regmap + CREG_DATA6));
99 seq_printf(m, "CREG_DATA7 0x%08x\n",
100 ioread32(card->regmap + CREG_DATA7));
101 seq_printf(m, "INTR_COAL 0x%08x\n",
102 ioread32(card->regmap + INTR_COAL));
103 seq_printf(m, "HW_ERROR 0x%08x\n",
104 ioread32(card->regmap + HW_ERROR));
105 seq_printf(m, "DEBUG0 0x%08x\n",
106 ioread32(card->regmap + PCI_DEBUG0));
107 seq_printf(m, "DEBUG1 0x%08x\n",
108 ioread32(card->regmap + PCI_DEBUG1));
109 seq_printf(m, "DEBUG2 0x%08x\n",
110 ioread32(card->regmap + PCI_DEBUG2));
111 seq_printf(m, "DEBUG3 0x%08x\n",
112 ioread32(card->regmap + PCI_DEBUG3));
113 seq_printf(m, "DEBUG4 0x%08x\n",
114 ioread32(card->regmap + PCI_DEBUG4));
115 seq_printf(m, "DEBUG5 0x%08x\n",
116 ioread32(card->regmap + PCI_DEBUG5));
117 seq_printf(m, "DEBUG6 0x%08x\n",
118 ioread32(card->regmap + PCI_DEBUG6));
119 seq_printf(m, "DEBUG7 0x%08x\n",
120 ioread32(card->regmap + PCI_DEBUG7));
121 seq_printf(m, "RECONFIG 0x%08x\n",
122 ioread32(card->regmap + PCI_RECONFIG));
123
124 return 0;
125 }
126
127 static int rsxx_attr_stats_show(struct seq_file *m, void *p)
128 {
129 struct rsxx_cardinfo *card = m->private;
130 int i;
131
132 for (i = 0; i < card->n_targets; i++) {
133 seq_printf(m, "Ctrl %d CRC Errors = %d\n",
134 i, card->ctrl[i].stats.crc_errors);
135 seq_printf(m, "Ctrl %d Hard Errors = %d\n",
136 i, card->ctrl[i].stats.hard_errors);
137 seq_printf(m, "Ctrl %d Soft Errors = %d\n",
138 i, card->ctrl[i].stats.soft_errors);
139 seq_printf(m, "Ctrl %d Writes Issued = %d\n",
140 i, card->ctrl[i].stats.writes_issued);
141 seq_printf(m, "Ctrl %d Writes Failed = %d\n",
142 i, card->ctrl[i].stats.writes_failed);
143 seq_printf(m, "Ctrl %d Reads Issued = %d\n",
144 i, card->ctrl[i].stats.reads_issued);
145 seq_printf(m, "Ctrl %d Reads Failed = %d\n",
146 i, card->ctrl[i].stats.reads_failed);
147 seq_printf(m, "Ctrl %d Reads Retried = %d\n",
148 i, card->ctrl[i].stats.reads_retried);
149 seq_printf(m, "Ctrl %d Discards Issued = %d\n",
150 i, card->ctrl[i].stats.discards_issued);
151 seq_printf(m, "Ctrl %d Discards Failed = %d\n",
152 i, card->ctrl[i].stats.discards_failed);
153 seq_printf(m, "Ctrl %d DMA SW Errors = %d\n",
154 i, card->ctrl[i].stats.dma_sw_err);
155 seq_printf(m, "Ctrl %d DMA HW Faults = %d\n",
156 i, card->ctrl[i].stats.dma_hw_fault);
157 seq_printf(m, "Ctrl %d DMAs Cancelled = %d\n",
158 i, card->ctrl[i].stats.dma_cancelled);
159 seq_printf(m, "Ctrl %d SW Queue Depth = %d\n",
160 i, card->ctrl[i].stats.sw_q_depth);
161 seq_printf(m, "Ctrl %d HW Queue Depth = %d\n",
162 i, atomic_read(&card->ctrl[i].stats.hw_q_depth));
163 }
164
165 return 0;
166 }
167
168 static int rsxx_attr_stats_open(struct inode *inode, struct file *file)
169 {
170 return single_open(file, rsxx_attr_stats_show, inode->i_private);
171 }
172
173 static int rsxx_attr_pci_regs_open(struct inode *inode, struct file *file)
174 {
175 return single_open(file, rsxx_attr_pci_regs_show, inode->i_private);
176 }
177
178 static ssize_t rsxx_cram_read(struct file *fp, char __user *ubuf,
179 size_t cnt, loff_t *ppos)
180 {
181 struct rsxx_cardinfo *card = file_inode(fp)->i_private;
182 char *buf;
183 ssize_t st;
184
185 buf = kzalloc(cnt, GFP_KERNEL);
186 if (!buf)
187 return -ENOMEM;
188
189 st = rsxx_creg_read(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1);
190 if (!st)
191 st = copy_to_user(ubuf, buf, cnt);
192 kfree(buf);
193 if (st)
194 return st;
195 *ppos += cnt;
196 return cnt;
197 }
198
199 static ssize_t rsxx_cram_write(struct file *fp, const char __user *ubuf,
200 size_t cnt, loff_t *ppos)
201 {
202 struct rsxx_cardinfo *card = file_inode(fp)->i_private;
203 char *buf;
204 ssize_t st;
205
206 buf = kzalloc(cnt, GFP_KERNEL);
207 if (!buf)
208 return -ENOMEM;
209
210 st = copy_from_user(buf, ubuf, cnt);
211 if (!st)
212 st = rsxx_creg_write(card, CREG_ADD_CRAM + (u32)*ppos, cnt,
213 buf, 1);
214 kfree(buf);
215 if (st)
216 return st;
217 *ppos += cnt;
218 return cnt;
219 }
220
221 static const struct file_operations debugfs_cram_fops = {
222 .owner = THIS_MODULE,
223 .read = rsxx_cram_read,
224 .write = rsxx_cram_write,
225 };
226
227 static const struct file_operations debugfs_stats_fops = {
228 .owner = THIS_MODULE,
229 .open = rsxx_attr_stats_open,
230 .read = seq_read,
231 .llseek = seq_lseek,
232 .release = single_release,
233 };
234
235 static const struct file_operations debugfs_pci_regs_fops = {
236 .owner = THIS_MODULE,
237 .open = rsxx_attr_pci_regs_open,
238 .read = seq_read,
239 .llseek = seq_lseek,
240 .release = single_release,
241 };
242
243 static void rsxx_debugfs_dev_new(struct rsxx_cardinfo *card)
244 {
245 struct dentry *debugfs_stats;
246 struct dentry *debugfs_pci_regs;
247 struct dentry *debugfs_cram;
248
249 card->debugfs_dir = debugfs_create_dir(card->gendisk->disk_name, NULL);
250 if (IS_ERR_OR_NULL(card->debugfs_dir))
251 goto failed_debugfs_dir;
252
253 debugfs_stats = debugfs_create_file("stats", S_IRUGO,
254 card->debugfs_dir, card,
255 &debugfs_stats_fops);
256 if (IS_ERR_OR_NULL(debugfs_stats))
257 goto failed_debugfs_stats;
258
259 debugfs_pci_regs = debugfs_create_file("pci_regs", S_IRUGO,
260 card->debugfs_dir, card,
261 &debugfs_pci_regs_fops);
262 if (IS_ERR_OR_NULL(debugfs_pci_regs))
263 goto failed_debugfs_pci_regs;
264
265 debugfs_cram = debugfs_create_file("cram", S_IRUGO | S_IWUSR,
266 card->debugfs_dir, card,
267 &debugfs_cram_fops);
268 if (IS_ERR_OR_NULL(debugfs_cram))
269 goto failed_debugfs_cram;
270
271 return;
272 failed_debugfs_cram:
273 debugfs_remove(debugfs_pci_regs);
274 failed_debugfs_pci_regs:
275 debugfs_remove(debugfs_stats);
276 failed_debugfs_stats:
277 debugfs_remove(card->debugfs_dir);
278 failed_debugfs_dir:
279 card->debugfs_dir = NULL;
280 }
281
282 /*----------------- Interrupt Control & Handling -------------------*/
283
284 static void rsxx_mask_interrupts(struct rsxx_cardinfo *card)
285 {
286 card->isr_mask = 0;
287 card->ier_mask = 0;
288 }
289
290 static void __enable_intr(unsigned int *mask, unsigned int intr)
291 {
292 *mask |= intr;
293 }
294
295 static void __disable_intr(unsigned int *mask, unsigned int intr)
296 {
297 *mask &= ~intr;
298 }
299
300 /*
301 * NOTE: Disabling the IER will disable the hardware interrupt.
302 * Disabling the ISR will disable the software handling of the ISR bit.
303 *
304 * Enable/Disable interrupt functions assume the card->irq_lock
305 * is held by the caller.
306 */
307 void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr)
308 {
309 if (unlikely(card->halt) ||
310 unlikely(card->eeh_state))
311 return;
312
313 __enable_intr(&card->ier_mask, intr);
314 iowrite32(card->ier_mask, card->regmap + IER);
315 }
316
317 void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr)
318 {
319 if (unlikely(card->eeh_state))
320 return;
321
322 __disable_intr(&card->ier_mask, intr);
323 iowrite32(card->ier_mask, card->regmap + IER);
324 }
325
326 void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card,
327 unsigned int intr)
328 {
329 if (unlikely(card->halt) ||
330 unlikely(card->eeh_state))
331 return;
332
333 __enable_intr(&card->isr_mask, intr);
334 __enable_intr(&card->ier_mask, intr);
335 iowrite32(card->ier_mask, card->regmap + IER);
336 }
337 void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card,
338 unsigned int intr)
339 {
340 if (unlikely(card->eeh_state))
341 return;
342
343 __disable_intr(&card->isr_mask, intr);
344 __disable_intr(&card->ier_mask, intr);
345 iowrite32(card->ier_mask, card->regmap + IER);
346 }
347
348 static irqreturn_t rsxx_isr(int irq, void *pdata)
349 {
350 struct rsxx_cardinfo *card = pdata;
351 unsigned int isr;
352 int handled = 0;
353 int reread_isr;
354 int i;
355
356 spin_lock(&card->irq_lock);
357
358 do {
359 reread_isr = 0;
360
361 if (unlikely(card->eeh_state))
362 break;
363
364 isr = ioread32(card->regmap + ISR);
365 if (isr == 0xffffffff) {
366 /*
367 * A few systems seem to have an intermittent issue
368 * where PCI reads return all Fs, but retrying the read
369 * a little later will return as expected.
370 */
371 dev_info(CARD_TO_DEV(card),
372 "ISR = 0xFFFFFFFF, retrying later\n");
373 break;
374 }
375
376 isr &= card->isr_mask;
377 if (!isr)
378 break;
379
380 for (i = 0; i < card->n_targets; i++) {
381 if (isr & CR_INTR_DMA(i)) {
382 if (card->ier_mask & CR_INTR_DMA(i)) {
383 rsxx_disable_ier(card, CR_INTR_DMA(i));
384 reread_isr = 1;
385 }
386 queue_work(card->ctrl[i].done_wq,
387 &card->ctrl[i].dma_done_work);
388 handled++;
389 }
390 }
391
392 if (isr & CR_INTR_CREG) {
393 queue_work(card->creg_ctrl.creg_wq,
394 &card->creg_ctrl.done_work);
395 handled++;
396 }
397
398 if (isr & CR_INTR_EVENT) {
399 queue_work(card->event_wq, &card->event_work);
400 rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
401 handled++;
402 }
403 } while (reread_isr);
404
405 spin_unlock(&card->irq_lock);
406
407 return handled ? IRQ_HANDLED : IRQ_NONE;
408 }
409
410 /*----------------- Card Event Handler -------------------*/
411 static const char * const rsxx_card_state_to_str(unsigned int state)
412 {
413 static const char * const state_strings[] = {
414 "Unknown", "Shutdown", "Starting", "Formatting",
415 "Uninitialized", "Good", "Shutting Down",
416 "Fault", "Read Only Fault", "dStroying"
417 };
418
419 return state_strings[ffs(state)];
420 }
421
422 static void card_state_change(struct rsxx_cardinfo *card,
423 unsigned int new_state)
424 {
425 int st;
426
427 dev_info(CARD_TO_DEV(card),
428 "card state change detected.(%s -> %s)\n",
429 rsxx_card_state_to_str(card->state),
430 rsxx_card_state_to_str(new_state));
431
432 card->state = new_state;
433
434 /* Don't attach DMA interfaces if the card has an invalid config */
435 if (!card->config_valid)
436 return;
437
438 switch (new_state) {
439 case CARD_STATE_RD_ONLY_FAULT:
440 dev_crit(CARD_TO_DEV(card),
441 "Hardware has entered read-only mode!\n");
442 /*
443 * Fall through so the DMA devices can be attached and
444 * the user can attempt to pull off their data.
445 */
446 case CARD_STATE_GOOD:
447 st = rsxx_get_card_size8(card, &card->size8);
448 if (st)
449 dev_err(CARD_TO_DEV(card),
450 "Failed attaching DMA devices\n");
451
452 if (card->config_valid)
453 set_capacity(card->gendisk, card->size8 >> 9);
454 break;
455
456 case CARD_STATE_FAULT:
457 dev_crit(CARD_TO_DEV(card),
458 "Hardware Fault reported!\n");
459 /* Fall through. */
460
461 /* Everything else, detach DMA interface if it's attached. */
462 case CARD_STATE_SHUTDOWN:
463 case CARD_STATE_STARTING:
464 case CARD_STATE_FORMATTING:
465 case CARD_STATE_UNINITIALIZED:
466 case CARD_STATE_SHUTTING_DOWN:
467 /*
468 * dStroy is a term coined by marketing to represent the low level
469 * secure erase.
470 */
471 case CARD_STATE_DSTROYING:
472 set_capacity(card->gendisk, 0);
473 break;
474 }
475 }
476
477 static void card_event_handler(struct work_struct *work)
478 {
479 struct rsxx_cardinfo *card;
480 unsigned int state;
481 unsigned long flags;
482 int st;
483
484 card = container_of(work, struct rsxx_cardinfo, event_work);
485
486 if (unlikely(card->halt))
487 return;
488
489 /*
490 * Enable the interrupt now to avoid any weird race conditions where a
491 * state change might occur while rsxx_get_card_state() is
492 * processing a returned creg cmd.
493 */
494 spin_lock_irqsave(&card->irq_lock, flags);
495 rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
496 spin_unlock_irqrestore(&card->irq_lock, flags);
497
498 st = rsxx_get_card_state(card, &state);
499 if (st) {
500 dev_info(CARD_TO_DEV(card),
501 "Failed reading state after event.\n");
502 return;
503 }
504
505 if (card->state != state)
506 card_state_change(card, state);
507
508 if (card->creg_ctrl.creg_stats.stat & CREG_STAT_LOG_PENDING)
509 rsxx_read_hw_log(card);
510 }
511
512 /*----------------- Card Operations -------------------*/
513 static int card_shutdown(struct rsxx_cardinfo *card)
514 {
515 unsigned int state;
516 signed long start;
517 const int timeout = msecs_to_jiffies(120000);
518 int st;
519
520 /* We can't issue a shutdown if the card is in a transition state */
521 start = jiffies;
522 do {
523 st = rsxx_get_card_state(card, &state);
524 if (st)
525 return st;
526 } while (state == CARD_STATE_STARTING &&
527 (jiffies - start < timeout));
528
529 if (state == CARD_STATE_STARTING)
530 return -ETIMEDOUT;
531
532 /* Only issue a shutdown if we need to */
533 if ((state != CARD_STATE_SHUTTING_DOWN) &&
534 (state != CARD_STATE_SHUTDOWN)) {
535 st = rsxx_issue_card_cmd(card, CARD_CMD_SHUTDOWN);
536 if (st)
537 return st;
538 }
539
540 start = jiffies;
541 do {
542 st = rsxx_get_card_state(card, &state);
543 if (st)
544 return st;
545 } while (state != CARD_STATE_SHUTDOWN &&
546 (jiffies - start < timeout));
547
548 if (state != CARD_STATE_SHUTDOWN)
549 return -ETIMEDOUT;
550
551 return 0;
552 }
553
554 static int rsxx_eeh_frozen(struct pci_dev *dev)
555 {
556 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
557 int i;
558 int st;
559
560 dev_warn(&dev->dev, "IBM Flash Adapter PCI: preparing for slot reset.\n");
561
562 card->eeh_state = 1;
563 rsxx_mask_interrupts(card);
564
565 /*
566 * We need to guarantee that the write for eeh_state and masking
567 * interrupts does not become reordered. This will prevent a possible
568 * race condition with the EEH code.
569 */
570 wmb();
571
572 pci_disable_device(dev);
573
574 st = rsxx_eeh_save_issued_dmas(card);
575 if (st)
576 return st;
577
578 rsxx_eeh_save_issued_creg(card);
579
580 for (i = 0; i < card->n_targets; i++) {
581 if (card->ctrl[i].status.buf)
582 pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8,
583 card->ctrl[i].status.buf,
584 card->ctrl[i].status.dma_addr);
585 if (card->ctrl[i].cmd.buf)
586 pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8,
587 card->ctrl[i].cmd.buf,
588 card->ctrl[i].cmd.dma_addr);
589 }
590
591 return 0;
592 }
593
594 static void rsxx_eeh_failure(struct pci_dev *dev)
595 {
596 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
597 int i;
598 int cnt = 0;
599
600 dev_err(&dev->dev, "IBM Flash Adapter PCI: disabling failed card.\n");
601
602 card->eeh_state = 1;
603 card->halt = 1;
604
605 for (i = 0; i < card->n_targets; i++) {
606 spin_lock_bh(&card->ctrl[i].queue_lock);
607 cnt = rsxx_cleanup_dma_queue(&card->ctrl[i],
608 &card->ctrl[i].queue,
609 COMPLETE_DMA);
610 spin_unlock_bh(&card->ctrl[i].queue_lock);
611
612 cnt += rsxx_dma_cancel(&card->ctrl[i]);
613
614 if (cnt)
615 dev_info(CARD_TO_DEV(card),
616 "Freed %d queued DMAs on channel %d\n",
617 cnt, card->ctrl[i].id);
618 }
619 }
620
621 static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card)
622 {
623 unsigned int status;
624 int iter = 0;
625
626 /* We need to wait for the hardware to reset */
627 while (iter++ < 10) {
628 status = ioread32(card->regmap + PCI_RECONFIG);
629
630 if (status & RSXX_FLUSH_BUSY) {
631 ssleep(1);
632 continue;
633 }
634
635 if (status & RSXX_FLUSH_TIMEOUT)
636 dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n");
637 return 0;
638 }
639
640 /* Hardware failed resetting itself. */
641 return -1;
642 }
643
644 static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev,
645 enum pci_channel_state error)
646 {
647 int st;
648
649 if (dev->revision < RSXX_EEH_SUPPORT)
650 return PCI_ERS_RESULT_NONE;
651
652 if (error == pci_channel_io_perm_failure) {
653 rsxx_eeh_failure(dev);
654 return PCI_ERS_RESULT_DISCONNECT;
655 }
656
657 st = rsxx_eeh_frozen(dev);
658 if (st) {
659 dev_err(&dev->dev, "Slot reset setup failed\n");
660 rsxx_eeh_failure(dev);
661 return PCI_ERS_RESULT_DISCONNECT;
662 }
663
664 return PCI_ERS_RESULT_NEED_RESET;
665 }
666
667 static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev)
668 {
669 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
670 unsigned long flags;
671 int i;
672 int st;
673
674 dev_warn(&dev->dev,
675 "IBM Flash Adapter PCI: recovering from slot reset.\n");
676
677 st = pci_enable_device(dev);
678 if (st)
679 goto failed_hw_setup;
680
681 pci_set_master(dev);
682
683 st = rsxx_eeh_fifo_flush_poll(card);
684 if (st)
685 goto failed_hw_setup;
686
687 rsxx_dma_queue_reset(card);
688
689 for (i = 0; i < card->n_targets; i++) {
690 st = rsxx_hw_buffers_init(dev, &card->ctrl[i]);
691 if (st)
692 goto failed_hw_buffers_init;
693 }
694
695 if (card->config_valid)
696 rsxx_dma_configure(card);
697
698 /* Clears the ISR register from spurious interrupts */
699 st = ioread32(card->regmap + ISR);
700
701 card->eeh_state = 0;
702
703 spin_lock_irqsave(&card->irq_lock, flags);
704 if (card->n_targets & RSXX_MAX_TARGETS)
705 rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G);
706 else
707 rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C);
708 spin_unlock_irqrestore(&card->irq_lock, flags);
709
710 rsxx_kick_creg_queue(card);
711
712 for (i = 0; i < card->n_targets; i++) {
713 spin_lock(&card->ctrl[i].queue_lock);
714 if (list_empty(&card->ctrl[i].queue)) {
715 spin_unlock(&card->ctrl[i].queue_lock);
716 continue;
717 }
718 spin_unlock(&card->ctrl[i].queue_lock);
719
720 queue_work(card->ctrl[i].issue_wq,
721 &card->ctrl[i].issue_dma_work);
722 }
723
724 dev_info(&dev->dev, "IBM Flash Adapter PCI: recovery complete.\n");
725
726 return PCI_ERS_RESULT_RECOVERED;
727
728 failed_hw_buffers_init:
729 for (i = 0; i < card->n_targets; i++) {
730 if (card->ctrl[i].status.buf)
731 pci_free_consistent(card->dev,
732 STATUS_BUFFER_SIZE8,
733 card->ctrl[i].status.buf,
734 card->ctrl[i].status.dma_addr);
735 if (card->ctrl[i].cmd.buf)
736 pci_free_consistent(card->dev,
737 COMMAND_BUFFER_SIZE8,
738 card->ctrl[i].cmd.buf,
739 card->ctrl[i].cmd.dma_addr);
740 }
741 failed_hw_setup:
742 rsxx_eeh_failure(dev);
743 return PCI_ERS_RESULT_DISCONNECT;
744
745 }
746
747 /*----------------- Driver Initialization & Setup -------------------*/
748 /* Returns: 0 if the driver is compatible with the device
749 -1 if the driver is NOT compatible with the device */
750 static int rsxx_compatibility_check(struct rsxx_cardinfo *card)
751 {
752 unsigned char pci_rev;
753
754 pci_read_config_byte(card->dev, PCI_REVISION_ID, &pci_rev);
755
756 if (pci_rev > RS70_PCI_REV_SUPPORTED)
757 return -1;
758 return 0;
759 }
760
761 static int rsxx_pci_probe(struct pci_dev *dev,
762 const struct pci_device_id *id)
763 {
764 struct rsxx_cardinfo *card;
765 int st;
766 unsigned int sync_timeout;
767
768 dev_info(&dev->dev, "PCI-Flash SSD discovered\n");
769
770 card = kzalloc(sizeof(*card), GFP_KERNEL);
771 if (!card)
772 return -ENOMEM;
773
774 card->dev = dev;
775 pci_set_drvdata(dev, card);
776
777 do {
778 if (!ida_pre_get(&rsxx_disk_ida, GFP_KERNEL)) {
779 st = -ENOMEM;
780 goto failed_ida_get;
781 }
782
783 spin_lock(&rsxx_ida_lock);
784 st = ida_get_new(&rsxx_disk_ida, &card->disk_id);
785 spin_unlock(&rsxx_ida_lock);
786 } while (st == -EAGAIN);
787
788 if (st)
789 goto failed_ida_get;
790
791 st = pci_enable_device(dev);
792 if (st)
793 goto failed_enable;
794
795 pci_set_master(dev);
796 pci_set_dma_max_seg_size(dev, RSXX_HW_BLK_SIZE);
797
798 st = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
799 if (st) {
800 dev_err(CARD_TO_DEV(card),
801 "No usable DMA configuration,aborting\n");
802 goto failed_dma_mask;
803 }
804
805 st = pci_request_regions(dev, DRIVER_NAME);
806 if (st) {
807 dev_err(CARD_TO_DEV(card),
808 "Failed to request memory region\n");
809 goto failed_request_regions;
810 }
811
812 if (pci_resource_len(dev, 0) == 0) {
813 dev_err(CARD_TO_DEV(card), "BAR0 has length 0!\n");
814 st = -ENOMEM;
815 goto failed_iomap;
816 }
817
818 card->regmap = pci_iomap(dev, 0, 0);
819 if (!card->regmap) {
820 dev_err(CARD_TO_DEV(card), "Failed to map BAR0\n");
821 st = -ENOMEM;
822 goto failed_iomap;
823 }
824
825 spin_lock_init(&card->irq_lock);
826 card->halt = 0;
827 card->eeh_state = 0;
828
829 spin_lock_irq(&card->irq_lock);
830 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
831 spin_unlock_irq(&card->irq_lock);
832
833 if (!force_legacy) {
834 st = pci_enable_msi(dev);
835 if (st)
836 dev_warn(CARD_TO_DEV(card),
837 "Failed to enable MSI\n");
838 }
839
840 st = request_irq(dev->irq, rsxx_isr, IRQF_SHARED,
841 DRIVER_NAME, card);
842 if (st) {
843 dev_err(CARD_TO_DEV(card),
844 "Failed requesting IRQ%d\n", dev->irq);
845 goto failed_irq;
846 }
847
848 /************* Setup Processor Command Interface *************/
849 st = rsxx_creg_setup(card);
850 if (st) {
851 dev_err(CARD_TO_DEV(card), "Failed to setup creg interface.\n");
852 goto failed_creg_setup;
853 }
854
855 spin_lock_irq(&card->irq_lock);
856 rsxx_enable_ier_and_isr(card, CR_INTR_CREG);
857 spin_unlock_irq(&card->irq_lock);
858
859 st = rsxx_compatibility_check(card);
860 if (st) {
861 dev_warn(CARD_TO_DEV(card),
862 "Incompatible driver detected. Please update the driver.\n");
863 st = -EINVAL;
864 goto failed_compatiblity_check;
865 }
866
867 /************* Load Card Config *************/
868 st = rsxx_load_config(card);
869 if (st)
870 dev_err(CARD_TO_DEV(card),
871 "Failed loading card config\n");
872
873 /************* Setup DMA Engine *************/
874 st = rsxx_get_num_targets(card, &card->n_targets);
875 if (st)
876 dev_info(CARD_TO_DEV(card),
877 "Failed reading the number of DMA targets\n");
878
879 card->ctrl = kzalloc(card->n_targets * sizeof(*card->ctrl), GFP_KERNEL);
880 if (!card->ctrl) {
881 st = -ENOMEM;
882 goto failed_dma_setup;
883 }
884
885 st = rsxx_dma_setup(card);
886 if (st) {
887 dev_info(CARD_TO_DEV(card),
888 "Failed to setup DMA engine\n");
889 goto failed_dma_setup;
890 }
891
892 /************* Setup Card Event Handler *************/
893 card->event_wq = create_singlethread_workqueue(DRIVER_NAME"_event");
894 if (!card->event_wq) {
895 dev_err(CARD_TO_DEV(card), "Failed card event setup.\n");
896 goto failed_event_handler;
897 }
898
899 INIT_WORK(&card->event_work, card_event_handler);
900
901 st = rsxx_setup_dev(card);
902 if (st)
903 goto failed_create_dev;
904
905 rsxx_get_card_state(card, &card->state);
906
907 dev_info(CARD_TO_DEV(card),
908 "card state: %s\n",
909 rsxx_card_state_to_str(card->state));
910
911 /*
912 * Now that the DMA Engine and devices have been setup,
913 * we can enable the event interrupt(it kicks off actions in
914 * those layers so we couldn't enable it right away.)
915 */
916 spin_lock_irq(&card->irq_lock);
917 rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
918 spin_unlock_irq(&card->irq_lock);
919
920 if (card->state == CARD_STATE_SHUTDOWN) {
921 st = rsxx_issue_card_cmd(card, CARD_CMD_STARTUP);
922 if (st)
923 dev_crit(CARD_TO_DEV(card),
924 "Failed issuing card startup\n");
925 if (sync_start) {
926 sync_timeout = SYNC_START_TIMEOUT;
927
928 dev_info(CARD_TO_DEV(card),
929 "Waiting for card to startup\n");
930
931 do {
932 ssleep(1);
933 sync_timeout--;
934
935 rsxx_get_card_state(card, &card->state);
936 } while (sync_timeout &&
937 (card->state == CARD_STATE_STARTING));
938
939 if (card->state == CARD_STATE_STARTING) {
940 dev_warn(CARD_TO_DEV(card),
941 "Card startup timed out\n");
942 card->size8 = 0;
943 } else {
944 dev_info(CARD_TO_DEV(card),
945 "card state: %s\n",
946 rsxx_card_state_to_str(card->state));
947 st = rsxx_get_card_size8(card, &card->size8);
948 if (st)
949 card->size8 = 0;
950 }
951 }
952 } else if (card->state == CARD_STATE_GOOD ||
953 card->state == CARD_STATE_RD_ONLY_FAULT) {
954 st = rsxx_get_card_size8(card, &card->size8);
955 if (st)
956 card->size8 = 0;
957 }
958
959 rsxx_attach_dev(card);
960
961 /************* Setup Debugfs *************/
962 rsxx_debugfs_dev_new(card);
963
964 return 0;
965
966 failed_create_dev:
967 destroy_workqueue(card->event_wq);
968 card->event_wq = NULL;
969 failed_event_handler:
970 rsxx_dma_destroy(card);
971 failed_dma_setup:
972 failed_compatiblity_check:
973 destroy_workqueue(card->creg_ctrl.creg_wq);
974 card->creg_ctrl.creg_wq = NULL;
975 failed_creg_setup:
976 spin_lock_irq(&card->irq_lock);
977 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
978 spin_unlock_irq(&card->irq_lock);
979 free_irq(dev->irq, card);
980 if (!force_legacy)
981 pci_disable_msi(dev);
982 failed_irq:
983 pci_iounmap(dev, card->regmap);
984 failed_iomap:
985 pci_release_regions(dev);
986 failed_request_regions:
987 failed_dma_mask:
988 pci_disable_device(dev);
989 failed_enable:
990 spin_lock(&rsxx_ida_lock);
991 ida_remove(&rsxx_disk_ida, card->disk_id);
992 spin_unlock(&rsxx_ida_lock);
993 failed_ida_get:
994 kfree(card);
995
996 return st;
997 }
998
999 static void rsxx_pci_remove(struct pci_dev *dev)
1000 {
1001 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
1002 unsigned long flags;
1003 int st;
1004 int i;
1005
1006 if (!card)
1007 return;
1008
1009 dev_info(CARD_TO_DEV(card),
1010 "Removing PCI-Flash SSD.\n");
1011
1012 rsxx_detach_dev(card);
1013
1014 for (i = 0; i < card->n_targets; i++) {
1015 spin_lock_irqsave(&card->irq_lock, flags);
1016 rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
1017 spin_unlock_irqrestore(&card->irq_lock, flags);
1018 }
1019
1020 st = card_shutdown(card);
1021 if (st)
1022 dev_crit(CARD_TO_DEV(card), "Shutdown failed!\n");
1023
1024 /* Sync outstanding event handlers. */
1025 spin_lock_irqsave(&card->irq_lock, flags);
1026 rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
1027 spin_unlock_irqrestore(&card->irq_lock, flags);
1028
1029 cancel_work_sync(&card->event_work);
1030
1031 rsxx_destroy_dev(card);
1032 rsxx_dma_destroy(card);
1033
1034 spin_lock_irqsave(&card->irq_lock, flags);
1035 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
1036 spin_unlock_irqrestore(&card->irq_lock, flags);
1037
1038 /* Prevent work_structs from re-queuing themselves. */
1039 card->halt = 1;
1040
1041 debugfs_remove_recursive(card->debugfs_dir);
1042
1043 free_irq(dev->irq, card);
1044
1045 if (!force_legacy)
1046 pci_disable_msi(dev);
1047
1048 rsxx_creg_destroy(card);
1049
1050 pci_iounmap(dev, card->regmap);
1051
1052 pci_disable_device(dev);
1053 pci_release_regions(dev);
1054
1055 kfree(card);
1056 }
1057
1058 static int rsxx_pci_suspend(struct pci_dev *dev, pm_message_t state)
1059 {
1060 /* We don't support suspend at this time. */
1061 return -ENOSYS;
1062 }
1063
1064 static void rsxx_pci_shutdown(struct pci_dev *dev)
1065 {
1066 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
1067 unsigned long flags;
1068 int i;
1069
1070 if (!card)
1071 return;
1072
1073 dev_info(CARD_TO_DEV(card), "Shutting down PCI-Flash SSD.\n");
1074
1075 rsxx_detach_dev(card);
1076
1077 for (i = 0; i < card->n_targets; i++) {
1078 spin_lock_irqsave(&card->irq_lock, flags);
1079 rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
1080 spin_unlock_irqrestore(&card->irq_lock, flags);
1081 }
1082
1083 card_shutdown(card);
1084 }
1085
1086 static const struct pci_error_handlers rsxx_err_handler = {
1087 .error_detected = rsxx_error_detected,
1088 .slot_reset = rsxx_slot_reset,
1089 };
1090
1091 static const struct pci_device_id rsxx_pci_ids[] = {
1092 {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)},
1093 {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)},
1094 {0,},
1095 };
1096
1097 MODULE_DEVICE_TABLE(pci, rsxx_pci_ids);
1098
1099 static struct pci_driver rsxx_pci_driver = {
1100 .name = DRIVER_NAME,
1101 .id_table = rsxx_pci_ids,
1102 .probe = rsxx_pci_probe,
1103 .remove = rsxx_pci_remove,
1104 .suspend = rsxx_pci_suspend,
1105 .shutdown = rsxx_pci_shutdown,
1106 .err_handler = &rsxx_err_handler,
1107 };
1108
1109 static int __init rsxx_core_init(void)
1110 {
1111 int st;
1112
1113 st = rsxx_dev_init();
1114 if (st)
1115 return st;
1116
1117 st = rsxx_dma_init();
1118 if (st)
1119 goto dma_init_failed;
1120
1121 st = rsxx_creg_init();
1122 if (st)
1123 goto creg_init_failed;
1124
1125 return pci_register_driver(&rsxx_pci_driver);
1126
1127 creg_init_failed:
1128 rsxx_dma_cleanup();
1129 dma_init_failed:
1130 rsxx_dev_cleanup();
1131
1132 return st;
1133 }
1134
1135 static void __exit rsxx_core_cleanup(void)
1136 {
1137 pci_unregister_driver(&rsxx_pci_driver);
1138 rsxx_creg_cleanup();
1139 rsxx_dma_cleanup();
1140 rsxx_dev_cleanup();
1141 }
1142
1143 module_init(rsxx_core_init);
1144 module_exit(rsxx_core_cleanup);
Linux with added FPC-III support