2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
26 * Authors: Dave Airlie <airlied@redhat.com>
32 #include <drm/drm_fb_helper.h>
33 #include <drm/drm_crtc_helper.h>
35 #include "ast_dram_tables.h"
37 void ast_set_index_reg_mask(struct ast_private
*ast
,
38 uint32_t base
, uint8_t index
,
39 uint8_t mask
, uint8_t val
)
42 ast_io_write8(ast
, base
, index
);
43 tmp
= (ast_io_read8(ast
, base
+ 1) & mask
) | val
;
44 ast_set_index_reg(ast
, base
, index
, tmp
);
47 uint8_t ast_get_index_reg(struct ast_private
*ast
,
48 uint32_t base
, uint8_t index
)
51 ast_io_write8(ast
, base
, index
);
52 ret
= ast_io_read8(ast
, base
+ 1);
56 uint8_t ast_get_index_reg_mask(struct ast_private
*ast
,
57 uint32_t base
, uint8_t index
, uint8_t mask
)
60 ast_io_write8(ast
, base
, index
);
61 ret
= ast_io_read8(ast
, base
+ 1) & mask
;
65 static void ast_detect_config_mode(struct drm_device
*dev
, u32
*scu_rev
)
67 struct device_node
*np
= dev
->pdev
->dev
.of_node
;
68 struct ast_private
*ast
= dev
->dev_private
;
69 uint32_t data
, jregd0
, jregd1
;
72 ast
->config_mode
= ast_use_defaults
;
73 *scu_rev
= 0xffffffff;
75 /* Check if we have device-tree properties */
76 if (np
&& !of_property_read_u32(np
, "aspeed,scu-revision-id",
78 /* We do, disable P2A access */
79 ast
->config_mode
= ast_use_dt
;
80 DRM_INFO("Using device-tree for configuration\n");
84 /* Not all families have a P2A bridge */
85 if (dev
->pdev
->device
!= PCI_CHIP_AST2000
)
89 * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge
90 * is disabled. We force using P2A if VGA only mode bit
93 jregd0
= ast_get_index_reg_mask(ast
, AST_IO_CRTC_PORT
, 0xd0, 0xff);
94 jregd1
= ast_get_index_reg_mask(ast
, AST_IO_CRTC_PORT
, 0xd1, 0xff);
95 if (!(jregd0
& 0x80) || !(jregd1
& 0x10)) {
96 /* Double check it's actually working */
97 data
= ast_read32(ast
, 0xf004);
98 if (data
!= 0xFFFFFFFF) {
99 /* P2A works, grab silicon revision */
100 ast
->config_mode
= ast_use_p2a
;
102 DRM_INFO("Using P2A bridge for configuration\n");
104 /* Read SCU7c (silicon revision register) */
105 ast_write32(ast
, 0xf004, 0x1e6e0000);
106 ast_write32(ast
, 0xf000, 0x1);
107 *scu_rev
= ast_read32(ast
, 0x1207c);
112 /* We have a P2A bridge but it's disabled */
113 DRM_INFO("P2A bridge disabled, using default configuration\n");
116 static int ast_detect_chip(struct drm_device
*dev
, bool *need_post
)
118 struct ast_private
*ast
= dev
->dev_private
;
119 uint32_t jreg
, scu_rev
;
122 * If VGA isn't enabled, we need to enable now or subsequent
123 * access to the scratch registers will fail. We also inform
124 * our caller that it needs to POST the chip
125 * (Assumption: VGA not enabled -> need to POST)
127 if (!ast_is_vga_enabled(dev
)) {
129 DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
135 /* Enable extended register access */
136 ast_enable_mmio(dev
);
139 /* Find out whether P2A works or whether to use device-tree */
140 ast_detect_config_mode(dev
, &scu_rev
);
142 /* Identify chipset */
143 if (dev
->pdev
->device
== PCI_CHIP_AST1180
) {
145 DRM_INFO("AST 1180 detected\n");
147 if (dev
->pdev
->revision
>= 0x30) {
149 DRM_INFO("AST 2400 detected\n");
150 } else if (dev
->pdev
->revision
>= 0x20) {
152 DRM_INFO("AST 2300 detected\n");
153 } else if (dev
->pdev
->revision
>= 0x10) {
154 switch (scu_rev
& 0x0300) {
157 DRM_INFO("AST 1100 detected\n");
161 DRM_INFO("AST 2200 detected\n");
165 DRM_INFO("AST 2150 detected\n");
169 DRM_INFO("AST 2100 detected\n");
172 ast
->vga2_clone
= false;
175 DRM_INFO("AST 2000 detected\n");
179 /* Check if we support wide screen */
182 ast
->support_wide_screen
= true;
185 ast
->support_wide_screen
= false;
188 jreg
= ast_get_index_reg_mask(ast
, AST_IO_CRTC_PORT
, 0xd0, 0xff);
190 ast
->support_wide_screen
= true;
191 else if (jreg
& 0x01)
192 ast
->support_wide_screen
= true;
194 ast
->support_wide_screen
= false;
195 if (ast
->chip
== AST2300
&&
196 (scu_rev
& 0x300) == 0x0) /* ast1300 */
197 ast
->support_wide_screen
= true;
198 if (ast
->chip
== AST2400
&&
199 (scu_rev
& 0x300) == 0x100) /* ast1400 */
200 ast
->support_wide_screen
= true;
205 /* Check 3rd Tx option (digital output afaik) */
206 ast
->tx_chip_type
= AST_TX_NONE
;
209 * VGACRA3 Enhanced Color Mode Register, check if DVO is already
210 * enabled, in that case, assume we have a SIL164 TMDS transmitter
212 * Don't make that assumption if we the chip wasn't enabled and
213 * is at power-on reset, otherwise we'll incorrectly "detect" a
214 * SIL164 when there is none.
217 jreg
= ast_get_index_reg_mask(ast
, AST_IO_CRTC_PORT
, 0xa3, 0xff);
219 ast
->tx_chip_type
= AST_TX_SIL164
;
222 if ((ast
->chip
== AST2300
) || (ast
->chip
== AST2400
)) {
224 * On AST2300 and 2400, look the configuration set by the SoC in
225 * the SOC scratch register #1 bits 11:8 (interestingly marked
226 * as "reserved" in the spec)
228 jreg
= ast_get_index_reg_mask(ast
, AST_IO_CRTC_PORT
, 0xd1, 0xff);
231 ast
->tx_chip_type
= AST_TX_SIL164
;
234 ast
->dp501_fw_addr
= kzalloc(32*1024, GFP_KERNEL
);
235 if (ast
->dp501_fw_addr
) {
236 /* backup firmware */
237 if (ast_backup_fw(dev
, ast
->dp501_fw_addr
, 32*1024)) {
238 kfree(ast
->dp501_fw_addr
);
239 ast
->dp501_fw_addr
= NULL
;
244 ast
->tx_chip_type
= AST_TX_DP501
;
248 /* Print stuff for diagnostic purposes */
249 switch(ast
->tx_chip_type
) {
251 DRM_INFO("Using Sil164 TMDS transmitter\n");
254 DRM_INFO("Using DP501 DisplayPort transmitter\n");
257 DRM_INFO("Analog VGA only\n");
262 static int ast_get_dram_info(struct drm_device
*dev
)
264 struct device_node
*np
= dev
->pdev
->dev
.of_node
;
265 struct ast_private
*ast
= dev
->dev_private
;
266 uint32_t mcr_cfg
, mcr_scu_mpll
, mcr_scu_strap
;
267 uint32_t denum
, num
, div
, ref_pll
, dsel
;
269 switch (ast
->config_mode
) {
272 * If some properties are missing, use reasonable
273 * defaults for AST2400
275 if (of_property_read_u32(np
, "aspeed,mcr-configuration",
277 mcr_cfg
= 0x00000577;
278 if (of_property_read_u32(np
, "aspeed,mcr-scu-mpll",
280 mcr_scu_mpll
= 0x000050C0;
281 if (of_property_read_u32(np
, "aspeed,mcr-scu-strap",
286 ast_write32(ast
, 0xf004, 0x1e6e0000);
287 ast_write32(ast
, 0xf000, 0x1);
288 mcr_cfg
= ast_read32(ast
, 0x10004);
289 mcr_scu_mpll
= ast_read32(ast
, 0x10120);
290 mcr_scu_strap
= ast_read32(ast
, 0x10170);
292 case ast_use_defaults
:
294 ast
->dram_bus_width
= 16;
295 ast
->dram_type
= AST_DRAM_1Gx16
;
301 ast
->dram_bus_width
= 16;
303 ast
->dram_bus_width
= 32;
305 if (ast
->chip
== AST2300
|| ast
->chip
== AST2400
) {
306 switch (mcr_cfg
& 0x03) {
308 ast
->dram_type
= AST_DRAM_512Mx16
;
312 ast
->dram_type
= AST_DRAM_1Gx16
;
315 ast
->dram_type
= AST_DRAM_2Gx16
;
318 ast
->dram_type
= AST_DRAM_4Gx16
;
322 switch (mcr_cfg
& 0x0c) {
325 ast
->dram_type
= AST_DRAM_512Mx16
;
329 ast
->dram_type
= AST_DRAM_1Gx16
;
331 ast
->dram_type
= AST_DRAM_512Mx32
;
334 ast
->dram_type
= AST_DRAM_1Gx32
;
339 if (mcr_scu_strap
& 0x2000)
344 denum
= mcr_scu_mpll
& 0x1f;
345 num
= (mcr_scu_mpll
& 0x3fe0) >> 5;
346 dsel
= (mcr_scu_mpll
& 0xc000) >> 14;
359 ast
->mclk
= ref_pll
* (num
+ 2) / (denum
+ 2) * (div
* 1000);
363 static void ast_user_framebuffer_destroy(struct drm_framebuffer
*fb
)
365 struct ast_framebuffer
*ast_fb
= to_ast_framebuffer(fb
);
367 drm_gem_object_unreference_unlocked(ast_fb
->obj
);
369 drm_framebuffer_cleanup(fb
);
373 static const struct drm_framebuffer_funcs ast_fb_funcs
= {
374 .destroy
= ast_user_framebuffer_destroy
,
378 int ast_framebuffer_init(struct drm_device
*dev
,
379 struct ast_framebuffer
*ast_fb
,
380 struct drm_mode_fb_cmd2
*mode_cmd
,
381 struct drm_gem_object
*obj
)
385 drm_helper_mode_fill_fb_struct(&ast_fb
->base
, mode_cmd
);
387 ret
= drm_framebuffer_init(dev
, &ast_fb
->base
, &ast_fb_funcs
);
389 DRM_ERROR("framebuffer init failed %d\n", ret
);
395 static struct drm_framebuffer
*
396 ast_user_framebuffer_create(struct drm_device
*dev
,
397 struct drm_file
*filp
,
398 struct drm_mode_fb_cmd2
*mode_cmd
)
400 struct drm_gem_object
*obj
;
401 struct ast_framebuffer
*ast_fb
;
404 obj
= drm_gem_object_lookup(dev
, filp
, mode_cmd
->handles
[0]);
406 return ERR_PTR(-ENOENT
);
408 ast_fb
= kzalloc(sizeof(*ast_fb
), GFP_KERNEL
);
410 drm_gem_object_unreference_unlocked(obj
);
411 return ERR_PTR(-ENOMEM
);
414 ret
= ast_framebuffer_init(dev
, ast_fb
, mode_cmd
, obj
);
416 drm_gem_object_unreference_unlocked(obj
);
420 return &ast_fb
->base
;
423 static const struct drm_mode_config_funcs ast_mode_funcs
= {
424 .fb_create
= ast_user_framebuffer_create
,
427 static u32
ast_get_vram_info(struct drm_device
*dev
)
429 struct ast_private
*ast
= dev
->dev_private
;
434 vram_size
= AST_VIDMEM_DEFAULT_SIZE
;
435 jreg
= ast_get_index_reg_mask(ast
, AST_IO_CRTC_PORT
, 0xaa, 0xff);
437 case 0: vram_size
= AST_VIDMEM_SIZE_8M
; break;
438 case 1: vram_size
= AST_VIDMEM_SIZE_16M
; break;
439 case 2: vram_size
= AST_VIDMEM_SIZE_32M
; break;
440 case 3: vram_size
= AST_VIDMEM_SIZE_64M
; break;
443 jreg
= ast_get_index_reg_mask(ast
, AST_IO_CRTC_PORT
, 0x99, 0xff);
444 switch (jreg
& 0x03) {
446 vram_size
-= 0x100000;
449 vram_size
-= 0x200000;
452 vram_size
-= 0x400000;
459 int ast_driver_load(struct drm_device
*dev
, unsigned long flags
)
461 struct ast_private
*ast
;
465 ast
= kzalloc(sizeof(struct ast_private
), GFP_KERNEL
);
469 dev
->dev_private
= ast
;
472 ast
->regs
= pci_iomap(dev
->pdev
, 1, 0);
479 * If we don't have IO space at all, use MMIO now and
480 * assume the chip has MMIO enabled by default (rev 0x20
483 if (!(pci_resource_flags(dev
->pdev
, 2) & IORESOURCE_IO
)) {
484 DRM_INFO("platform has no IO space, trying MMIO\n");
485 ast
->ioregs
= ast
->regs
+ AST_IO_MM_OFFSET
;
488 /* "map" IO regs if the above hasn't done so already */
490 ast
->ioregs
= pci_iomap(dev
->pdev
, 2, 0);
497 ast_detect_chip(dev
, &need_post
);
499 if (ast
->chip
!= AST1180
) {
500 ret
= ast_get_dram_info(dev
);
503 ast
->vram_size
= ast_get_vram_info(dev
);
504 DRM_INFO("dram %d %d %d %08x\n", ast
->mclk
, ast
->dram_type
, ast
->dram_bus_width
, ast
->vram_size
);
510 ret
= ast_mm_init(ast
);
514 drm_mode_config_init(dev
);
516 dev
->mode_config
.funcs
= (void *)&ast_mode_funcs
;
517 dev
->mode_config
.min_width
= 0;
518 dev
->mode_config
.min_height
= 0;
519 dev
->mode_config
.preferred_depth
= 24;
520 dev
->mode_config
.prefer_shadow
= 1;
521 dev
->mode_config
.fb_base
= pci_resource_start(ast
->dev
->pdev
, 0);
523 if (ast
->chip
== AST2100
||
524 ast
->chip
== AST2200
||
525 ast
->chip
== AST2300
||
526 ast
->chip
== AST2400
||
527 ast
->chip
== AST1180
) {
528 dev
->mode_config
.max_width
= 1920;
529 dev
->mode_config
.max_height
= 2048;
531 dev
->mode_config
.max_width
= 1600;
532 dev
->mode_config
.max_height
= 1200;
535 ret
= ast_mode_init(dev
);
539 ret
= ast_fbdev_init(dev
);
546 dev
->dev_private
= NULL
;
550 int ast_driver_unload(struct drm_device
*dev
)
552 struct ast_private
*ast
= dev
->dev_private
;
554 kfree(ast
->dp501_fw_addr
);
557 drm_mode_config_cleanup(dev
);
560 pci_iounmap(dev
->pdev
, ast
->ioregs
);
561 pci_iounmap(dev
->pdev
, ast
->regs
);
566 int ast_gem_create(struct drm_device
*dev
,
567 u32 size
, bool iskernel
,
568 struct drm_gem_object
**obj
)
570 struct ast_bo
*astbo
;
575 size
= roundup(size
, PAGE_SIZE
);
579 ret
= ast_bo_create(dev
, size
, 0, 0, &astbo
);
581 if (ret
!= -ERESTARTSYS
)
582 DRM_ERROR("failed to allocate GEM object\n");
589 int ast_dumb_create(struct drm_file
*file
,
590 struct drm_device
*dev
,
591 struct drm_mode_create_dumb
*args
)
594 struct drm_gem_object
*gobj
;
597 args
->pitch
= args
->width
* ((args
->bpp
+ 7) / 8);
598 args
->size
= args
->pitch
* args
->height
;
600 ret
= ast_gem_create(dev
, args
->size
, false,
605 ret
= drm_gem_handle_create(file
, gobj
, &handle
);
606 drm_gem_object_unreference_unlocked(gobj
);
610 args
->handle
= handle
;
614 static void ast_bo_unref(struct ast_bo
**bo
)
616 struct ttm_buffer_object
*tbo
;
626 void ast_gem_free_object(struct drm_gem_object
*obj
)
628 struct ast_bo
*ast_bo
= gem_to_ast_bo(obj
);
630 ast_bo_unref(&ast_bo
);
634 static inline u64
ast_bo_mmap_offset(struct ast_bo
*bo
)
636 return drm_vma_node_offset_addr(&bo
->bo
.vma_node
);
639 ast_dumb_mmap_offset(struct drm_file
*file
,
640 struct drm_device
*dev
,
644 struct drm_gem_object
*obj
;
647 obj
= drm_gem_object_lookup(dev
, file
, handle
);
651 bo
= gem_to_ast_bo(obj
);
652 *offset
= ast_bo_mmap_offset(bo
);
654 drm_gem_object_unreference_unlocked(obj
);