drivers/net/wireless/rt2x00/rt2x00reg.h

   1 /*
   2         Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 /*
  20         Module: rt2x00
  21         Abstract: rt2x00 generic register information.
  22  */
  23
  24 #ifndef RT2X00REG_H
  25 #define RT2X00REG_H
  26
  27 /*
  28  * RX crypto status
  29  */
  30 enum rx_crypto {
  31         RX_CRYPTO_SUCCESS = 0,
  32         RX_CRYPTO_FAIL_ICV = 1,
  33         RX_CRYPTO_FAIL_MIC = 2,
  34         RX_CRYPTO_FAIL_KEY = 3,
  35 };
  36
  37 /*
  38  * Antenna values
  39  */
  40 enum antenna {
  41         ANTENNA_SW_DIVERSITY = 0,
  42         ANTENNA_A = 1,
  43         ANTENNA_B = 2,
  44         ANTENNA_HW_DIVERSITY = 3,
  45 };
  46
  47 /*
  48  * Led mode values.
  49  */
  50 enum led_mode {
  51         LED_MODE_DEFAULT = 0,
  52         LED_MODE_TXRX_ACTIVITY = 1,
  53         LED_MODE_SIGNAL_STRENGTH = 2,
  54         LED_MODE_ASUS = 3,
  55         LED_MODE_ALPHA = 4,
  56 };
  57
  58 /*
  59  * TSF sync values
  60  */
  61 enum tsf_sync {
  62         TSF_SYNC_NONE = 0,
  63         TSF_SYNC_INFRA = 1,
  64         TSF_SYNC_ADHOC = 2,
  65         TSF_SYNC_AP_NONE = 3,
  66 };
  67
  68 /*
  69  * Device states
  70  */
  71 enum dev_state {
  72         STATE_DEEP_SLEEP = 0,
  73         STATE_SLEEP = 1,
  74         STATE_STANDBY = 2,
  75         STATE_AWAKE = 3,
  76
  77 /*
  78  * Additional device states, these values are
  79  * not strict since they are not directly passed
  80  * into the device.
  81  */
  82         STATE_RADIO_ON,
  83         STATE_RADIO_OFF,
  84         STATE_RADIO_IRQ_ON,
  85         STATE_RADIO_IRQ_OFF,
  86 };
  87
  88 /*
  89  * IFS backoff values
  90  */
  91 enum ifs {
  92         IFS_BACKOFF = 0,
  93         IFS_SIFS = 1,
  94         IFS_NEW_BACKOFF = 2,
  95         IFS_NONE = 3,
  96 };
  97
  98 /*
  99  * IFS backoff values for HT devices
 100  */
 101 enum txop {
 102         TXOP_HTTXOP = 0,
 103         TXOP_PIFS = 1,
 104         TXOP_SIFS = 2,
 105         TXOP_BACKOFF = 3,
 106 };
 107
 108 /*
 109  * Cipher types for hardware encryption
 110  */
 111 enum cipher {
 112         CIPHER_NONE = 0,
 113         CIPHER_WEP64 = 1,
 114         CIPHER_WEP128 = 2,
 115         CIPHER_TKIP = 3,
 116         CIPHER_AES = 4,
 117 /*
 118  * The following fields were added by rt61pci and rt73usb.
 119  */
 120         CIPHER_CKIP64 = 5,
 121         CIPHER_CKIP128 = 6,
 122         CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
 123
 124 /*
 125  * Max cipher type.
 126  * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
 127  * are excluded due to limitations in mac80211.
 128  */
 129         CIPHER_MAX = 4,
 130 };
 131
 132 /*
 133  * Rate modulations
 134  */
 135 enum rate_modulation {
 136         RATE_MODE_CCK = 0,
 137         RATE_MODE_OFDM = 1,
 138         RATE_MODE_HT_MIX = 2,
 139         RATE_MODE_HT_GREENFIELD = 3,
 140 };
 141
 142 /*
 143  * Firmware validation error codes
 144  */
 145 enum firmware_errors {
 146         FW_OK,
 147         FW_BAD_CRC,
 148         FW_BAD_LENGTH,
 149         FW_BAD_VERSION,
 150 };
 151
 152 /*
 153  * Register handlers.
 154  * We store the position of a register field inside a field structure,
 155  * This will simplify the process of setting and reading a certain field
 156  * inside the register while making sure the process remains byte order safe.
 157  */
 158 struct rt2x00_field8 {
 159         u8 bit_offset;
 160         u8 bit_mask;
 161 };
 162
 163 struct rt2x00_field16 {
 164         u16 bit_offset;
 165         u16 bit_mask;
 166 };
 167
 168 struct rt2x00_field32 {
 169         u32 bit_offset;
 170         u32 bit_mask;
 171 };
 172
 173 /*
 174  * Power of two check, this will check
 175  * if the mask that has been given contains and contiguous set of bits.
 176  * Note that we cannot use the is_power_of_2() function since this
 177  * check must be done at compile-time.
 178  */
 179 #define is_power_of_two(x)      ( !((x) & ((x)-1)) )
 180 #define low_bit_mask(x)         ( ((x)-1) & ~(x) )
 181 #define is_valid_mask(x)        is_power_of_two(1LU + (x) + low_bit_mask(x))
 182
 183 /*
 184  * Macros to find first set bit in a variable.
 185  * These macros behave the same as the __ffs() functions but
 186  * the most important difference that this is done during
 187  * compile-time rather then run-time.
 188  */
 189 #define compile_ffs2(__x) \
 190         __builtin_choose_expr(((__x) & 0x1), 0, 1)
 191
 192 #define compile_ffs4(__x) \
 193         __builtin_choose_expr(((__x) & 0x3), \
 194                               (compile_ffs2((__x))), \
 195                               (compile_ffs2((__x) >> 2) + 2))
 196
 197 #define compile_ffs8(__x) \
 198         __builtin_choose_expr(((__x) & 0xf), \
 199                               (compile_ffs4((__x))), \
 200                               (compile_ffs4((__x) >> 4) + 4))
 201
 202 #define compile_ffs16(__x) \
 203         __builtin_choose_expr(((__x) & 0xff), \
 204                               (compile_ffs8((__x))), \
 205                               (compile_ffs8((__x) >> 8) + 8))
 206
 207 #define compile_ffs32(__x) \
 208         __builtin_choose_expr(((__x) & 0xffff), \
 209                               (compile_ffs16((__x))), \
 210                               (compile_ffs16((__x) >> 16) + 16))
 211
 212 /*
 213  * This macro will check the requirements for the FIELD{8,16,32} macros
 214  * The mask should be a constant non-zero contiguous set of bits which
 215  * does not exceed the given typelimit.
 216  */
 217 #define FIELD_CHECK(__mask, __type)                     \
 218         BUILD_BUG_ON(!(__mask) ||                       \
 219                      !is_valid_mask(__mask) ||          \
 220                      (__mask) != (__type)(__mask))      \
 221
 222 #define FIELD8(__mask)                          \
 223 ({                                              \
 224         FIELD_CHECK(__mask, u8);                \
 225         (struct rt2x00_field8) {                \
 226                 compile_ffs8(__mask), (__mask)  \
 227         };                                      \
 228 })
 229
 230 #define FIELD16(__mask)                         \
 231 ({                                              \
 232         FIELD_CHECK(__mask, u16);               \
 233         (struct rt2x00_field16) {               \
 234                 compile_ffs16(__mask), (__mask) \
 235         };                                      \
 236 })
 237
 238 #define FIELD32(__mask)                         \
 239 ({                                              \
 240         FIELD_CHECK(__mask, u32);               \
 241         (struct rt2x00_field32) {               \
 242                 compile_ffs32(__mask), (__mask) \
 243         };                                      \
 244 })
 245
 246 #define SET_FIELD(__reg, __type, __field, __value)\
 247 ({                                              \
 248         typecheck(__type, __field);             \
 249         *(__reg) &= ~((__field).bit_mask);      \
 250         *(__reg) |= ((__value) <<               \
 251             ((__field).bit_offset)) &           \
 252             ((__field).bit_mask);               \
 253 })
 254
 255 #define GET_FIELD(__reg, __type, __field)       \
 256 ({                                              \
 257         typecheck(__type, __field);             \
 258         ((__reg) & ((__field).bit_mask)) >>     \
 259             ((__field).bit_offset);             \
 260 })
 261
 262 #define rt2x00_set_field32(__reg, __field, __value) \
 263         SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
 264 #define rt2x00_get_field32(__reg, __field) \
 265         GET_FIELD(__reg, struct rt2x00_field32, __field)
 266
 267 #define rt2x00_set_field16(__reg, __field, __value) \
 268         SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
 269 #define rt2x00_get_field16(__reg, __field) \
 270         GET_FIELD(__reg, struct rt2x00_field16, __field)
 271
 272 #define rt2x00_set_field8(__reg, __field, __value) \
 273         SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
 274 #define rt2x00_get_field8(__reg, __field) \
 275         GET_FIELD(__reg, struct rt2x00_field8, __field)
 276
 277 #endif /* RT2X00REG_H */