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vdso: don't require 64-bit math in standalone test
[linux/fpc-iii.git] / drivers / iio / gyro / bmg160.c
blob1f967e0d688e47a084f29e2b484621016ada7c3c
1 /*
2 * BMG160 Gyro Sensor driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 #include <linux/module.h>
16 #include <linux/i2c.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/slab.h>
20 #include <linux/acpi.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/pm.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/iio/iio.h>
25 #include <linux/iio/sysfs.h>
26 #include <linux/iio/buffer.h>
27 #include <linux/iio/trigger.h>
28 #include <linux/iio/events.h>
29 #include <linux/iio/trigger_consumer.h>
30 #include <linux/iio/triggered_buffer.h>
31
32 #define BMG160_DRV_NAME "bmg160"
33 #define BMG160_IRQ_NAME "bmg160_event"
34 #define BMG160_GPIO_NAME "gpio_int"
35
36 #define BMG160_REG_CHIP_ID 0x00
37 #define BMG160_CHIP_ID_VAL 0x0F
38
39 #define BMG160_REG_PMU_LPW 0x11
40 #define BMG160_MODE_NORMAL 0x00
41 #define BMG160_MODE_DEEP_SUSPEND 0x20
42 #define BMG160_MODE_SUSPEND 0x80
43
44 #define BMG160_REG_RANGE 0x0F
45
46 #define BMG160_RANGE_2000DPS 0
47 #define BMG160_RANGE_1000DPS 1
48 #define BMG160_RANGE_500DPS 2
49 #define BMG160_RANGE_250DPS 3
50 #define BMG160_RANGE_125DPS 4
51
52 #define BMG160_REG_PMU_BW 0x10
53 #define BMG160_NO_FILTER 0
54 #define BMG160_DEF_BW 100
55
56 #define BMG160_REG_INT_MAP_0 0x17
57 #define BMG160_INT_MAP_0_BIT_ANY BIT(1)
58
59 #define BMG160_REG_INT_MAP_1 0x18
60 #define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0)
61
62 #define BMG160_REG_INT_RST_LATCH 0x21
63 #define BMG160_INT_MODE_LATCH_RESET 0x80
64 #define BMG160_INT_MODE_LATCH_INT 0x0F
65 #define BMG160_INT_MODE_NON_LATCH_INT 0x00
66
67 #define BMG160_REG_INT_EN_0 0x15
68 #define BMG160_DATA_ENABLE_INT BIT(7)
69
70 #define BMG160_REG_XOUT_L 0x02
71 #define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2))
72
73 #define BMG160_REG_SLOPE_THRES 0x1B
74 #define BMG160_SLOPE_THRES_MASK 0x0F
75
76 #define BMG160_REG_MOTION_INTR 0x1C
77 #define BMG160_INT_MOTION_X BIT(0)
78 #define BMG160_INT_MOTION_Y BIT(1)
79 #define BMG160_INT_MOTION_Z BIT(2)
80 #define BMG160_ANY_DUR_MASK 0x30
81 #define BMG160_ANY_DUR_SHIFT 4
82
83 #define BMG160_REG_INT_STATUS_2 0x0B
84 #define BMG160_ANY_MOTION_MASK 0x07
85
86 #define BMG160_REG_TEMP 0x08
87 #define BMG160_TEMP_CENTER_VAL 23
88
89 #define BMG160_MAX_STARTUP_TIME_MS 80
90
91 #define BMG160_AUTO_SUSPEND_DELAY_MS 2000
92
93 struct bmg160_data {
94 struct i2c_client *client;
95 struct iio_trigger *dready_trig;
96 struct iio_trigger *motion_trig;
97 struct mutex mutex;
98 s16 buffer[8];
99 u8 bw_bits;
100 u32 dps_range;
101 int ev_enable_state;
102 int slope_thres;
103 bool dready_trigger_on;
104 bool motion_trigger_on;
105 int64_t timestamp;
106 };
107
108 enum bmg160_axis {
109 AXIS_X,
110 AXIS_Y,
111 AXIS_Z,
112 };
113
114 static const struct {
115 int val;
116 int bw_bits;
117 } bmg160_samp_freq_table[] = { {100, 0x07},
118 {200, 0x06},
119 {400, 0x03},
120 {1000, 0x02},
121 {2000, 0x01} };
122
123 static const struct {
124 int scale;
125 int dps_range;
126 } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
127 { 532, BMG160_RANGE_1000DPS},
128 { 266, BMG160_RANGE_500DPS},
129 { 133, BMG160_RANGE_250DPS},
130 { 66, BMG160_RANGE_125DPS} };
131
132 static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
133 {
134 int ret;
135
136 ret = i2c_smbus_write_byte_data(data->client,
137 BMG160_REG_PMU_LPW, mode);
138 if (ret < 0) {
139 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
140 return ret;
141 }
142
143 return 0;
144 }
145
146 static int bmg160_convert_freq_to_bit(int val)
147 {
148 int i;
149
150 for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
151 if (bmg160_samp_freq_table[i].val == val)
152 return bmg160_samp_freq_table[i].bw_bits;
153 }
154
155 return -EINVAL;
156 }
157
158 static int bmg160_set_bw(struct bmg160_data *data, int val)
159 {
160 int ret;
161 int bw_bits;
162
163 bw_bits = bmg160_convert_freq_to_bit(val);
164 if (bw_bits < 0)
165 return bw_bits;
166
167 ret = i2c_smbus_write_byte_data(data->client, BMG160_REG_PMU_BW,
168 bw_bits);
169 if (ret < 0) {
170 dev_err(&data->client->dev, "Error writing reg_pmu_bw\n");
171 return ret;
172 }
173
174 data->bw_bits = bw_bits;
175
176 return 0;
177 }
178
179 static int bmg160_chip_init(struct bmg160_data *data)
180 {
181 int ret;
182
183 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_CHIP_ID);
184 if (ret < 0) {
185 dev_err(&data->client->dev, "Error reading reg_chip_id\n");
186 return ret;
187 }
188
189 dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
190 if (ret != BMG160_CHIP_ID_VAL) {
191 dev_err(&data->client->dev, "invalid chip %x\n", ret);
192 return -ENODEV;
193 }
194
195 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
196 if (ret < 0)
197 return ret;
198
199 /* Wait upto 500 ms to be ready after changing mode */
200 usleep_range(500, 1000);
201
202 /* Set Bandwidth */
203 ret = bmg160_set_bw(data, BMG160_DEF_BW);
204 if (ret < 0)
205 return ret;
206
207 /* Set Default Range */
208 ret = i2c_smbus_write_byte_data(data->client,
209 BMG160_REG_RANGE,
210 BMG160_RANGE_500DPS);
211 if (ret < 0) {
212 dev_err(&data->client->dev, "Error writing reg_range\n");
213 return ret;
214 }
215 data->dps_range = BMG160_RANGE_500DPS;
216
217 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_SLOPE_THRES);
218 if (ret < 0) {
219 dev_err(&data->client->dev, "Error reading reg_slope_thres\n");
220 return ret;
221 }
222 data->slope_thres = ret;
223
224 /* Set default interrupt mode */
225 ret = i2c_smbus_write_byte_data(data->client,
226 BMG160_REG_INT_RST_LATCH,
227 BMG160_INT_MODE_LATCH_INT |
228 BMG160_INT_MODE_LATCH_RESET);
229 if (ret < 0) {
230 dev_err(&data->client->dev,
231 "Error writing reg_motion_intr\n");
232 return ret;
233 }
234
235 return 0;
236 }
237
238 static int bmg160_set_power_state(struct bmg160_data *data, bool on)
239 {
240 #ifdef CONFIG_PM_RUNTIME
241 int ret;
242
243 if (on)
244 ret = pm_runtime_get_sync(&data->client->dev);
245 else {
246 pm_runtime_mark_last_busy(&data->client->dev);
247 ret = pm_runtime_put_autosuspend(&data->client->dev);
248 }
249
250 if (ret < 0) {
251 dev_err(&data->client->dev,
252 "Failed: bmg160_set_power_state for %d\n", on);
253 return ret;
254 }
255 #endif
256
257 return 0;
258 }
259
260 static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
261 bool status)
262 {
263 int ret;
264
265 /* Enable/Disable INT_MAP0 mapping */
266 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_0);
267 if (ret < 0) {
268 dev_err(&data->client->dev, "Error reading reg_int_map0\n");
269 return ret;
270 }
271 if (status)
272 ret |= BMG160_INT_MAP_0_BIT_ANY;
273 else
274 ret &= ~BMG160_INT_MAP_0_BIT_ANY;
275
276 ret = i2c_smbus_write_byte_data(data->client,
277 BMG160_REG_INT_MAP_0,
278 ret);
279 if (ret < 0) {
280 dev_err(&data->client->dev, "Error writing reg_int_map0\n");
281 return ret;
282 }
283
284 /* Enable/Disable slope interrupts */
285 if (status) {
286 /* Update slope thres */
287 ret = i2c_smbus_write_byte_data(data->client,
288 BMG160_REG_SLOPE_THRES,
289 data->slope_thres);
290 if (ret < 0) {
291 dev_err(&data->client->dev,
292 "Error writing reg_slope_thres\n");
293 return ret;
294 }
295
296 ret = i2c_smbus_write_byte_data(data->client,
297 BMG160_REG_MOTION_INTR,
298 BMG160_INT_MOTION_X |
299 BMG160_INT_MOTION_Y |
300 BMG160_INT_MOTION_Z);
301 if (ret < 0) {
302 dev_err(&data->client->dev,
303 "Error writing reg_motion_intr\n");
304 return ret;
305 }
306
307 /*
308 * New data interrupt is always non-latched,
309 * which will have higher priority, so no need
310 * to set latched mode, we will be flooded anyway with INTR
311 */
312 if (!data->dready_trigger_on) {
313 ret = i2c_smbus_write_byte_data(data->client,
314 BMG160_REG_INT_RST_LATCH,
315 BMG160_INT_MODE_LATCH_INT |
316 BMG160_INT_MODE_LATCH_RESET);
317 if (ret < 0) {
318 dev_err(&data->client->dev,
319 "Error writing reg_rst_latch\n");
320 return ret;
321 }
322 }
323
324 ret = i2c_smbus_write_byte_data(data->client,
325 BMG160_REG_INT_EN_0,
326 BMG160_DATA_ENABLE_INT);
327
328 } else
329 ret = i2c_smbus_write_byte_data(data->client,
330 BMG160_REG_INT_EN_0,
331 0);
332
333 if (ret < 0) {
334 dev_err(&data->client->dev, "Error writing reg_int_en0\n");
335 return ret;
336 }
337
338 return 0;
339 }
340
341 static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
342 bool status)
343 {
344 int ret;
345
346 /* Enable/Disable INT_MAP1 mapping */
347 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_1);
348 if (ret < 0) {
349 dev_err(&data->client->dev, "Error reading reg_int_map1\n");
350 return ret;
351 }
352
353 if (status)
354 ret |= BMG160_INT_MAP_1_BIT_NEW_DATA;
355 else
356 ret &= ~BMG160_INT_MAP_1_BIT_NEW_DATA;
357
358 ret = i2c_smbus_write_byte_data(data->client,
359 BMG160_REG_INT_MAP_1,
360 ret);
361 if (ret < 0) {
362 dev_err(&data->client->dev, "Error writing reg_int_map1\n");
363 return ret;
364 }
365
366 if (status) {
367 ret = i2c_smbus_write_byte_data(data->client,
368 BMG160_REG_INT_RST_LATCH,
369 BMG160_INT_MODE_NON_LATCH_INT |
370 BMG160_INT_MODE_LATCH_RESET);
371 if (ret < 0) {
372 dev_err(&data->client->dev,
373 "Error writing reg_rst_latch\n");
374 return ret;
375 }
376
377 ret = i2c_smbus_write_byte_data(data->client,
378 BMG160_REG_INT_EN_0,
379 BMG160_DATA_ENABLE_INT);
380
381 } else {
382 /* Restore interrupt mode */
383 ret = i2c_smbus_write_byte_data(data->client,
384 BMG160_REG_INT_RST_LATCH,
385 BMG160_INT_MODE_LATCH_INT |
386 BMG160_INT_MODE_LATCH_RESET);
387 if (ret < 0) {
388 dev_err(&data->client->dev,
389 "Error writing reg_rst_latch\n");
390 return ret;
391 }
392
393 ret = i2c_smbus_write_byte_data(data->client,
394 BMG160_REG_INT_EN_0,
395 0);
396 }
397
398 if (ret < 0) {
399 dev_err(&data->client->dev, "Error writing reg_int_en0\n");
400 return ret;
401 }
402
403 return 0;
404 }
405
406 static int bmg160_get_bw(struct bmg160_data *data, int *val)
407 {
408 int i;
409
410 for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
411 if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) {
412 *val = bmg160_samp_freq_table[i].val;
413 return IIO_VAL_INT;
414 }
415 }
416
417 return -EINVAL;
418 }
419
420 static int bmg160_set_scale(struct bmg160_data *data, int val)
421 {
422 int ret, i;
423
424 for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
425 if (bmg160_scale_table[i].scale == val) {
426 ret = i2c_smbus_write_byte_data(
427 data->client,
428 BMG160_REG_RANGE,
429 bmg160_scale_table[i].dps_range);
430 if (ret < 0) {
431 dev_err(&data->client->dev,
432 "Error writing reg_range\n");
433 return ret;
434 }
435 data->dps_range = bmg160_scale_table[i].dps_range;
436 return 0;
437 }
438 }
439
440 return -EINVAL;
441 }
442
443 static int bmg160_get_temp(struct bmg160_data *data, int *val)
444 {
445 int ret;
446
447 mutex_lock(&data->mutex);
448 ret = bmg160_set_power_state(data, true);
449 if (ret < 0) {
450 mutex_unlock(&data->mutex);
451 return ret;
452 }
453
454 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_TEMP);
455 if (ret < 0) {
456 dev_err(&data->client->dev, "Error reading reg_temp\n");
457 bmg160_set_power_state(data, false);
458 mutex_unlock(&data->mutex);
459 return ret;
460 }
461
462 *val = sign_extend32(ret, 7);
463 ret = bmg160_set_power_state(data, false);
464 mutex_unlock(&data->mutex);
465 if (ret < 0)
466 return ret;
467
468 return IIO_VAL_INT;
469 }
470
471 static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
472 {
473 int ret;
474
475 mutex_lock(&data->mutex);
476 ret = bmg160_set_power_state(data, true);
477 if (ret < 0) {
478 mutex_unlock(&data->mutex);
479 return ret;
480 }
481
482 ret = i2c_smbus_read_word_data(data->client, BMG160_AXIS_TO_REG(axis));
483 if (ret < 0) {
484 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
485 bmg160_set_power_state(data, false);
486 mutex_unlock(&data->mutex);
487 return ret;
488 }
489
490 *val = sign_extend32(ret, 15);
491 ret = bmg160_set_power_state(data, false);
492 mutex_unlock(&data->mutex);
493 if (ret < 0)
494 return ret;
495
496 return IIO_VAL_INT;
497 }
498
499 static int bmg160_read_raw(struct iio_dev *indio_dev,
500 struct iio_chan_spec const *chan,
501 int *val, int *val2, long mask)
502 {
503 struct bmg160_data *data = iio_priv(indio_dev);
504 int ret;
505
506 switch (mask) {
507 case IIO_CHAN_INFO_RAW:
508 switch (chan->type) {
509 case IIO_TEMP:
510 return bmg160_get_temp(data, val);
511 case IIO_ANGL_VEL:
512 if (iio_buffer_enabled(indio_dev))
513 return -EBUSY;
514 else
515 return bmg160_get_axis(data, chan->scan_index,
516 val);
517 default:
518 return -EINVAL;
519 }
520 case IIO_CHAN_INFO_OFFSET:
521 if (chan->type == IIO_TEMP) {
522 *val = BMG160_TEMP_CENTER_VAL;
523 return IIO_VAL_INT;
524 } else
525 return -EINVAL;
526 case IIO_CHAN_INFO_SCALE:
527 *val = 0;
528 switch (chan->type) {
529 case IIO_TEMP:
530 *val2 = 500000;
531 return IIO_VAL_INT_PLUS_MICRO;
532 case IIO_ANGL_VEL:
533 {
534 int i;
535
536 for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
537 if (bmg160_scale_table[i].dps_range ==
538 data->dps_range) {
539 *val2 = bmg160_scale_table[i].scale;
540 return IIO_VAL_INT_PLUS_MICRO;
541 }
542 }
543 return -EINVAL;
544 }
545 default:
546 return -EINVAL;
547 }
548 case IIO_CHAN_INFO_SAMP_FREQ:
549 *val2 = 0;
550 mutex_lock(&data->mutex);
551 ret = bmg160_get_bw(data, val);
552 mutex_unlock(&data->mutex);
553 return ret;
554 default:
555 return -EINVAL;
556 }
557 }
558
559 static int bmg160_write_raw(struct iio_dev *indio_dev,
560 struct iio_chan_spec const *chan,
561 int val, int val2, long mask)
562 {
563 struct bmg160_data *data = iio_priv(indio_dev);
564 int ret;
565
566 switch (mask) {
567 case IIO_CHAN_INFO_SAMP_FREQ:
568 mutex_lock(&data->mutex);
569 /*
570 * Section 4.2 of spec
571 * In suspend mode, the only supported operations are reading
572 * registers as well as writing to the (0x14) softreset
573 * register. Since we will be in suspend mode by default, change
574 * mode to power on for other writes.
575 */
576 ret = bmg160_set_power_state(data, true);
577 if (ret < 0) {
578 mutex_unlock(&data->mutex);
579 return ret;
580 }
581 ret = bmg160_set_bw(data, val);
582 if (ret < 0) {
583 bmg160_set_power_state(data, false);
584 mutex_unlock(&data->mutex);
585 return ret;
586 }
587 ret = bmg160_set_power_state(data, false);
588 mutex_unlock(&data->mutex);
589 return ret;
590 case IIO_CHAN_INFO_SCALE:
591 if (val)
592 return -EINVAL;
593
594 mutex_lock(&data->mutex);
595 /* Refer to comments above for the suspend mode ops */
596 ret = bmg160_set_power_state(data, true);
597 if (ret < 0) {
598 mutex_unlock(&data->mutex);
599 return ret;
600 }
601 ret = bmg160_set_scale(data, val2);
602 if (ret < 0) {
603 bmg160_set_power_state(data, false);
604 mutex_unlock(&data->mutex);
605 return ret;
606 }
607 ret = bmg160_set_power_state(data, false);
608 mutex_unlock(&data->mutex);
609 return ret;
610 default:
611 return -EINVAL;
612 }
613
614 return -EINVAL;
615 }
616
617 static int bmg160_read_event(struct iio_dev *indio_dev,
618 const struct iio_chan_spec *chan,
619 enum iio_event_type type,
620 enum iio_event_direction dir,
621 enum iio_event_info info,
622 int *val, int *val2)
623 {
624 struct bmg160_data *data = iio_priv(indio_dev);
625
626 *val2 = 0;
627 switch (info) {
628 case IIO_EV_INFO_VALUE:
629 *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
630 break;
631 default:
632 return -EINVAL;
633 }
634
635 return IIO_VAL_INT;
636 }
637
638 static int bmg160_write_event(struct iio_dev *indio_dev,
639 const struct iio_chan_spec *chan,
640 enum iio_event_type type,
641 enum iio_event_direction dir,
642 enum iio_event_info info,
643 int val, int val2)
644 {
645 struct bmg160_data *data = iio_priv(indio_dev);
646
647 switch (info) {
648 case IIO_EV_INFO_VALUE:
649 if (data->ev_enable_state)
650 return -EBUSY;
651 data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
652 data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
653 break;
654 default:
655 return -EINVAL;
656 }
657
658 return 0;
659 }
660
661 static int bmg160_read_event_config(struct iio_dev *indio_dev,
662 const struct iio_chan_spec *chan,
663 enum iio_event_type type,
664 enum iio_event_direction dir)
665 {
666
667 struct bmg160_data *data = iio_priv(indio_dev);
668
669 return data->ev_enable_state;
670 }
671
672 static int bmg160_write_event_config(struct iio_dev *indio_dev,
673 const struct iio_chan_spec *chan,
674 enum iio_event_type type,
675 enum iio_event_direction dir,
676 int state)
677 {
678 struct bmg160_data *data = iio_priv(indio_dev);
679 int ret;
680
681 if (state && data->ev_enable_state)
682 return 0;
683
684 mutex_lock(&data->mutex);
685
686 if (!state && data->motion_trigger_on) {
687 data->ev_enable_state = 0;
688 mutex_unlock(&data->mutex);
689 return 0;
690 }
691 /*
692 * We will expect the enable and disable to do operation in
693 * in reverse order. This will happen here anyway as our
694 * resume operation uses sync mode runtime pm calls, the
695 * suspend operation will be delayed by autosuspend delay
696 * So the disable operation will still happen in reverse of
697 * enable operation. When runtime pm is disabled the mode
698 * is always on so sequence doesn't matter
699 */
700 ret = bmg160_set_power_state(data, state);
701 if (ret < 0) {
702 mutex_unlock(&data->mutex);
703 return ret;
704 }
705
706 ret = bmg160_setup_any_motion_interrupt(data, state);
707 if (ret < 0) {
708 mutex_unlock(&data->mutex);
709 return ret;
710 }
711
712 data->ev_enable_state = state;
713 mutex_unlock(&data->mutex);
714
715 return 0;
716 }
717
718 static int bmg160_validate_trigger(struct iio_dev *indio_dev,
719 struct iio_trigger *trig)
720 {
721 struct bmg160_data *data = iio_priv(indio_dev);
722
723 if (data->dready_trig != trig && data->motion_trig != trig)
724 return -EINVAL;
725
726 return 0;
727 }
728
729 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
730
731 static IIO_CONST_ATTR(in_anglvel_scale_available,
732 "0.001065 0.000532 0.000266 0.000133 0.000066");
733
734 static struct attribute *bmg160_attributes[] = {
735 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
736 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
737 NULL,
738 };
739
740 static const struct attribute_group bmg160_attrs_group = {
741 .attrs = bmg160_attributes,
742 };
743
744 static const struct iio_event_spec bmg160_event = {
745 .type = IIO_EV_TYPE_ROC,
746 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
747 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
748 BIT(IIO_EV_INFO_ENABLE)
749 };
750
751 #define BMG160_CHANNEL(_axis) { \
752 .type = IIO_ANGL_VEL, \
753 .modified = 1, \
754 .channel2 = IIO_MOD_##_axis, \
755 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
756 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
757 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
758 .scan_index = AXIS_##_axis, \
759 .scan_type = { \
760 .sign = 's', \
761 .realbits = 16, \
762 .storagebits = 16, \
763 }, \
764 .event_spec = &bmg160_event, \
765 .num_event_specs = 1 \
766 }
767
768 static const struct iio_chan_spec bmg160_channels[] = {
769 {
770 .type = IIO_TEMP,
771 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
772 BIT(IIO_CHAN_INFO_SCALE) |
773 BIT(IIO_CHAN_INFO_OFFSET),
774 .scan_index = -1,
775 },
776 BMG160_CHANNEL(X),
777 BMG160_CHANNEL(Y),
778 BMG160_CHANNEL(Z),
779 IIO_CHAN_SOFT_TIMESTAMP(3),
780 };
781
782 static const struct iio_info bmg160_info = {
783 .attrs = &bmg160_attrs_group,
784 .read_raw = bmg160_read_raw,
785 .write_raw = bmg160_write_raw,
786 .read_event_value = bmg160_read_event,
787 .write_event_value = bmg160_write_event,
788 .write_event_config = bmg160_write_event_config,
789 .read_event_config = bmg160_read_event_config,
790 .validate_trigger = bmg160_validate_trigger,
791 .driver_module = THIS_MODULE,
792 };
793
794 static irqreturn_t bmg160_trigger_handler(int irq, void *p)
795 {
796 struct iio_poll_func *pf = p;
797 struct iio_dev *indio_dev = pf->indio_dev;
798 struct bmg160_data *data = iio_priv(indio_dev);
799 int bit, ret, i = 0;
800
801 mutex_lock(&data->mutex);
802 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
803 indio_dev->masklength) {
804 ret = i2c_smbus_read_word_data(data->client,
805 BMG160_AXIS_TO_REG(bit));
806 if (ret < 0) {
807 mutex_unlock(&data->mutex);
808 goto err;
809 }
810 data->buffer[i++] = ret;
811 }
812 mutex_unlock(&data->mutex);
813
814 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
815 data->timestamp);
816 err:
817 iio_trigger_notify_done(indio_dev->trig);
818
819 return IRQ_HANDLED;
820 }
821
822 static int bmg160_trig_try_reen(struct iio_trigger *trig)
823 {
824 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
825 struct bmg160_data *data = iio_priv(indio_dev);
826 int ret;
827
828 /* new data interrupts don't need ack */
829 if (data->dready_trigger_on)
830 return 0;
831
832 /* Set latched mode interrupt and clear any latched interrupt */
833 ret = i2c_smbus_write_byte_data(data->client,
834 BMG160_REG_INT_RST_LATCH,
835 BMG160_INT_MODE_LATCH_INT |
836 BMG160_INT_MODE_LATCH_RESET);
837 if (ret < 0) {
838 dev_err(&data->client->dev, "Error writing reg_rst_latch\n");
839 return ret;
840 }
841
842 return 0;
843 }
844
845 static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
846 bool state)
847 {
848 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
849 struct bmg160_data *data = iio_priv(indio_dev);
850 int ret;
851
852 mutex_lock(&data->mutex);
853
854 if (!state && data->ev_enable_state && data->motion_trigger_on) {
855 data->motion_trigger_on = false;
856 mutex_unlock(&data->mutex);
857 return 0;
858 }
859
860 /*
861 * Refer to comment in bmg160_write_event_config for
862 * enable/disable operation order
863 */
864 ret = bmg160_set_power_state(data, state);
865 if (ret < 0) {
866 mutex_unlock(&data->mutex);
867 return ret;
868 }
869 if (data->motion_trig == trig)
870 ret = bmg160_setup_any_motion_interrupt(data, state);
871 else
872 ret = bmg160_setup_new_data_interrupt(data, state);
873 if (ret < 0) {
874 mutex_unlock(&data->mutex);
875 return ret;
876 }
877 if (data->motion_trig == trig)
878 data->motion_trigger_on = state;
879 else
880 data->dready_trigger_on = state;
881
882 mutex_unlock(&data->mutex);
883
884 return 0;
885 }
886
887 static const struct iio_trigger_ops bmg160_trigger_ops = {
888 .set_trigger_state = bmg160_data_rdy_trigger_set_state,
889 .try_reenable = bmg160_trig_try_reen,
890 .owner = THIS_MODULE,
891 };
892
893 static irqreturn_t bmg160_event_handler(int irq, void *private)
894 {
895 struct iio_dev *indio_dev = private;
896 struct bmg160_data *data = iio_priv(indio_dev);
897 int ret;
898 int dir;
899
900 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_STATUS_2);
901 if (ret < 0) {
902 dev_err(&data->client->dev, "Error reading reg_int_status2\n");
903 goto ack_intr_status;
904 }
905
906 if (ret & 0x08)
907 dir = IIO_EV_DIR_RISING;
908 else
909 dir = IIO_EV_DIR_FALLING;
910
911 if (ret & BMG160_ANY_MOTION_MASK)
912 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
913 0,
914 IIO_MOD_X_OR_Y_OR_Z,
915 IIO_EV_TYPE_ROC,
916 dir),
917 data->timestamp);
918
919 ack_intr_status:
920 if (!data->dready_trigger_on) {
921 ret = i2c_smbus_write_byte_data(data->client,
922 BMG160_REG_INT_RST_LATCH,
923 BMG160_INT_MODE_LATCH_INT |
924 BMG160_INT_MODE_LATCH_RESET);
925 if (ret < 0)
926 dev_err(&data->client->dev,
927 "Error writing reg_rst_latch\n");
928 }
929
930 return IRQ_HANDLED;
931 }
932
933 static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
934 {
935 struct iio_dev *indio_dev = private;
936 struct bmg160_data *data = iio_priv(indio_dev);
937
938 data->timestamp = iio_get_time_ns();
939
940 if (data->dready_trigger_on)
941 iio_trigger_poll(data->dready_trig);
942 else if (data->motion_trigger_on)
943 iio_trigger_poll(data->motion_trig);
944
945 if (data->ev_enable_state)
946 return IRQ_WAKE_THREAD;
947 else
948 return IRQ_HANDLED;
949
950 }
951
952 static int bmg160_gpio_probe(struct i2c_client *client,
953 struct bmg160_data *data)
954
955 {
956 struct device *dev;
957 struct gpio_desc *gpio;
958 int ret;
959
960 if (!client)
961 return -EINVAL;
962
963 dev = &client->dev;
964
965 /* data ready gpio interrupt pin */
966 gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0);
967 if (IS_ERR(gpio)) {
968 dev_err(dev, "acpi gpio get index failed\n");
969 return PTR_ERR(gpio);
970 }
971
972 ret = gpiod_direction_input(gpio);
973 if (ret)
974 return ret;
975
976 ret = gpiod_to_irq(gpio);
977
978 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
979
980 return ret;
981 }
982
983 static const char *bmg160_match_acpi_device(struct device *dev)
984 {
985 const struct acpi_device_id *id;
986
987 id = acpi_match_device(dev->driver->acpi_match_table, dev);
988 if (!id)
989 return NULL;
990
991 return dev_name(dev);
992 }
993
994 static int bmg160_probe(struct i2c_client *client,
995 const struct i2c_device_id *id)
996 {
997 struct bmg160_data *data;
998 struct iio_dev *indio_dev;
999 int ret;
1000 const char *name = NULL;
1001
1002 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1003 if (!indio_dev)
1004 return -ENOMEM;
1005
1006 data = iio_priv(indio_dev);
1007 i2c_set_clientdata(client, indio_dev);
1008 data->client = client;
1009
1010 ret = bmg160_chip_init(data);
1011 if (ret < 0)
1012 return ret;
1013
1014 mutex_init(&data->mutex);
1015
1016 if (id)
1017 name = id->name;
1018
1019 if (ACPI_HANDLE(&client->dev))
1020 name = bmg160_match_acpi_device(&client->dev);
1021
1022 indio_dev->dev.parent = &client->dev;
1023 indio_dev->channels = bmg160_channels;
1024 indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
1025 indio_dev->name = name;
1026 indio_dev->modes = INDIO_DIRECT_MODE;
1027 indio_dev->info = &bmg160_info;
1028
1029 if (client->irq <= 0)
1030 client->irq = bmg160_gpio_probe(client, data);
1031
1032 if (client->irq > 0) {
1033 ret = devm_request_threaded_irq(&client->dev,
1034 client->irq,
1035 bmg160_data_rdy_trig_poll,
1036 bmg160_event_handler,
1037 IRQF_TRIGGER_RISING,
1038 BMG160_IRQ_NAME,
1039 indio_dev);
1040 if (ret)
1041 return ret;
1042
1043 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1044 "%s-dev%d",
1045 indio_dev->name,
1046 indio_dev->id);
1047 if (!data->dready_trig)
1048 return -ENOMEM;
1049
1050 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1051 "%s-any-motion-dev%d",
1052 indio_dev->name,
1053 indio_dev->id);
1054 if (!data->motion_trig)
1055 return -ENOMEM;
1056
1057 data->dready_trig->dev.parent = &client->dev;
1058 data->dready_trig->ops = &bmg160_trigger_ops;
1059 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1060 ret = iio_trigger_register(data->dready_trig);
1061 if (ret)
1062 return ret;
1063
1064 data->motion_trig->dev.parent = &client->dev;
1065 data->motion_trig->ops = &bmg160_trigger_ops;
1066 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1067 ret = iio_trigger_register(data->motion_trig);
1068 if (ret) {
1069 data->motion_trig = NULL;
1070 goto err_trigger_unregister;
1071 }
1072
1073 ret = iio_triggered_buffer_setup(indio_dev,
1074 NULL,
1075 bmg160_trigger_handler,
1076 NULL);
1077 if (ret < 0) {
1078 dev_err(&client->dev,
1079 "iio triggered buffer setup failed\n");
1080 goto err_trigger_unregister;
1081 }
1082 }
1083
1084 ret = iio_device_register(indio_dev);
1085 if (ret < 0) {
1086 dev_err(&client->dev, "unable to register iio device\n");
1087 goto err_buffer_cleanup;
1088 }
1089
1090 ret = pm_runtime_set_active(&client->dev);
1091 if (ret)
1092 goto err_iio_unregister;
1093
1094 pm_runtime_enable(&client->dev);
1095 pm_runtime_set_autosuspend_delay(&client->dev,
1096 BMG160_AUTO_SUSPEND_DELAY_MS);
1097 pm_runtime_use_autosuspend(&client->dev);
1098
1099 return 0;
1100
1101 err_iio_unregister:
1102 iio_device_unregister(indio_dev);
1103 err_buffer_cleanup:
1104 if (data->dready_trig)
1105 iio_triggered_buffer_cleanup(indio_dev);
1106 err_trigger_unregister:
1107 if (data->dready_trig)
1108 iio_trigger_unregister(data->dready_trig);
1109 if (data->motion_trig)
1110 iio_trigger_unregister(data->motion_trig);
1111
1112 return ret;
1113 }
1114
1115 static int bmg160_remove(struct i2c_client *client)
1116 {
1117 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1118 struct bmg160_data *data = iio_priv(indio_dev);
1119
1120 pm_runtime_disable(&client->dev);
1121 pm_runtime_set_suspended(&client->dev);
1122 pm_runtime_put_noidle(&client->dev);
1123
1124 iio_device_unregister(indio_dev);
1125
1126 if (data->dready_trig) {
1127 iio_triggered_buffer_cleanup(indio_dev);
1128 iio_trigger_unregister(data->dready_trig);
1129 iio_trigger_unregister(data->motion_trig);
1130 }
1131
1132 mutex_lock(&data->mutex);
1133 bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1134 mutex_unlock(&data->mutex);
1135
1136 return 0;
1137 }
1138
1139 #ifdef CONFIG_PM_SLEEP
1140 static int bmg160_suspend(struct device *dev)
1141 {
1142 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1143 struct bmg160_data *data = iio_priv(indio_dev);
1144
1145 mutex_lock(&data->mutex);
1146 bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1147 mutex_unlock(&data->mutex);
1148
1149 return 0;
1150 }
1151
1152 static int bmg160_resume(struct device *dev)
1153 {
1154 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1155 struct bmg160_data *data = iio_priv(indio_dev);
1156
1157 mutex_lock(&data->mutex);
1158 if (data->dready_trigger_on || data->motion_trigger_on ||
1159 data->ev_enable_state)
1160 bmg160_set_mode(data, BMG160_MODE_NORMAL);
1161 mutex_unlock(&data->mutex);
1162
1163 return 0;
1164 }
1165 #endif
1166
1167 #ifdef CONFIG_PM_RUNTIME
1168 static int bmg160_runtime_suspend(struct device *dev)
1169 {
1170 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1171 struct bmg160_data *data = iio_priv(indio_dev);
1172
1173 return bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1174 }
1175
1176 static int bmg160_runtime_resume(struct device *dev)
1177 {
1178 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1179 struct bmg160_data *data = iio_priv(indio_dev);
1180 int ret;
1181
1182 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1183 if (ret < 0)
1184 return ret;
1185
1186 msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1187
1188 return 0;
1189 }
1190 #endif
1191
1192 static const struct dev_pm_ops bmg160_pm_ops = {
1193 SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1194 SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1195 bmg160_runtime_resume, NULL)
1196 };
1197
1198 static const struct acpi_device_id bmg160_acpi_match[] = {
1199 {"BMG0160", 0},
1200 {"BMI055B", 0},
1201 {},
1202 };
1203
1204 MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
1205
1206 static const struct i2c_device_id bmg160_id[] = {
1207 {"bmg160", 0},
1208 {"bmi055_gyro", 0},
1209 {}
1210 };
1211
1212 MODULE_DEVICE_TABLE(i2c, bmg160_id);
1213
1214 static struct i2c_driver bmg160_driver = {
1215 .driver = {
1216 .name = BMG160_DRV_NAME,
1217 .acpi_match_table = ACPI_PTR(bmg160_acpi_match),
1218 .pm = &bmg160_pm_ops,
1219 },
1220 .probe = bmg160_probe,
1221 .remove = bmg160_remove,
1222 .id_table = bmg160_id,
1223 };
1224 module_i2c_driver(bmg160_driver);
1225
1226 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1227 MODULE_LICENSE("GPL v2");
1228 MODULE_DESCRIPTION("BMG160 Gyro driver");
Linux with added FPC-III support