i2c: gpio: fault-injector: refactor incomplete transfer
[linux/fpc-iii.git] / drivers / net / wireless / rsi / rsi_mgmt.h
blob14620935c925829548f11c9e1e20fd208661e0fa
1 /**
2 * Copyright (c) 2014 Redpine Signals Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #ifndef __RSI_MGMT_H__
18 #define __RSI_MGMT_H__
20 #include <linux/sort.h>
21 #include "rsi_boot_params.h"
22 #include "rsi_main.h"
24 #define MAX_MGMT_PKT_SIZE 512
25 #define RSI_NEEDED_HEADROOM 80
26 #define RSI_RCV_BUFFER_LEN 2000
28 #define RSI_11B_MODE 0
29 #define RSI_11G_MODE BIT(7)
30 #define RETRY_COUNT 8
31 #define RETRY_LONG 4
32 #define RETRY_SHORT 7
33 #define WMM_SHORT_SLOT_TIME 9
34 #define SIFS_DURATION 16
36 #define EAPOL4_PACKET_LEN 0x85
37 #define KEY_TYPE_CLEAR 0
38 #define RSI_PAIRWISE_KEY 1
39 #define RSI_GROUP_KEY 2
41 /* EPPROM_READ_ADDRESS */
42 #define WLAN_MAC_EEPROM_ADDR 40
43 #define WLAN_MAC_MAGIC_WORD_LEN 0x01
44 #define WLAN_HOST_MODE_LEN 0x04
45 #define WLAN_FW_VERSION_LEN 0x08
46 #define MAGIC_WORD 0x5A
47 #define WLAN_EEPROM_RFTYPE_ADDR 424
49 /*WOWLAN RESUME WAKEUP TYPES*/
50 #define RSI_UNICAST_MAGIC_PKT BIT(0)
51 #define RSI_BROADCAST_MAGICPKT BIT(1)
52 #define RSI_EAPOL_PKT BIT(2)
53 #define RSI_DISCONNECT_PKT BIT(3)
54 #define RSI_HW_BMISS_PKT BIT(4)
55 #define RSI_INSERT_SEQ_IN_FW BIT(2)
57 #define WOW_MAX_FILTERS_PER_LIST 16
58 #define WOW_PATTERN_SIZE 256
60 /* Receive Frame Types */
61 #define RSI_RX_DESC_MSG_TYPE_OFFSET 2
62 #define TA_CONFIRM_TYPE 0x01
63 #define RX_DOT11_MGMT 0x02
64 #define TX_STATUS_IND 0x04
65 #define BEACON_EVENT_IND 0x08
66 #define EAPOL4_CONFIRM 1
67 #define PROBEREQ_CONFIRM 2
68 #define CARD_READY_IND 0x00
69 #define SLEEP_NOTIFY_IND 0x06
70 #define RSI_TX_STATUS_TYPE 15
71 #define RSI_TX_STATUS 12
73 #define RSI_DELETE_PEER 0x0
74 #define RSI_ADD_PEER 0x1
75 #define START_AMPDU_AGGR 0x1
76 #define STOP_AMPDU_AGGR 0x0
77 #define INTERNAL_MGMT_PKT 0x99
79 #define PUT_BBP_RESET 0
80 #define BBP_REG_WRITE 0
81 #define RF_RESET_ENABLE BIT(3)
82 #define RATE_INFO_ENABLE BIT(0)
83 #define MORE_DATA_PRESENT BIT(1)
84 #define RSI_BROADCAST_PKT BIT(9)
85 #define RSI_DESC_REQUIRE_CFM_TO_HOST BIT(2)
86 #define RSI_ADD_DELTA_TSF_VAP_ID BIT(3)
87 #define RSI_FETCH_RETRY_CNT_FRM_HST BIT(4)
88 #define RSI_QOS_ENABLE BIT(12)
89 #define RSI_REKEY_PURPOSE BIT(13)
90 #define RSI_ENCRYPT_PKT BIT(15)
91 #define RSI_SET_PS_ENABLE BIT(12)
93 #define RSI_CMDDESC_40MHZ BIT(4)
94 #define RSI_CMDDESC_UPPER_20_ENABLE BIT(5)
95 #define RSI_CMDDESC_LOWER_20_ENABLE BIT(6)
96 #define RSI_CMDDESC_FULL_40_ENABLE (BIT(5) | BIT(6))
97 #define UPPER_20_ENABLE (0x2 << 12)
98 #define LOWER_20_ENABLE (0x4 << 12)
99 #define FULL40M_ENABLE 0x6
101 #define RSI_LMAC_CLOCK_80MHZ 0x1
102 #define RSI_ENABLE_40MHZ (0x1 << 3)
103 #define ENABLE_SHORTGI_RATE BIT(9)
105 #define RX_BA_INDICATION 1
106 #define RSI_TBL_SZ 40
107 #define MAX_RETRIES 8
108 #define RSI_IFTYPE_STATION 0
110 #define STD_RATE_MCS7 0x07
111 #define STD_RATE_MCS6 0x06
112 #define STD_RATE_MCS5 0x05
113 #define STD_RATE_MCS4 0x04
114 #define STD_RATE_MCS3 0x03
115 #define STD_RATE_MCS2 0x02
116 #define STD_RATE_MCS1 0x01
117 #define STD_RATE_MCS0 0x00
118 #define STD_RATE_54 0x6c
119 #define STD_RATE_48 0x60
120 #define STD_RATE_36 0x48
121 #define STD_RATE_24 0x30
122 #define STD_RATE_18 0x24
123 #define STD_RATE_12 0x18
124 #define STD_RATE_11 0x16
125 #define STD_RATE_09 0x12
126 #define STD_RATE_06 0x0C
127 #define STD_RATE_5_5 0x0B
128 #define STD_RATE_02 0x04
129 #define STD_RATE_01 0x02
131 #define RSI_RF_TYPE 1
132 #define RSI_RATE_00 0x00
133 #define RSI_RATE_1 0x0
134 #define RSI_RATE_2 0x2
135 #define RSI_RATE_5_5 0x4
136 #define RSI_RATE_11 0x6
137 #define RSI_RATE_6 0x8b
138 #define RSI_RATE_9 0x8f
139 #define RSI_RATE_12 0x8a
140 #define RSI_RATE_18 0x8e
141 #define RSI_RATE_24 0x89
142 #define RSI_RATE_36 0x8d
143 #define RSI_RATE_48 0x88
144 #define RSI_RATE_54 0x8c
145 #define RSI_RATE_MCS0 0x100
146 #define RSI_RATE_MCS1 0x101
147 #define RSI_RATE_MCS2 0x102
148 #define RSI_RATE_MCS3 0x103
149 #define RSI_RATE_MCS4 0x104
150 #define RSI_RATE_MCS5 0x105
151 #define RSI_RATE_MCS6 0x106
152 #define RSI_RATE_MCS7 0x107
153 #define RSI_RATE_MCS7_SG 0x307
154 #define RSI_RATE_AUTO 0xffff
156 #define BW_20MHZ 0
157 #define BW_40MHZ 1
159 #define EP_2GHZ_20MHZ 0
160 #define EP_2GHZ_40MHZ 1
161 #define EP_5GHZ_20MHZ 2
162 #define EP_5GHZ_40MHZ 3
164 #define SIFS_TX_11N_VALUE 580
165 #define SIFS_TX_11B_VALUE 346
166 #define SHORT_SLOT_VALUE 360
167 #define LONG_SLOT_VALUE 640
168 #define OFDM_ACK_TOUT_VALUE 2720
169 #define CCK_ACK_TOUT_VALUE 9440
170 #define LONG_PREAMBLE 0x0000
171 #define SHORT_PREAMBLE 0x0001
173 #define RSI_SUPP_FILTERS (FIF_ALLMULTI | FIF_PROBE_REQ |\
174 FIF_BCN_PRBRESP_PROMISC)
176 #define ANTENNA_SEL_INT 0x02 /* RF_OUT_2 / Integerated */
177 #define ANTENNA_SEL_UFL 0x03 /* RF_OUT_1 / U.FL */
178 #define ANTENNA_MASK_VALUE 0x00ff
179 #define ANTENNA_SEL_TYPE 1
181 /* Rx filter word definitions */
182 #define PROMISCOUS_MODE BIT(0)
183 #define ALLOW_DATA_ASSOC_PEER BIT(1)
184 #define ALLOW_MGMT_ASSOC_PEER BIT(2)
185 #define ALLOW_CTRL_ASSOC_PEER BIT(3)
186 #define DISALLOW_BEACONS BIT(4)
187 #define ALLOW_CONN_PEER_MGMT_WHILE_BUF_FULL BIT(5)
188 #define DISALLOW_BROADCAST_DATA BIT(6)
190 #define RSI_MPDU_DENSITY 0x8
191 #define RSI_CHAN_RADAR BIT(7)
192 #define RSI_BEACON_INTERVAL 200
193 #define RSI_DTIM_COUNT 2
195 #define RSI_PS_DISABLE_IND BIT(15)
196 #define RSI_PS_ENABLE 1
197 #define RSI_PS_DISABLE 0
198 #define RSI_DEEP_SLEEP 1
199 #define RSI_CONNECTED_SLEEP 2
200 #define RSI_SLEEP_REQUEST 1
201 #define RSI_WAKEUP_REQUEST 2
203 #define RSI_IEEE80211_UAPSD_QUEUES \
204 (IEEE80211_WMM_IE_STA_QOSINFO_AC_VO | \
205 IEEE80211_WMM_IE_STA_QOSINFO_AC_VI | \
206 IEEE80211_WMM_IE_STA_QOSINFO_AC_BE | \
207 IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
209 #define RSI_DESC_VAP_ID_MASK 0xC000u
210 #define RSI_DESC_VAP_ID_OFST 14
211 #define RSI_DATA_DESC_MAC_BBP_INFO BIT(0)
212 #define RSI_DATA_DESC_NO_ACK_IND BIT(9)
213 #define RSI_DATA_DESC_QOS_EN BIT(12)
214 #define RSI_DATA_DESC_NORMAL_FRAME 0x00
215 #define RSI_DATA_DESC_DTIM_BEACON_GATED_FRAME BIT(10)
216 #define RSI_DATA_DESC_BEACON_FRAME BIT(11)
217 #define RSI_DATA_DESC_DTIM_BEACON (BIT(10) | BIT(11))
218 #define RSI_DATA_DESC_INSERT_TSF BIT(15)
219 #define RSI_DATA_DESC_INSERT_SEQ_NO BIT(2)
221 #ifdef CONFIG_PM
222 #define RSI_WOW_ANY BIT(1)
223 #define RSI_WOW_GTK_REKEY BIT(3)
224 #define RSI_WOW_MAGIC_PKT BIT(4)
225 #define RSI_WOW_DISCONNECT BIT(5)
226 #endif
228 #define RSI_MAX_TX_AGGR_FRMS 8
229 #define RSI_MAX_RX_AGGR_FRMS 8
231 enum opmode {
232 RSI_OPMODE_UNSUPPORTED = -1,
233 RSI_OPMODE_AP = 0,
234 RSI_OPMODE_STA,
235 RSI_OPMODE_P2P_GO,
236 RSI_OPMODE_P2P_CLIENT
239 enum vap_status {
240 VAP_ADD = 1,
241 VAP_DELETE = 2,
242 VAP_UPDATE = 3
245 enum peer_type {
246 PEER_TYPE_AP,
247 PEER_TYPE_STA,
249 extern struct ieee80211_rate rsi_rates[12];
250 extern const u16 rsi_mcsrates[8];
252 enum sta_notify_events {
253 STA_CONNECTED = 0,
254 STA_DISCONNECTED,
255 STA_TX_ADDBA_DONE,
256 STA_TX_DELBA,
257 STA_RX_ADDBA_DONE,
258 STA_RX_DELBA
261 /* Send Frames Types */
262 enum cmd_frame_type {
263 TX_DOT11_MGMT,
264 RESET_MAC_REQ,
265 RADIO_CAPABILITIES,
266 BB_PROG_VALUES_REQUEST,
267 RF_PROG_VALUES_REQUEST,
268 WAKEUP_SLEEP_REQUEST,
269 SCAN_REQUEST,
270 TSF_UPDATE,
271 PEER_NOTIFY,
272 BLOCK_HW_QUEUE,
273 SET_KEY_REQ,
274 AUTO_RATE_IND,
275 BOOTUP_PARAMS_REQUEST,
276 VAP_CAPABILITIES,
277 EEPROM_READ,
278 EEPROM_WRITE,
279 GPIO_PIN_CONFIG ,
280 SET_RX_FILTER,
281 AMPDU_IND,
282 STATS_REQUEST_FRAME,
283 BB_BUF_PROG_VALUES_REQ,
284 BBP_PROG_IN_TA,
285 BG_SCAN_PARAMS,
286 BG_SCAN_PROBE_REQ,
287 CW_MODE_REQ,
288 PER_CMD_PKT,
289 ANT_SEL_FRAME = 0x20,
290 VAP_DYNAMIC_UPDATE = 0x27,
291 COMMON_DEV_CONFIG = 0x28,
292 RADIO_PARAMS_UPDATE = 0x29,
293 WOWLAN_CONFIG_PARAMS = 0x2B,
294 WOWLAN_WAKEUP_REASON = 0xc5
297 struct rsi_mac_frame {
298 __le16 desc_word[8];
299 } __packed;
301 #define PWR_SAVE_WAKEUP_IND BIT(0)
302 #define TCP_CHECK_SUM_OFFLOAD BIT(1)
303 #define CONFIRM_REQUIRED_TO_HOST BIT(2)
304 #define ADD_DELTA_TSF BIT(3)
305 #define FETCH_RETRY_CNT_FROM_HOST_DESC BIT(4)
306 #define EOSP_INDICATION BIT(5)
307 #define REQUIRE_TSF_SYNC_CONFIRM BIT(6)
308 #define ENCAP_MGMT_PKT BIT(7)
309 #define DESC_IMMEDIATE_WAKEUP BIT(15)
311 struct rsi_xtended_desc {
312 u8 confirm_frame_type;
313 u8 retry_cnt;
314 u16 reserved;
317 struct rsi_cmd_desc_dword0 {
318 __le16 len_qno;
319 u8 frame_type;
320 u8 misc_flags;
323 struct rsi_cmd_desc_dword1 {
324 u8 xtend_desc_size;
325 u8 reserved1;
326 __le16 reserved2;
329 struct rsi_cmd_desc_dword2 {
330 __le32 pkt_info; /* Packet specific data */
333 struct rsi_cmd_desc_dword3 {
334 __le16 token;
335 u8 qid_tid;
336 u8 sta_id;
339 struct rsi_cmd_desc {
340 struct rsi_cmd_desc_dword0 desc_dword0;
341 struct rsi_cmd_desc_dword1 desc_dword1;
342 struct rsi_cmd_desc_dword2 desc_dword2;
343 struct rsi_cmd_desc_dword3 desc_dword3;
346 struct rsi_boot_params {
347 __le16 desc_word[8];
348 struct bootup_params bootup_params;
349 } __packed;
351 struct rsi_peer_notify {
352 struct rsi_cmd_desc desc;
353 u8 mac_addr[6];
354 __le16 command;
355 __le16 mpdu_density;
356 __le16 reserved;
357 __le32 sta_flags;
358 } __packed;
360 /* Aggregation params flags */
361 #define RSI_AGGR_PARAMS_TID_MASK 0xf
362 #define RSI_AGGR_PARAMS_START BIT(4)
363 #define RSI_AGGR_PARAMS_RX_AGGR BIT(5)
364 struct rsi_aggr_params {
365 struct rsi_cmd_desc_dword0 desc_dword0;
366 struct rsi_cmd_desc_dword0 desc_dword1;
367 __le16 seq_start;
368 __le16 baw_size;
369 __le16 token;
370 u8 aggr_params;
371 u8 peer_id;
372 } __packed;
374 struct rsi_bb_rf_prog {
375 struct rsi_cmd_desc_dword0 desc_dword0;
376 __le16 reserved1;
377 u8 rf_power_mode;
378 u8 reserved2;
379 u8 endpoint;
380 u8 reserved3;
381 __le16 reserved4;
382 __le16 reserved5;
383 __le16 flags;
384 } __packed;
386 struct rsi_chan_config {
387 struct rsi_cmd_desc_dword0 desc_dword0;
388 struct rsi_cmd_desc_dword1 desc_dword1;
389 u8 channel_number;
390 u8 antenna_gain_offset_2g;
391 u8 antenna_gain_offset_5g;
392 u8 channel_width;
393 __le16 tx_power;
394 u8 region_rftype;
395 u8 flags;
396 } __packed;
398 struct rsi_vap_caps {
399 struct rsi_cmd_desc_dword0 desc_dword0;
400 u8 reserved1;
401 u8 status;
402 __le16 reserved2;
403 u8 vif_type;
404 u8 channel_bw;
405 __le16 antenna_info;
406 __le16 token;
407 u8 radioid_macid;
408 u8 vap_id;
409 u8 mac_addr[6];
410 __le16 keep_alive_period;
411 u8 bssid[6];
412 __le16 reserved4;
413 __le32 flags;
414 __le16 frag_threshold;
415 __le16 rts_threshold;
416 __le32 default_mgmt_rate;
417 __le16 default_ctrl_rate;
418 __le16 ctrl_rate_flags;
419 __le32 default_data_rate;
420 __le16 beacon_interval;
421 __le16 dtim_period;
422 __le16 beacon_miss_threshold;
423 } __packed;
425 struct rsi_ant_sel_frame {
426 struct rsi_cmd_desc_dword0 desc_dword0;
427 u8 reserved;
428 u8 sub_frame_type;
429 __le16 ant_value;
430 __le32 reserved1;
431 __le32 reserved2;
432 } __packed;
434 struct rsi_dynamic_s {
435 struct rsi_cmd_desc_dword0 desc_dword0;
436 struct rsi_cmd_desc_dword1 desc_dword1;
437 struct rsi_cmd_desc_dword2 desc_dword2;
438 struct rsi_cmd_desc_dword3 desc_dword3;
439 struct framebody {
440 __le16 data_rate;
441 __le16 mgmt_rate;
442 __le16 keep_alive_period;
443 } frame_body;
444 } __packed;
446 /* Key descriptor flags */
447 #define RSI_KEY_TYPE_BROADCAST BIT(1)
448 #define RSI_WEP_KEY BIT(2)
449 #define RSI_WEP_KEY_104 BIT(3)
450 #define RSI_CIPHER_WPA BIT(4)
451 #define RSI_CIPHER_TKIP BIT(5)
452 #define RSI_KEY_MODE_AP BIT(7)
453 #define RSI_PROTECT_DATA_FRAMES BIT(13)
454 #define RSI_KEY_ID_MASK 0xC0
455 #define RSI_KEY_ID_OFFSET 14
456 struct rsi_set_key {
457 struct rsi_cmd_desc_dword0 desc_dword0;
458 struct rsi_cmd_desc_dword1 desc_dword1;
459 __le16 key_desc;
460 __le32 bpn;
461 u8 sta_id;
462 u8 vap_id;
463 u8 key[4][32];
464 u8 tx_mic_key[8];
465 u8 rx_mic_key[8];
466 } __packed;
468 struct rsi_auto_rate {
469 struct rsi_cmd_desc desc;
470 __le16 failure_limit;
471 __le16 initial_boundary;
472 __le16 max_threshold_limt;
473 __le16 num_supported_rates;
474 __le16 aarf_rssi;
475 __le16 moderate_rate_inx;
476 __le16 collision_tolerance;
477 __le16 supported_rates[40];
478 } __packed;
480 #define QUIET_INFO_VALID BIT(0)
481 #define QUIET_ENABLE BIT(1)
482 struct rsi_block_unblock_data {
483 struct rsi_cmd_desc_dword0 desc_dword0;
484 u8 xtend_desc_size;
485 u8 host_quiet_info;
486 __le16 reserved;
487 __le16 block_q_bitmap;
488 __le16 unblock_q_bitmap;
489 __le16 token;
490 __le16 flush_q_bitmap;
491 } __packed;
493 struct qos_params {
494 __le16 cont_win_min_q;
495 __le16 cont_win_max_q;
496 __le16 aifsn_val_q;
497 __le16 txop_q;
498 } __packed;
500 struct rsi_radio_caps {
501 struct rsi_cmd_desc_dword0 desc_dword0;
502 struct rsi_cmd_desc_dword0 desc_dword1;
503 u8 channel_num;
504 u8 rf_model;
505 __le16 ppe_ack_rate;
506 __le16 mode_11j;
507 u8 radio_cfg_info;
508 u8 radio_info;
509 struct qos_params qos_params[MAX_HW_QUEUES];
510 u8 num_11n_rates;
511 u8 num_11ac_rates;
512 __le16 gcpd_per_rate[20];
513 __le16 sifs_tx_11n;
514 __le16 sifs_tx_11b;
515 __le16 slot_rx_11n;
516 __le16 ofdm_ack_tout;
517 __le16 cck_ack_tout;
518 __le16 preamble_type;
519 } __packed;
521 /* ULP GPIO flags */
522 #define RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP BIT(0)
523 #define RSI_GPIO_SLEEP_IND_FROM_DEVICE BIT(1)
524 #define RSI_GPIO_2_ULP BIT(2)
525 #define RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP BIT(3)
527 /* SOC GPIO flags */
528 #define RSI_GPIO_0_PSPI_CSN_0 BIT(0)
529 #define RSI_GPIO_1_PSPI_CSN_1 BIT(1)
530 #define RSI_GPIO_2_HOST_WAKEUP_INTR BIT(2)
531 #define RSI_GPIO_3_PSPI_DATA_0 BIT(3)
532 #define RSI_GPIO_4_PSPI_DATA_1 BIT(4)
533 #define RSI_GPIO_5_PSPI_DATA_2 BIT(5)
534 #define RSI_GPIO_6_PSPI_DATA_3 BIT(6)
535 #define RSI_GPIO_7_I2C_SCL BIT(7)
536 #define RSI_GPIO_8_I2C_SDA BIT(8)
537 #define RSI_GPIO_9_UART1_RX BIT(9)
538 #define RSI_GPIO_10_UART1_TX BIT(10)
539 #define RSI_GPIO_11_UART1_RTS_I2S_CLK BIT(11)
540 #define RSI_GPIO_12_UART1_CTS_I2S_WS BIT(12)
541 #define RSI_GPIO_13_DBG_UART_RX_I2S_DIN BIT(13)
542 #define RSI_GPIO_14_DBG_UART_RX_I2S_DOUT BIT(14)
543 #define RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS BIT(15)
544 #define RSI_GPIO_16_LED_0 BIT(16)
545 #define RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL BIT(17)
546 #define RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL BIT(18)
547 #define RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF BIT(19)
548 #define RSI_GPIO_20_RF_RESET BIT(20)
549 #define RSI_GPIO_21_SLEEP_IND_FROM_DEVICE BIT(21)
551 #define RSI_UNUSED_SOC_GPIO_BITMAP (RSI_GPIO_9_UART1_RX | \
552 RSI_GPIO_10_UART1_TX | \
553 RSI_GPIO_11_UART1_RTS_I2S_CLK | \
554 RSI_GPIO_12_UART1_CTS_I2S_WS | \
555 RSI_GPIO_13_DBG_UART_RX_I2S_DIN | \
556 RSI_GPIO_14_DBG_UART_RX_I2S_DOUT | \
557 RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS | \
558 RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL | \
559 RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL | \
560 RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF | \
561 RSI_GPIO_21_SLEEP_IND_FROM_DEVICE)
563 #define RSI_UNUSED_ULP_GPIO_BITMAP (RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP | \
564 RSI_GPIO_SLEEP_IND_FROM_DEVICE | \
565 RSI_GPIO_2_ULP | \
566 RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP);
567 struct rsi_config_vals {
568 __le16 len_qno;
569 u8 pkt_type;
570 u8 misc_flags;
571 __le16 reserved1[6];
572 u8 lp_ps_handshake;
573 u8 ulp_ps_handshake;
574 u8 sleep_config_params; /* 0 for no handshake,
575 * 1 for GPIO based handshake,
576 * 2 packet handshake
578 u8 unused_ulp_gpio;
579 __le32 unused_soc_gpio_bitmap;
580 u8 ext_pa_or_bt_coex_en;
581 u8 opermode;
582 u8 wlan_rf_pwr_mode;
583 u8 bt_rf_pwr_mode;
584 u8 zigbee_rf_pwr_mode;
585 u8 driver_mode;
586 u8 region_code;
587 u8 antenna_sel_val;
588 u8 reserved2[16];
589 } __packed;
591 /* Packet info flags */
592 #define RSI_EEPROM_HDR_SIZE_OFFSET 8
593 #define RSI_EEPROM_HDR_SIZE_MASK 0x300
594 #define RSI_EEPROM_LEN_OFFSET 20
595 #define RSI_EEPROM_LEN_MASK 0xFFF00000
597 struct rsi_eeprom_read_frame {
598 __le16 len_qno;
599 u8 pkt_type;
600 u8 misc_flags;
601 __le32 pkt_info;
602 __le32 eeprom_offset;
603 __le16 delay_ms;
604 __le16 reserved3;
605 } __packed;
607 struct rsi_request_ps {
608 struct rsi_cmd_desc desc;
609 struct ps_sleep_params ps_sleep;
610 u8 ps_mimic_support;
611 u8 ps_uapsd_acs;
612 u8 ps_uapsd_wakeup_period;
613 u8 reserved;
614 __le32 ps_listen_interval;
615 __le32 ps_dtim_interval_duration;
616 __le16 ps_num_dtim_intervals;
617 } __packed;
619 struct rsi_wowlan_req {
620 struct rsi_cmd_desc desc;
621 u8 sourceid[ETH_ALEN];
622 u16 wow_flags;
623 u16 host_sleep_status;
624 } __packed;
626 static inline u32 rsi_get_queueno(u8 *addr, u16 offset)
628 return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12;
631 static inline u32 rsi_get_length(u8 *addr, u16 offset)
633 return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff;
636 static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset)
638 return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff;
641 static inline u8 rsi_get_rssi(u8 *addr)
643 return *(u8 *)(addr + FRAME_DESC_SZ);
646 static inline u8 rsi_get_channel(u8 *addr)
648 return *(char *)(addr + 15);
651 static inline void rsi_set_len_qno(__le16 *addr, u16 len, u8 qno)
653 *addr = cpu_to_le16(len | ((qno & 7) << 12));
656 int rsi_handle_card_ready(struct rsi_common *common, u8 *msg);
657 int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg);
658 int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode,
659 u8 *mac_addr, u8 vap_id, u8 vap_status);
660 int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid,
661 u16 ssn, u8 buf_size, u8 event,
662 u8 sta_id);
663 int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len,
664 u8 key_type, u8 key_id, u32 cipher, s16 sta_id,
665 struct ieee80211_vif *vif);
666 int rsi_set_channel(struct rsi_common *common,
667 struct ieee80211_channel *channel);
668 int rsi_send_vap_dynamic_update(struct rsi_common *common);
669 int rsi_send_block_unblock_frame(struct rsi_common *common, bool event);
670 int rsi_hal_send_sta_notify_frame(struct rsi_common *common, enum opmode opmode,
671 u8 notify_event, const unsigned char *bssid,
672 u8 qos_enable, u16 aid, u16 sta_id,
673 struct ieee80211_vif *vif);
674 void rsi_inform_bss_status(struct rsi_common *common, enum opmode opmode,
675 u8 status, const u8 *addr, u8 qos_enable, u16 aid,
676 struct ieee80211_sta *sta, u16 sta_id,
677 u16 assoc_cap, struct ieee80211_vif *vif);
678 void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb);
679 int rsi_mac80211_attach(struct rsi_common *common);
680 void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb,
681 int status);
682 bool rsi_is_cipher_wep(struct rsi_common *common);
683 void rsi_core_qos_processor(struct rsi_common *common);
684 void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb);
685 int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb);
686 int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb);
687 int rsi_band_check(struct rsi_common *common, struct ieee80211_channel *chan);
688 int rsi_send_rx_filter_frame(struct rsi_common *common, u16 rx_filter_word);
689 int rsi_send_radio_params_update(struct rsi_common *common);
690 int rsi_set_antenna(struct rsi_common *common, u8 antenna);
691 #ifdef CONFIG_PM
692 int rsi_send_wowlan_request(struct rsi_common *common, u16 flags,
693 u16 sleep_status);
694 #endif
695 int rsi_send_ps_request(struct rsi_hw *adapter, bool enable,
696 struct ieee80211_vif *vif);
697 #endif