1 // SPDX-License-Identifier: GPL-2.0-only
3 * adv7183.c Analog Devices ADV7183 video decoder driver
5 * Copyright (c) 2011 Analog Devices Inc.
8 #include <linux/delay.h>
9 #include <linux/errno.h>
10 #include <linux/gpio.h>
11 #include <linux/i2c.h>
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/types.h>
16 #include <linux/videodev2.h>
18 #include <media/i2c/adv7183.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-device.h>
22 #include "adv7183_regs.h"
25 struct v4l2_subdev sd
;
26 struct v4l2_ctrl_handler hdl
;
28 v4l2_std_id std
; /* Current set standard */
33 struct v4l2_mbus_framefmt fmt
;
36 /* EXAMPLES USING 27 MHz CLOCK
37 * Mode 1 CVBS Input (Composite Video on AIN5)
38 * All standards are supported through autodetect, 8-bit, 4:2:2, ITU-R BT.656 output on P15 to P8.
40 static const unsigned char adv7183_init_regs
[] = {
41 ADV7183_IN_CTRL
, 0x04, /* CVBS input on AIN5 */
42 ADV7183_DIGI_CLAMP_CTRL_1
, 0x00, /* Slow down digital clamps */
43 ADV7183_SHAP_FILT_CTRL
, 0x41, /* Set CSFM to SH1 */
44 ADV7183_ADC_CTRL
, 0x16, /* Power down ADC 1 and ADC 2 */
45 ADV7183_CTI_DNR_CTRL_4
, 0x04, /* Set DNR threshold to 4 for flat response */
46 /* ADI recommended programming sequence */
47 ADV7183_ADI_CTRL
, 0x80,
48 ADV7183_CTI_DNR_CTRL_4
, 0x20,
57 ADV7183_SD_SATURATION_CR
, 0x3E,
58 ADV7183_PAL_V_END
, 0x3E,
59 ADV7183_PAL_F_TOGGLE
, 0x0F,
60 ADV7183_ADI_CTRL
, 0x00,
63 static inline struct adv7183
*to_adv7183(struct v4l2_subdev
*sd
)
65 return container_of(sd
, struct adv7183
, sd
);
67 static inline struct v4l2_subdev
*to_sd(struct v4l2_ctrl
*ctrl
)
69 return &container_of(ctrl
->handler
, struct adv7183
, hdl
)->sd
;
72 static inline int adv7183_read(struct v4l2_subdev
*sd
, unsigned char reg
)
74 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
76 return i2c_smbus_read_byte_data(client
, reg
);
79 static inline int adv7183_write(struct v4l2_subdev
*sd
, unsigned char reg
,
82 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
84 return i2c_smbus_write_byte_data(client
, reg
, value
);
87 static int adv7183_writeregs(struct v4l2_subdev
*sd
,
88 const unsigned char *regs
, unsigned int num
)
90 unsigned char reg
, data
;
94 v4l2_err(sd
, "invalid regs array\n");
103 adv7183_write(sd
, reg
, data
);
108 static int adv7183_log_status(struct v4l2_subdev
*sd
)
110 struct adv7183
*decoder
= to_adv7183(sd
);
112 v4l2_info(sd
, "adv7183: Input control = 0x%02x\n",
113 adv7183_read(sd
, ADV7183_IN_CTRL
));
114 v4l2_info(sd
, "adv7183: Video selection = 0x%02x\n",
115 adv7183_read(sd
, ADV7183_VD_SEL
));
116 v4l2_info(sd
, "adv7183: Output control = 0x%02x\n",
117 adv7183_read(sd
, ADV7183_OUT_CTRL
));
118 v4l2_info(sd
, "adv7183: Extended output control = 0x%02x\n",
119 adv7183_read(sd
, ADV7183_EXT_OUT_CTRL
));
120 v4l2_info(sd
, "adv7183: Autodetect enable = 0x%02x\n",
121 adv7183_read(sd
, ADV7183_AUTO_DET_EN
));
122 v4l2_info(sd
, "adv7183: Contrast = 0x%02x\n",
123 adv7183_read(sd
, ADV7183_CONTRAST
));
124 v4l2_info(sd
, "adv7183: Brightness = 0x%02x\n",
125 adv7183_read(sd
, ADV7183_BRIGHTNESS
));
126 v4l2_info(sd
, "adv7183: Hue = 0x%02x\n",
127 adv7183_read(sd
, ADV7183_HUE
));
128 v4l2_info(sd
, "adv7183: Default value Y = 0x%02x\n",
129 adv7183_read(sd
, ADV7183_DEF_Y
));
130 v4l2_info(sd
, "adv7183: Default value C = 0x%02x\n",
131 adv7183_read(sd
, ADV7183_DEF_C
));
132 v4l2_info(sd
, "adv7183: ADI control = 0x%02x\n",
133 adv7183_read(sd
, ADV7183_ADI_CTRL
));
134 v4l2_info(sd
, "adv7183: Power Management = 0x%02x\n",
135 adv7183_read(sd
, ADV7183_POW_MANAGE
));
136 v4l2_info(sd
, "adv7183: Status 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
137 adv7183_read(sd
, ADV7183_STATUS_1
),
138 adv7183_read(sd
, ADV7183_STATUS_2
),
139 adv7183_read(sd
, ADV7183_STATUS_3
));
140 v4l2_info(sd
, "adv7183: Ident = 0x%02x\n",
141 adv7183_read(sd
, ADV7183_IDENT
));
142 v4l2_info(sd
, "adv7183: Analog clamp control = 0x%02x\n",
143 adv7183_read(sd
, ADV7183_ANAL_CLAMP_CTRL
));
144 v4l2_info(sd
, "adv7183: Digital clamp control 1 = 0x%02x\n",
145 adv7183_read(sd
, ADV7183_DIGI_CLAMP_CTRL_1
));
146 v4l2_info(sd
, "adv7183: Shaping filter control 1 and 2 = 0x%02x 0x%02x\n",
147 adv7183_read(sd
, ADV7183_SHAP_FILT_CTRL
),
148 adv7183_read(sd
, ADV7183_SHAP_FILT_CTRL_2
));
149 v4l2_info(sd
, "adv7183: Comb filter control = 0x%02x\n",
150 adv7183_read(sd
, ADV7183_COMB_FILT_CTRL
));
151 v4l2_info(sd
, "adv7183: ADI control 2 = 0x%02x\n",
152 adv7183_read(sd
, ADV7183_ADI_CTRL_2
));
153 v4l2_info(sd
, "adv7183: Pixel delay control = 0x%02x\n",
154 adv7183_read(sd
, ADV7183_PIX_DELAY_CTRL
));
155 v4l2_info(sd
, "adv7183: Misc gain control = 0x%02x\n",
156 adv7183_read(sd
, ADV7183_MISC_GAIN_CTRL
));
157 v4l2_info(sd
, "adv7183: AGC mode control = 0x%02x\n",
158 adv7183_read(sd
, ADV7183_AGC_MODE_CTRL
));
159 v4l2_info(sd
, "adv7183: Chroma gain control 1 and 2 = 0x%02x 0x%02x\n",
160 adv7183_read(sd
, ADV7183_CHRO_GAIN_CTRL_1
),
161 adv7183_read(sd
, ADV7183_CHRO_GAIN_CTRL_2
));
162 v4l2_info(sd
, "adv7183: Luma gain control 1 and 2 = 0x%02x 0x%02x\n",
163 adv7183_read(sd
, ADV7183_LUMA_GAIN_CTRL_1
),
164 adv7183_read(sd
, ADV7183_LUMA_GAIN_CTRL_2
));
165 v4l2_info(sd
, "adv7183: Vsync field control 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
166 adv7183_read(sd
, ADV7183_VS_FIELD_CTRL_1
),
167 adv7183_read(sd
, ADV7183_VS_FIELD_CTRL_2
),
168 adv7183_read(sd
, ADV7183_VS_FIELD_CTRL_3
));
169 v4l2_info(sd
, "adv7183: Hsync position control 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
170 adv7183_read(sd
, ADV7183_HS_POS_CTRL_1
),
171 adv7183_read(sd
, ADV7183_HS_POS_CTRL_2
),
172 adv7183_read(sd
, ADV7183_HS_POS_CTRL_3
));
173 v4l2_info(sd
, "adv7183: Polarity = 0x%02x\n",
174 adv7183_read(sd
, ADV7183_POLARITY
));
175 v4l2_info(sd
, "adv7183: ADC control = 0x%02x\n",
176 adv7183_read(sd
, ADV7183_ADC_CTRL
));
177 v4l2_info(sd
, "adv7183: SD offset Cb and Cr = 0x%02x 0x%02x\n",
178 adv7183_read(sd
, ADV7183_SD_OFFSET_CB
),
179 adv7183_read(sd
, ADV7183_SD_OFFSET_CR
));
180 v4l2_info(sd
, "adv7183: SD saturation Cb and Cr = 0x%02x 0x%02x\n",
181 adv7183_read(sd
, ADV7183_SD_SATURATION_CB
),
182 adv7183_read(sd
, ADV7183_SD_SATURATION_CR
));
183 v4l2_info(sd
, "adv7183: Drive strength = 0x%02x\n",
184 adv7183_read(sd
, ADV7183_DRIVE_STR
));
185 v4l2_ctrl_handler_log_status(&decoder
->hdl
, sd
->name
);
189 static int adv7183_g_std(struct v4l2_subdev
*sd
, v4l2_std_id
*std
)
191 struct adv7183
*decoder
= to_adv7183(sd
);
197 static int adv7183_s_std(struct v4l2_subdev
*sd
, v4l2_std_id std
)
199 struct adv7183
*decoder
= to_adv7183(sd
);
202 reg
= adv7183_read(sd
, ADV7183_IN_CTRL
) & 0xF;
203 if (std
== V4L2_STD_PAL_60
)
205 else if (std
== V4L2_STD_NTSC_443
)
207 else if (std
== V4L2_STD_PAL_N
)
209 else if (std
== V4L2_STD_PAL_M
)
211 else if (std
== V4L2_STD_PAL_Nc
)
213 else if (std
& V4L2_STD_PAL
)
215 else if (std
& V4L2_STD_NTSC
)
217 else if (std
& V4L2_STD_SECAM
)
221 adv7183_write(sd
, ADV7183_IN_CTRL
, reg
);
228 static int adv7183_reset(struct v4l2_subdev
*sd
, u32 val
)
232 reg
= adv7183_read(sd
, ADV7183_POW_MANAGE
) | 0x80;
233 adv7183_write(sd
, ADV7183_POW_MANAGE
, reg
);
234 /* wait 5ms before any further i2c writes are performed */
235 usleep_range(5000, 10000);
239 static int adv7183_s_routing(struct v4l2_subdev
*sd
,
240 u32 input
, u32 output
, u32 config
)
242 struct adv7183
*decoder
= to_adv7183(sd
);
245 if ((input
> ADV7183_COMPONENT1
) || (output
> ADV7183_16BIT_OUT
))
248 if (input
!= decoder
->input
) {
249 decoder
->input
= input
;
250 reg
= adv7183_read(sd
, ADV7183_IN_CTRL
) & 0xF0;
252 case ADV7183_COMPOSITE1
:
255 case ADV7183_COMPOSITE2
:
258 case ADV7183_COMPOSITE3
:
261 case ADV7183_COMPOSITE4
:
264 case ADV7183_COMPOSITE5
:
267 case ADV7183_COMPOSITE6
:
270 case ADV7183_COMPOSITE7
:
273 case ADV7183_COMPOSITE8
:
276 case ADV7183_COMPOSITE9
:
279 case ADV7183_COMPOSITE10
:
282 case ADV7183_SVIDEO0
:
285 case ADV7183_SVIDEO1
:
288 case ADV7183_SVIDEO2
:
291 case ADV7183_COMPONENT0
:
294 case ADV7183_COMPONENT1
:
300 adv7183_write(sd
, ADV7183_IN_CTRL
, reg
);
303 if (output
!= decoder
->output
) {
304 decoder
->output
= output
;
305 reg
= adv7183_read(sd
, ADV7183_OUT_CTRL
) & 0xC0;
307 case ADV7183_16BIT_OUT
:
314 adv7183_write(sd
, ADV7183_OUT_CTRL
, reg
);
320 static int adv7183_s_ctrl(struct v4l2_ctrl
*ctrl
)
322 struct v4l2_subdev
*sd
= to_sd(ctrl
);
326 case V4L2_CID_BRIGHTNESS
:
329 adv7183_write(sd
, ADV7183_BRIGHTNESS
, val
);
331 case V4L2_CID_CONTRAST
:
332 adv7183_write(sd
, ADV7183_CONTRAST
, val
);
334 case V4L2_CID_SATURATION
:
335 adv7183_write(sd
, ADV7183_SD_SATURATION_CB
, val
>> 8);
336 adv7183_write(sd
, ADV7183_SD_SATURATION_CR
, (val
& 0xFF));
339 adv7183_write(sd
, ADV7183_SD_OFFSET_CB
, val
>> 8);
340 adv7183_write(sd
, ADV7183_SD_OFFSET_CR
, (val
& 0xFF));
349 static int adv7183_querystd(struct v4l2_subdev
*sd
, v4l2_std_id
*std
)
351 struct adv7183
*decoder
= to_adv7183(sd
);
354 /* enable autodetection block */
355 reg
= adv7183_read(sd
, ADV7183_IN_CTRL
) & 0xF;
356 adv7183_write(sd
, ADV7183_IN_CTRL
, reg
);
358 /* wait autodetection switch */
361 /* get autodetection result */
362 reg
= adv7183_read(sd
, ADV7183_STATUS_1
);
363 switch ((reg
>> 0x4) & 0x7) {
365 *std
&= V4L2_STD_NTSC
;
368 *std
&= V4L2_STD_NTSC_443
;
371 *std
&= V4L2_STD_PAL_M
;
374 *std
&= V4L2_STD_PAL_60
;
377 *std
&= V4L2_STD_PAL
;
380 *std
&= V4L2_STD_SECAM
;
383 *std
&= V4L2_STD_PAL_Nc
;
386 *std
&= V4L2_STD_SECAM
;
389 *std
= V4L2_STD_UNKNOWN
;
393 /* after std detection, write back user set std */
394 adv7183_s_std(sd
, decoder
->std
);
398 static int adv7183_g_input_status(struct v4l2_subdev
*sd
, u32
*status
)
402 *status
= V4L2_IN_ST_NO_SIGNAL
;
403 reg
= adv7183_read(sd
, ADV7183_STATUS_1
);
411 static int adv7183_enum_mbus_code(struct v4l2_subdev
*sd
,
412 struct v4l2_subdev_pad_config
*cfg
,
413 struct v4l2_subdev_mbus_code_enum
*code
)
415 if (code
->pad
|| code
->index
> 0)
418 code
->code
= MEDIA_BUS_FMT_UYVY8_2X8
;
422 static int adv7183_set_fmt(struct v4l2_subdev
*sd
,
423 struct v4l2_subdev_pad_config
*cfg
,
424 struct v4l2_subdev_format
*format
)
426 struct adv7183
*decoder
= to_adv7183(sd
);
427 struct v4l2_mbus_framefmt
*fmt
= &format
->format
;
432 fmt
->code
= MEDIA_BUS_FMT_UYVY8_2X8
;
433 fmt
->colorspace
= V4L2_COLORSPACE_SMPTE170M
;
434 if (decoder
->std
& V4L2_STD_525_60
) {
435 fmt
->field
= V4L2_FIELD_SEQ_TB
;
439 fmt
->field
= V4L2_FIELD_SEQ_BT
;
443 if (format
->which
== V4L2_SUBDEV_FORMAT_ACTIVE
)
450 static int adv7183_get_fmt(struct v4l2_subdev
*sd
,
451 struct v4l2_subdev_pad_config
*cfg
,
452 struct v4l2_subdev_format
*format
)
454 struct adv7183
*decoder
= to_adv7183(sd
);
459 format
->format
= decoder
->fmt
;
463 static int adv7183_s_stream(struct v4l2_subdev
*sd
, int enable
)
465 struct adv7183
*decoder
= to_adv7183(sd
);
468 gpio_set_value(decoder
->oe_pin
, 0);
470 gpio_set_value(decoder
->oe_pin
, 1);
475 #ifdef CONFIG_VIDEO_ADV_DEBUG
476 static int adv7183_g_register(struct v4l2_subdev
*sd
, struct v4l2_dbg_register
*reg
)
478 reg
->val
= adv7183_read(sd
, reg
->reg
& 0xff);
483 static int adv7183_s_register(struct v4l2_subdev
*sd
, const struct v4l2_dbg_register
*reg
)
485 adv7183_write(sd
, reg
->reg
& 0xff, reg
->val
& 0xff);
490 static const struct v4l2_ctrl_ops adv7183_ctrl_ops
= {
491 .s_ctrl
= adv7183_s_ctrl
,
494 static const struct v4l2_subdev_core_ops adv7183_core_ops
= {
495 .log_status
= adv7183_log_status
,
496 .reset
= adv7183_reset
,
497 #ifdef CONFIG_VIDEO_ADV_DEBUG
498 .g_register
= adv7183_g_register
,
499 .s_register
= adv7183_s_register
,
503 static const struct v4l2_subdev_video_ops adv7183_video_ops
= {
504 .g_std
= adv7183_g_std
,
505 .s_std
= adv7183_s_std
,
506 .s_routing
= adv7183_s_routing
,
507 .querystd
= adv7183_querystd
,
508 .g_input_status
= adv7183_g_input_status
,
509 .s_stream
= adv7183_s_stream
,
512 static const struct v4l2_subdev_pad_ops adv7183_pad_ops
= {
513 .enum_mbus_code
= adv7183_enum_mbus_code
,
514 .get_fmt
= adv7183_get_fmt
,
515 .set_fmt
= adv7183_set_fmt
,
518 static const struct v4l2_subdev_ops adv7183_ops
= {
519 .core
= &adv7183_core_ops
,
520 .video
= &adv7183_video_ops
,
521 .pad
= &adv7183_pad_ops
,
524 static int adv7183_probe(struct i2c_client
*client
,
525 const struct i2c_device_id
*id
)
527 struct adv7183
*decoder
;
528 struct v4l2_subdev
*sd
;
529 struct v4l2_ctrl_handler
*hdl
;
531 struct v4l2_subdev_format fmt
= {
532 .which
= V4L2_SUBDEV_FORMAT_ACTIVE
,
534 const unsigned *pin_array
;
536 /* Check if the adapter supports the needed features */
537 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_SMBUS_BYTE_DATA
))
540 v4l_info(client
, "chip found @ 0x%02x (%s)\n",
541 client
->addr
<< 1, client
->adapter
->name
);
543 pin_array
= client
->dev
.platform_data
;
544 if (pin_array
== NULL
)
547 decoder
= devm_kzalloc(&client
->dev
, sizeof(*decoder
), GFP_KERNEL
);
551 decoder
->reset_pin
= pin_array
[0];
552 decoder
->oe_pin
= pin_array
[1];
554 if (devm_gpio_request_one(&client
->dev
, decoder
->reset_pin
,
555 GPIOF_OUT_INIT_LOW
, "ADV7183 Reset")) {
556 v4l_err(client
, "failed to request GPIO %d\n", decoder
->reset_pin
);
560 if (devm_gpio_request_one(&client
->dev
, decoder
->oe_pin
,
562 "ADV7183 Output Enable")) {
563 v4l_err(client
, "failed to request GPIO %d\n", decoder
->oe_pin
);
568 v4l2_i2c_subdev_init(sd
, client
, &adv7183_ops
);
571 v4l2_ctrl_handler_init(hdl
, 4);
572 v4l2_ctrl_new_std(hdl
, &adv7183_ctrl_ops
,
573 V4L2_CID_BRIGHTNESS
, -128, 127, 1, 0);
574 v4l2_ctrl_new_std(hdl
, &adv7183_ctrl_ops
,
575 V4L2_CID_CONTRAST
, 0, 0xFF, 1, 0x80);
576 v4l2_ctrl_new_std(hdl
, &adv7183_ctrl_ops
,
577 V4L2_CID_SATURATION
, 0, 0xFFFF, 1, 0x8080);
578 v4l2_ctrl_new_std(hdl
, &adv7183_ctrl_ops
,
579 V4L2_CID_HUE
, 0, 0xFFFF, 1, 0x8080);
580 /* hook the control handler into the driver */
581 sd
->ctrl_handler
= hdl
;
585 v4l2_ctrl_handler_free(hdl
);
589 /* v4l2 doesn't support an autodetect standard, pick PAL as default */
590 decoder
->std
= V4L2_STD_PAL
;
591 decoder
->input
= ADV7183_COMPOSITE4
;
592 decoder
->output
= ADV7183_8BIT_OUT
;
595 /* reset pulse width at least 5ms */
597 gpio_set_value(decoder
->reset_pin
, 1);
598 /* wait 5ms before any further i2c writes are performed */
601 adv7183_writeregs(sd
, adv7183_init_regs
, ARRAY_SIZE(adv7183_init_regs
));
602 adv7183_s_std(sd
, decoder
->std
);
603 fmt
.format
.width
= 720;
604 fmt
.format
.height
= 576;
605 adv7183_set_fmt(sd
, NULL
, &fmt
);
607 /* initialize the hardware to the default control values */
608 ret
= v4l2_ctrl_handler_setup(hdl
);
610 v4l2_ctrl_handler_free(hdl
);
617 static int adv7183_remove(struct i2c_client
*client
)
619 struct v4l2_subdev
*sd
= i2c_get_clientdata(client
);
621 v4l2_device_unregister_subdev(sd
);
622 v4l2_ctrl_handler_free(sd
->ctrl_handler
);
626 static const struct i2c_device_id adv7183_id
[] = {
631 MODULE_DEVICE_TABLE(i2c
, adv7183_id
);
633 static struct i2c_driver adv7183_driver
= {
637 .probe
= adv7183_probe
,
638 .remove
= adv7183_remove
,
639 .id_table
= adv7183_id
,
642 module_i2c_driver(adv7183_driver
);
644 MODULE_DESCRIPTION("Analog Devices ADV7183 video decoder driver");
645 MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
646 MODULE_LICENSE("GPL v2");