drivers/media/tuners/mt2060_priv.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  *  Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
   4  *
   5  *  Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
   6  */
   7
   8 #ifndef MT2060_PRIV_H
   9 #define MT2060_PRIV_H
  10
  11 // Uncomment the #define below to enable spurs checking. The results where quite unconvincing.
  12 // #define MT2060_SPURCHECK
  13
  14 /* This driver is based on the information available in the datasheet of the
  15    "Comtech SDVBT-3K6M" tuner ( K1000737843.pdf ) which features the MT2060 register map :
  16
  17    I2C Address : 0x60
  18
  19    Reg.No |   B7   |   B6   |   B5   |   B4   |   B3   |   B2   |   B1   |   B0   | ( defaults )
  20    --------------------------------------------------------------------------------
  21        00 | [              PART             ] | [              REV              ] | R  = 0x63
  22        01 | [             LNABAND           ] | [              NUM1(5:2)        ] | RW = 0x3F
  23        02 | [                               DIV1                                ] | RW = 0x74
  24        03 | FM1CA  | FM1SS  | [  NUM1(1:0)  ] | [              NUM2(3:0)        ] | RW = 0x00
  25        04 |                                 NUM2(11:4)                          ] | RW = 0x08
  26        05 | [                               DIV2                       ] |NUM2(12)| RW = 0x93
  27        06 | L1LK   | [        TAD1          ] | L2LK   | [         TAD2         ] | R
  28        07 | [                               FMF                                 ] | R
  29        08 |   ?    | FMCAL  |   ?    |   ?    |   ?    |   ?    |   ?    | TEMP   | R
  30        09 |   0    |   0    | [    FMGC     ] |   0    | GP02   | GP01   |   0    | RW = 0x20
  31        0A | ??
  32        0B |   0    |   0    |   1    |   1    |   0    |   0    | [   VGAG      ] | RW = 0x30
  33        0C | V1CSE  |   1    |   1    |   1    |   1    |   1    |   1    |   1    | RW = 0xFF
  34        0D |   1    |   0    | [                      V1CS                       ] | RW = 0xB0
  35        0E | ??
  36        0F | ??
  37        10 | ??
  38        11 | [             LOTO              ] |   0    |   0    |   1    |   0    | RW = 0x42
  39
  40        PART    : Part code      : 6 for MT2060
  41        REV     : Revision code  : 3 for current revision
  42        LNABAND : Input frequency range : ( See code for details )
  43        NUM1 / DIV1 / NUM2 / DIV2 : Frequencies programming ( See code for details )
  44        FM1CA  : Calibration Start Bit
  45        FM1SS  : Calibration Single Step bit
  46        L1LK   : LO1 Lock Detect
  47        TAD1   : Tune Line ADC ( ? )
  48        L2LK   : LO2 Lock Detect
  49        TAD2   : Tune Line ADC ( ? )
  50        FMF    : Estimated first IF Center frequency Offset ( ? )
  51        FM1CAL : Calibration done bit
  52        TEMP   : On chip temperature sensor
  53        FMCG   : Mixer 1 Cap Gain ( ? )
  54        GP01 / GP02 : Programmable digital outputs. Unconnected pins ?
  55        V1CSE  : LO1 VCO Automatic Capacitor Select Enable ( ? )
  56        V1CS   : LO1 Capacitor Selection Value ( ? )
  57        LOTO   : LO Timeout ( ? )
  58        VGAG   : Tuner Output gain
  59 */
  60
  61 #define I2C_ADDRESS 0x60
  62
  63 #define REG_PART_REV   0
  64 #define REG_LO1C1      1
  65 #define REG_LO1C2      2
  66 #define REG_LO2C1      3
  67 #define REG_LO2C2      4
  68 #define REG_LO2C3      5
  69 #define REG_LO_STATUS  6
  70 #define REG_FM_FREQ    7
  71 #define REG_MISC_STAT  8
  72 #define REG_MISC_CTRL  9
  73 #define REG_RESERVED_A 0x0A
  74 #define REG_VGAG       0x0B
  75 #define REG_LO1B1      0x0C
  76 #define REG_LO1B2      0x0D
  77 #define REG_LOTO       0x11
  78
  79 #define PART_REV 0x63 // The current driver works only with PART=6 and REV=3 chips
  80
  81 struct mt2060_priv {
  82         struct mt2060_config *cfg;
  83         struct i2c_adapter   *i2c;
  84         struct i2c_client *client;
  85         struct mt2060_config config;
  86
  87         u8 i2c_max_regs;
  88         u32 frequency;
  89         u16 if1_freq;
  90         u8  fmfreq;
  91
  92         /*
  93          * Use REG_MISC_CTRL register for sleep. That drops sleep power usage
  94          * about 0.9W (huge!). Register bit meanings are unknown, so let it be
  95          * disabled by default to avoid possible regression. Convert driver to
  96          * i2c model in order to enable it.
  97          */
  98         bool sleep;
  99 };
 100
 101 #endif