sched: Fix schedule_tail() to disable preemption
[linux/fpc-iii.git] / drivers / pinctrl / pinctrl-adi2-bf60x.c
blob4cb59fe9be7039154079f572af6a24634b9d5ac4
1 /*
2 * Pinctrl Driver for ADI GPIO2 controller
4 * Copyright 2007-2013 Analog Devices Inc.
6 * Licensed under the GPLv2 or later
7 */
9 #include <asm/portmux.h>
10 #include "pinctrl-adi2.h"
12 static const struct pinctrl_pin_desc adi_pads[] = {
13 PINCTRL_PIN(0, "PA0"),
14 PINCTRL_PIN(1, "PA1"),
15 PINCTRL_PIN(2, "PA2"),
16 PINCTRL_PIN(3, "PG3"),
17 PINCTRL_PIN(4, "PA4"),
18 PINCTRL_PIN(5, "PA5"),
19 PINCTRL_PIN(6, "PA6"),
20 PINCTRL_PIN(7, "PA7"),
21 PINCTRL_PIN(8, "PA8"),
22 PINCTRL_PIN(9, "PA9"),
23 PINCTRL_PIN(10, "PA10"),
24 PINCTRL_PIN(11, "PA11"),
25 PINCTRL_PIN(12, "PA12"),
26 PINCTRL_PIN(13, "PA13"),
27 PINCTRL_PIN(14, "PA14"),
28 PINCTRL_PIN(15, "PA15"),
29 PINCTRL_PIN(16, "PB0"),
30 PINCTRL_PIN(17, "PB1"),
31 PINCTRL_PIN(18, "PB2"),
32 PINCTRL_PIN(19, "PB3"),
33 PINCTRL_PIN(20, "PB4"),
34 PINCTRL_PIN(21, "PB5"),
35 PINCTRL_PIN(22, "PB6"),
36 PINCTRL_PIN(23, "PB7"),
37 PINCTRL_PIN(24, "PB8"),
38 PINCTRL_PIN(25, "PB9"),
39 PINCTRL_PIN(26, "PB10"),
40 PINCTRL_PIN(27, "PB11"),
41 PINCTRL_PIN(28, "PB12"),
42 PINCTRL_PIN(29, "PB13"),
43 PINCTRL_PIN(30, "PB14"),
44 PINCTRL_PIN(31, "PB15"),
45 PINCTRL_PIN(32, "PC0"),
46 PINCTRL_PIN(33, "PC1"),
47 PINCTRL_PIN(34, "PC2"),
48 PINCTRL_PIN(35, "PC3"),
49 PINCTRL_PIN(36, "PC4"),
50 PINCTRL_PIN(37, "PC5"),
51 PINCTRL_PIN(38, "PC6"),
52 PINCTRL_PIN(39, "PC7"),
53 PINCTRL_PIN(40, "PC8"),
54 PINCTRL_PIN(41, "PC9"),
55 PINCTRL_PIN(42, "PC10"),
56 PINCTRL_PIN(43, "PC11"),
57 PINCTRL_PIN(44, "PC12"),
58 PINCTRL_PIN(45, "PC13"),
59 PINCTRL_PIN(46, "PC14"),
60 PINCTRL_PIN(47, "PC15"),
61 PINCTRL_PIN(48, "PD0"),
62 PINCTRL_PIN(49, "PD1"),
63 PINCTRL_PIN(50, "PD2"),
64 PINCTRL_PIN(51, "PD3"),
65 PINCTRL_PIN(52, "PD4"),
66 PINCTRL_PIN(53, "PD5"),
67 PINCTRL_PIN(54, "PD6"),
68 PINCTRL_PIN(55, "PD7"),
69 PINCTRL_PIN(56, "PD8"),
70 PINCTRL_PIN(57, "PD9"),
71 PINCTRL_PIN(58, "PD10"),
72 PINCTRL_PIN(59, "PD11"),
73 PINCTRL_PIN(60, "PD12"),
74 PINCTRL_PIN(61, "PD13"),
75 PINCTRL_PIN(62, "PD14"),
76 PINCTRL_PIN(63, "PD15"),
77 PINCTRL_PIN(64, "PE0"),
78 PINCTRL_PIN(65, "PE1"),
79 PINCTRL_PIN(66, "PE2"),
80 PINCTRL_PIN(67, "PE3"),
81 PINCTRL_PIN(68, "PE4"),
82 PINCTRL_PIN(69, "PE5"),
83 PINCTRL_PIN(70, "PE6"),
84 PINCTRL_PIN(71, "PE7"),
85 PINCTRL_PIN(72, "PE8"),
86 PINCTRL_PIN(73, "PE9"),
87 PINCTRL_PIN(74, "PE10"),
88 PINCTRL_PIN(75, "PE11"),
89 PINCTRL_PIN(76, "PE12"),
90 PINCTRL_PIN(77, "PE13"),
91 PINCTRL_PIN(78, "PE14"),
92 PINCTRL_PIN(79, "PE15"),
93 PINCTRL_PIN(80, "PF0"),
94 PINCTRL_PIN(81, "PF1"),
95 PINCTRL_PIN(82, "PF2"),
96 PINCTRL_PIN(83, "PF3"),
97 PINCTRL_PIN(84, "PF4"),
98 PINCTRL_PIN(85, "PF5"),
99 PINCTRL_PIN(86, "PF6"),
100 PINCTRL_PIN(87, "PF7"),
101 PINCTRL_PIN(88, "PF8"),
102 PINCTRL_PIN(89, "PF9"),
103 PINCTRL_PIN(90, "PF10"),
104 PINCTRL_PIN(91, "PF11"),
105 PINCTRL_PIN(92, "PF12"),
106 PINCTRL_PIN(93, "PF13"),
107 PINCTRL_PIN(94, "PF14"),
108 PINCTRL_PIN(95, "PF15"),
109 PINCTRL_PIN(96, "PG0"),
110 PINCTRL_PIN(97, "PG1"),
111 PINCTRL_PIN(98, "PG2"),
112 PINCTRL_PIN(99, "PG3"),
113 PINCTRL_PIN(100, "PG4"),
114 PINCTRL_PIN(101, "PG5"),
115 PINCTRL_PIN(102, "PG6"),
116 PINCTRL_PIN(103, "PG7"),
117 PINCTRL_PIN(104, "PG8"),
118 PINCTRL_PIN(105, "PG9"),
119 PINCTRL_PIN(106, "PG10"),
120 PINCTRL_PIN(107, "PG11"),
121 PINCTRL_PIN(108, "PG12"),
122 PINCTRL_PIN(109, "PG13"),
123 PINCTRL_PIN(110, "PG14"),
124 PINCTRL_PIN(111, "PG15"),
127 static const unsigned uart0_pins[] = {
128 GPIO_PD7, GPIO_PD8,
131 static const unsigned uart0_ctsrts_pins[] = {
132 GPIO_PD9, GPIO_PD10,
135 static const unsigned uart1_pins[] = {
136 GPIO_PG15, GPIO_PG14,
139 static const unsigned uart1_ctsrts_pins[] = {
140 GPIO_PG10, GPIO_PG13,
143 static const unsigned rsi0_pins[] = {
144 GPIO_PG3, GPIO_PG2, GPIO_PG0, GPIO_PE15, GPIO_PG5, GPIO_PG6,
147 static const unsigned eth0_pins[] = {
148 GPIO_PC6, GPIO_PC7, GPIO_PC2, GPIO_PC0, GPIO_PC3, GPIO_PC1,
149 GPIO_PB13, GPIO_PD6, GPIO_PC5, GPIO_PC4, GPIO_PB14, GPIO_PB15,
152 static const unsigned eth1_pins[] = {
153 GPIO_PE10, GPIO_PE11, GPIO_PG3, GPIO_PG0, GPIO_PG2, GPIO_PE15,
154 GPIO_PG5, GPIO_PE12, GPIO_PE13, GPIO_PE14, GPIO_PG6, GPIO_PC9,
157 static const unsigned spi0_pins[] = {
158 GPIO_PD4, GPIO_PD2, GPIO_PD3,
161 static const unsigned spi1_pins[] = {
162 GPIO_PD5, GPIO_PD14, GPIO_PD13,
165 static const unsigned twi0_pins[] = {
168 static const unsigned twi1_pins[] = {
171 static const unsigned rotary_pins[] = {
172 GPIO_PG7, GPIO_PG11, GPIO_PG12,
175 static const unsigned can0_pins[] = {
176 GPIO_PG1, GPIO_PG4,
179 static const unsigned smc0_pins[] = {
180 GPIO_PA0, GPIO_PA1, GPIO_PA2, GPIO_PA3, GPIO_PA4, GPIO_PA5, GPIO_PA6,
181 GPIO_PA7, GPIO_PA8, GPIO_PA9, GPIO_PB2, GPIO_PA10, GPIO_PA11,
182 GPIO_PB3, GPIO_PA12, GPIO_PA13, GPIO_PA14, GPIO_PA15, GPIO_PB6,
183 GPIO_PB7, GPIO_PB8, GPIO_PB10, GPIO_PB11, GPIO_PB0,
186 static const unsigned sport0_pins[] = {
187 GPIO_PB5, GPIO_PB4, GPIO_PB9, GPIO_PB8, GPIO_PB7, GPIO_PB11,
190 static const unsigned sport1_pins[] = {
191 GPIO_PE2, GPIO_PE5, GPIO_PD15, GPIO_PE4, GPIO_PE3, GPIO_PE1,
194 static const unsigned sport2_pins[] = {
195 GPIO_PG4, GPIO_PG1, GPIO_PG9, GPIO_PG10, GPIO_PG7, GPIO_PB12,
198 static const unsigned ppi0_8b_pins[] = {
199 GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6,
200 GPIO_PF7, GPIO_PF13, GPIO_PF14, GPIO_PF15,
201 GPIO_PE6, GPIO_PE7, GPIO_PE8, GPIO_PE9,
204 static const unsigned ppi0_16b_pins[] = {
205 GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6,
206 GPIO_PF7, GPIO_PF9, GPIO_PF10, GPIO_PF11, GPIO_PF12,
207 GPIO_PF13, GPIO_PF14, GPIO_PF15,
208 GPIO_PE6, GPIO_PE7, GPIO_PE8, GPIO_PE9,
211 static const unsigned ppi0_24b_pins[] = {
212 GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6,
213 GPIO_PF7, GPIO_PF8, GPIO_PF9, GPIO_PF10, GPIO_PF11, GPIO_PF12,
214 GPIO_PF13, GPIO_PF14, GPIO_PF15, GPIO_PE0, GPIO_PE1, GPIO_PE2,
215 GPIO_PE3, GPIO_PE4, GPIO_PE5, GPIO_PE6, GPIO_PE7, GPIO_PE8,
216 GPIO_PE9, GPIO_PD12, GPIO_PD15,
219 static const unsigned ppi1_8b_pins[] = {
220 GPIO_PC0, GPIO_PC1, GPIO_PC2, GPIO_PC3, GPIO_PC4, GPIO_PC5, GPIO_PC6,
221 GPIO_PC7, GPIO_PC8, GPIO_PB13, GPIO_PB14, GPIO_PB15, GPIO_PD6,
224 static const unsigned ppi1_16b_pins[] = {
225 GPIO_PC0, GPIO_PC1, GPIO_PC2, GPIO_PC3, GPIO_PC4, GPIO_PC5, GPIO_PC6,
226 GPIO_PC7, GPIO_PC9, GPIO_PC10, GPIO_PC11, GPIO_PC12,
227 GPIO_PC13, GPIO_PC14, GPIO_PC15,
228 GPIO_PB13, GPIO_PB14, GPIO_PB15, GPIO_PD6,
231 static const unsigned ppi2_8b_pins[] = {
232 GPIO_PA0, GPIO_PA1, GPIO_PA2, GPIO_PA3, GPIO_PA4, GPIO_PA5, GPIO_PA6,
233 GPIO_PA7, GPIO_PB0, GPIO_PB1, GPIO_PB2, GPIO_PB3,
236 static const unsigned ppi2_16b_pins[] = {
237 GPIO_PA0, GPIO_PA1, GPIO_PA2, GPIO_PA3, GPIO_PA4, GPIO_PA5, GPIO_PA6,
238 GPIO_PA7, GPIO_PA8, GPIO_PA9, GPIO_PA10, GPIO_PA11, GPIO_PA12,
239 GPIO_PA13, GPIO_PA14, GPIO_PA15, GPIO_PB0, GPIO_PB1, GPIO_PB2,
242 static const unsigned lp0_pins[] = {
243 GPIO_PB0, GPIO_PB1, GPIO_PA0, GPIO_PA1, GPIO_PA2, GPIO_PA3,
244 GPIO_PA4, GPIO_PA5, GPIO_PA6, GPIO_PA7,
247 static const unsigned lp1_pins[] = {
248 GPIO_PB3, GPIO_PB2, GPIO_PA8, GPIO_PA9, GPIO_PA10, GPIO_PA11,
249 GPIO_PA12, GPIO_PA13, GPIO_PA14, GPIO_PA15,
252 static const unsigned lp2_pins[] = {
253 GPIO_PE6, GPIO_PE7, GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3,
254 GPIO_PF4, GPIO_PF5, GPIO_PF6, GPIO_PF7,
257 static const unsigned lp3_pins[] = {
258 GPIO_PE9, GPIO_PE8, GPIO_PF8, GPIO_PF9, GPIO_PF10, GPIO_PF11,
259 GPIO_PF12, GPIO_PF13, GPIO_PF14, GPIO_PF15,
262 static const unsigned short uart0_mux[] = {
263 P_UART0_TX, P_UART0_RX,
267 static const unsigned short uart0_ctsrts_mux[] = {
268 P_UART0_RTS, P_UART0_CTS,
272 static const unsigned short uart1_mux[] = {
273 P_UART1_TX, P_UART1_RX,
277 static const unsigned short uart1_ctsrts_mux[] = {
278 P_UART1_RTS, P_UART1_CTS,
282 static const unsigned short rsi0_mux[] = {
283 P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3,
284 P_RSI_CMD, P_RSI_CLK, 0
287 static const unsigned short eth0_mux[] = P_RMII0;
288 static const unsigned short eth1_mux[] = P_RMII1;
290 static const unsigned short spi0_mux[] = {
291 P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0
294 static const unsigned short spi1_mux[] = {
295 P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0
298 static const unsigned short twi0_mux[] = {
299 P_TWI0_SCL, P_TWI0_SDA, 0
302 static const unsigned short twi1_mux[] = {
303 P_TWI1_SCL, P_TWI1_SDA, 0
306 static const unsigned short rotary_mux[] = {
307 P_CNT_CUD, P_CNT_CDG, P_CNT_CZM, 0
310 static const unsigned short sport0_mux[] = {
311 P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
312 P_SPORT0_BFS, P_SPORT0_BD0, 0,
315 static const unsigned short sport1_mux[] = {
316 P_SPORT1_ACLK, P_SPORT1_AFS, P_SPORT1_AD0, P_SPORT1_BCLK,
317 P_SPORT1_BFS, P_SPORT1_BD0, 0,
320 static const unsigned short sport2_mux[] = {
321 P_SPORT2_ACLK, P_SPORT2_AFS, P_SPORT2_AD0, P_SPORT2_BCLK,
322 P_SPORT2_BFS, P_SPORT2_BD0, 0,
325 static const unsigned short can0_mux[] = {
326 P_CAN0_RX, P_CAN0_TX, 0
329 static const unsigned short smc0_mux[] = {
330 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
331 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
332 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
335 static const unsigned short ppi0_8b_mux[] = {
336 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
337 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
338 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
342 static const unsigned short ppi0_16b_mux[] = {
343 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
344 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
345 P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
346 P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
347 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
351 static const unsigned short ppi0_24b_mux[] = {
352 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
353 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
354 P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
355 P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
356 P_PPI0_D16, P_PPI0_D17, P_PPI0_D18, P_PPI0_D19,
357 P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23,
358 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
362 static const unsigned short ppi1_8b_mux[] = {
363 P_PPI1_D0, P_PPI1_D1, P_PPI1_D2, P_PPI1_D3,
364 P_PPI1_D4, P_PPI1_D5, P_PPI1_D6, P_PPI1_D7,
365 P_PPI1_CLK, P_PPI1_FS1, P_PPI1_FS2,
369 static const unsigned short ppi1_16b_mux[] = {
370 P_PPI1_D0, P_PPI1_D1, P_PPI1_D2, P_PPI1_D3,
371 P_PPI1_D4, P_PPI1_D5, P_PPI1_D6, P_PPI1_D7,
372 P_PPI1_D8, P_PPI1_D9, P_PPI1_D10, P_PPI1_D11,
373 P_PPI1_D12, P_PPI1_D13, P_PPI1_D14, P_PPI1_D15,
374 P_PPI1_CLK, P_PPI1_FS1, P_PPI1_FS2,
378 static const unsigned short ppi2_8b_mux[] = {
379 P_PPI2_D0, P_PPI2_D1, P_PPI2_D2, P_PPI2_D3,
380 P_PPI2_D4, P_PPI2_D5, P_PPI2_D6, P_PPI2_D7,
381 P_PPI2_CLK, P_PPI2_FS1, P_PPI2_FS2,
385 static const unsigned short ppi2_16b_mux[] = {
386 P_PPI2_D0, P_PPI2_D1, P_PPI2_D2, P_PPI2_D3,
387 P_PPI2_D4, P_PPI2_D5, P_PPI2_D6, P_PPI2_D7,
388 P_PPI2_D8, P_PPI2_D9, P_PPI2_D10, P_PPI2_D11,
389 P_PPI2_D12, P_PPI2_D13, P_PPI2_D14, P_PPI2_D15,
390 P_PPI2_CLK, P_PPI2_FS1, P_PPI2_FS2,
394 static const unsigned short lp0_mux[] = {
395 P_LP0_CLK, P_LP0_ACK, P_LP0_D0, P_LP0_D1, P_LP0_D2,
396 P_LP0_D3, P_LP0_D4, P_LP0_D5, P_LP0_D6, P_LP0_D7,
400 static const unsigned short lp1_mux[] = {
401 P_LP1_CLK, P_LP1_ACK, P_LP1_D0, P_LP1_D1, P_LP1_D2,
402 P_LP1_D3, P_LP1_D4, P_LP1_D5, P_LP1_D6, P_LP1_D7,
406 static const unsigned short lp2_mux[] = {
407 P_LP2_CLK, P_LP2_ACK, P_LP2_D0, P_LP2_D1, P_LP2_D2,
408 P_LP2_D3, P_LP2_D4, P_LP2_D5, P_LP2_D6, P_LP2_D7,
412 static const unsigned short lp3_mux[] = {
413 P_LP3_CLK, P_LP3_ACK, P_LP3_D0, P_LP3_D1, P_LP3_D2,
414 P_LP3_D3, P_LP3_D4, P_LP3_D5, P_LP3_D6, P_LP3_D7,
418 static const struct adi_pin_group adi_pin_groups[] = {
419 ADI_PIN_GROUP("uart0grp", uart0_pins, uart0_mux),
420 ADI_PIN_GROUP("uart0ctsrtsgrp", uart0_ctsrts_pins, uart0_ctsrts_mux),
421 ADI_PIN_GROUP("uart1grp", uart1_pins, uart1_mux),
422 ADI_PIN_GROUP("uart1ctsrtsgrp", uart1_ctsrts_pins, uart1_ctsrts_mux),
423 ADI_PIN_GROUP("rsi0grp", rsi0_pins, rsi0_mux),
424 ADI_PIN_GROUP("eth0grp", eth0_pins, eth0_mux),
425 ADI_PIN_GROUP("eth1grp", eth1_pins, eth1_mux),
426 ADI_PIN_GROUP("spi0grp", spi0_pins, spi0_mux),
427 ADI_PIN_GROUP("spi1grp", spi1_pins, spi1_mux),
428 ADI_PIN_GROUP("twi0grp", twi0_pins, twi0_mux),
429 ADI_PIN_GROUP("twi1grp", twi1_pins, twi1_mux),
430 ADI_PIN_GROUP("rotarygrp", rotary_pins, rotary_mux),
431 ADI_PIN_GROUP("can0grp", can0_pins, can0_mux),
432 ADI_PIN_GROUP("smc0grp", smc0_pins, smc0_mux),
433 ADI_PIN_GROUP("sport0grp", sport0_pins, sport0_mux),
434 ADI_PIN_GROUP("sport1grp", sport1_pins, sport1_mux),
435 ADI_PIN_GROUP("sport2grp", sport2_pins, sport2_mux),
436 ADI_PIN_GROUP("ppi0_8bgrp", ppi0_8b_pins, ppi0_8b_mux),
437 ADI_PIN_GROUP("ppi0_16bgrp", ppi0_16b_pins, ppi0_16b_mux),
438 ADI_PIN_GROUP("ppi0_24bgrp", ppi0_24b_pins, ppi0_24b_mux),
439 ADI_PIN_GROUP("ppi1_8bgrp", ppi1_8b_pins, ppi1_8b_mux),
440 ADI_PIN_GROUP("ppi1_16bgrp", ppi1_16b_pins, ppi1_16b_mux),
441 ADI_PIN_GROUP("ppi2_8bgrp", ppi2_8b_pins, ppi2_8b_mux),
442 ADI_PIN_GROUP("ppi2_16bgrp", ppi2_16b_pins, ppi2_16b_mux),
443 ADI_PIN_GROUP("lp0grp", lp0_pins, lp0_mux),
444 ADI_PIN_GROUP("lp1grp", lp1_pins, lp1_mux),
445 ADI_PIN_GROUP("lp2grp", lp2_pins, lp2_mux),
446 ADI_PIN_GROUP("lp3grp", lp3_pins, lp3_mux),
449 static const char * const uart0grp[] = { "uart0grp" };
450 static const char * const uart0ctsrtsgrp[] = { "uart0ctsrtsgrp" };
451 static const char * const uart1grp[] = { "uart1grp" };
452 static const char * const uart1ctsrtsgrp[] = { "uart1ctsrtsgrp" };
453 static const char * const rsi0grp[] = { "rsi0grp" };
454 static const char * const eth0grp[] = { "eth0grp" };
455 static const char * const eth1grp[] = { "eth1grp" };
456 static const char * const spi0grp[] = { "spi0grp" };
457 static const char * const spi1grp[] = { "spi1grp" };
458 static const char * const twi0grp[] = { "twi0grp" };
459 static const char * const twi1grp[] = { "twi1grp" };
460 static const char * const rotarygrp[] = { "rotarygrp" };
461 static const char * const can0grp[] = { "can0grp" };
462 static const char * const smc0grp[] = { "smc0grp" };
463 static const char * const sport0grp[] = { "sport0grp" };
464 static const char * const sport1grp[] = { "sport1grp" };
465 static const char * const sport2grp[] = { "sport2grp" };
466 static const char * const ppi0grp[] = { "ppi0_8bgrp",
467 "ppi0_16bgrp",
468 "ppi0_24bgrp" };
469 static const char * const ppi1grp[] = { "ppi1_8bgrp",
470 "ppi1_16bgrp" };
471 static const char * const ppi2grp[] = { "ppi2_8bgrp",
472 "ppi2_16bgrp" };
473 static const char * const lp0grp[] = { "lp0grp" };
474 static const char * const lp1grp[] = { "lp1grp" };
475 static const char * const lp2grp[] = { "lp2grp" };
476 static const char * const lp3grp[] = { "lp3grp" };
478 static const struct adi_pmx_func adi_pmx_functions[] = {
479 ADI_PMX_FUNCTION("uart0", uart0grp),
480 ADI_PMX_FUNCTION("uart0_ctsrts", uart0ctsrtsgrp),
481 ADI_PMX_FUNCTION("uart1", uart1grp),
482 ADI_PMX_FUNCTION("uart1_ctsrts", uart1ctsrtsgrp),
483 ADI_PMX_FUNCTION("rsi0", rsi0grp),
484 ADI_PMX_FUNCTION("eth0", eth0grp),
485 ADI_PMX_FUNCTION("eth1", eth1grp),
486 ADI_PMX_FUNCTION("spi0", spi0grp),
487 ADI_PMX_FUNCTION("spi1", spi1grp),
488 ADI_PMX_FUNCTION("twi0", twi0grp),
489 ADI_PMX_FUNCTION("twi1", twi1grp),
490 ADI_PMX_FUNCTION("rotary", rotarygrp),
491 ADI_PMX_FUNCTION("can0", can0grp),
492 ADI_PMX_FUNCTION("smc0", smc0grp),
493 ADI_PMX_FUNCTION("sport0", sport0grp),
494 ADI_PMX_FUNCTION("sport1", sport1grp),
495 ADI_PMX_FUNCTION("sport2", sport2grp),
496 ADI_PMX_FUNCTION("ppi0", ppi0grp),
497 ADI_PMX_FUNCTION("ppi1", ppi1grp),
498 ADI_PMX_FUNCTION("ppi2", ppi2grp),
499 ADI_PMX_FUNCTION("lp0", lp0grp),
500 ADI_PMX_FUNCTION("lp1", lp1grp),
501 ADI_PMX_FUNCTION("lp2", lp2grp),
502 ADI_PMX_FUNCTION("lp3", lp3grp),
505 static const struct adi_pinctrl_soc_data adi_bf60x_soc = {
506 .functions = adi_pmx_functions,
507 .nfunctions = ARRAY_SIZE(adi_pmx_functions),
508 .groups = adi_pin_groups,
509 .ngroups = ARRAY_SIZE(adi_pin_groups),
510 .pins = adi_pads,
511 .npins = ARRAY_SIZE(adi_pads),
514 void adi_pinctrl_soc_init(const struct adi_pinctrl_soc_data **soc)
516 *soc = &adi_bf60x_soc;