| blob | 947cb1510776a03de18c360735bd0cb68095101d |
1 /*
2 * Copyright (C) 2006-2010 Texas Instruments Inc
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation version 2..
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 */
17 #ifndef _VPBE_VENC_REGS_H
18 #define _VPBE_VENC_REGS_H
20 /* VPBE Video Encoder / Digital LCD Subsystem Registers (VENC) */
21 #define VENC_VMOD 0x00
22 #define VENC_VIDCTL 0x04
23 #define VENC_VDPRO 0x08
24 #define VENC_SYNCCTL 0x0C
25 #define VENC_HSPLS 0x10
26 #define VENC_VSPLS 0x14
27 #define VENC_HINT 0x18
28 #define VENC_HSTART 0x1C
29 #define VENC_HVALID 0x20
30 #define VENC_VINT 0x24
31 #define VENC_VSTART 0x28
32 #define VENC_VVALID 0x2C
33 #define VENC_HSDLY 0x30
34 #define VENC_VSDLY 0x34
35 #define VENC_YCCCTL 0x38
36 #define VENC_RGBCTL 0x3C
37 #define VENC_RGBCLP 0x40
38 #define VENC_LINECTL 0x44
39 #define VENC_CULLLINE 0x48
40 #define VENC_LCDOUT 0x4C
41 #define VENC_BRTS 0x50
42 #define VENC_BRTW 0x54
43 #define VENC_ACCTL 0x58
44 #define VENC_PWMP 0x5C
45 #define VENC_PWMW 0x60
46 #define VENC_DCLKCTL 0x64
47 #define VENC_DCLKPTN0 0x68
48 #define VENC_DCLKPTN1 0x6C
49 #define VENC_DCLKPTN2 0x70
50 #define VENC_DCLKPTN3 0x74
51 #define VENC_DCLKPTN0A 0x78
52 #define VENC_DCLKPTN1A 0x7C
53 #define VENC_DCLKPTN2A 0x80
54 #define VENC_DCLKPTN3A 0x84
55 #define VENC_DCLKHS 0x88
56 #define VENC_DCLKHSA 0x8C
57 #define VENC_DCLKHR 0x90
58 #define VENC_DCLKVS 0x94
59 #define VENC_DCLKVR 0x98
60 #define VENC_CAPCTL 0x9C
61 #define VENC_CAPDO 0xA0
62 #define VENC_CAPDE 0xA4
63 #define VENC_ATR0 0xA8
64 #define VENC_ATR1 0xAC
65 #define VENC_ATR2 0xB0
66 #define VENC_VSTAT 0xB8
67 #define VENC_RAMADR 0xBC
68 #define VENC_RAMPORT 0xC0
69 #define VENC_DACTST 0xC4
70 #define VENC_YCOLVL 0xC8
71 #define VENC_SCPROG 0xCC
72 #define VENC_CVBS 0xDC
73 #define VENC_CMPNT 0xE0
74 #define VENC_ETMG0 0xE4
75 #define VENC_ETMG1 0xE8
76 #define VENC_ETMG2 0xEC
77 #define VENC_ETMG3 0xF0
78 #define VENC_DACSEL 0xF4
79 #define VENC_ARGBX0 0x100
80 #define VENC_ARGBX1 0x104
81 #define VENC_ARGBX2 0x108
82 #define VENC_ARGBX3 0x10C
83 #define VENC_ARGBX4 0x110
84 #define VENC_DRGBX0 0x114
85 #define VENC_DRGBX1 0x118
86 #define VENC_DRGBX2 0x11C
87 #define VENC_DRGBX3 0x120
88 #define VENC_DRGBX4 0x124
89 #define VENC_VSTARTA 0x128
90 #define VENC_OSDCLK0 0x12C
91 #define VENC_OSDCLK1 0x130
92 #define VENC_HVLDCL0 0x134
93 #define VENC_HVLDCL1 0x138
94 #define VENC_OSDHADV 0x13C
95 #define VENC_CLKCTL 0x140
96 #define VENC_GAMCTL 0x144
97 #define VENC_XHINTVL 0x174
99 /* bit definitions */
100 #define VPBE_PCR_VENC_DIV (1 << 1)
101 #define VPBE_PCR_CLK_OFF (1 << 0)
103 #define VENC_VMOD_VDMD_SHIFT 12
104 #define VENC_VMOD_VDMD_YCBCR16 0
105 #define VENC_VMOD_VDMD_YCBCR8 1
106 #define VENC_VMOD_VDMD_RGB666 2
107 #define VENC_VMOD_VDMD_RGB8 3
108 #define VENC_VMOD_VDMD_EPSON 4
109 #define VENC_VMOD_VDMD_CASIO 5
110 #define VENC_VMOD_VDMD_UDISPQVGA 6
111 #define VENC_VMOD_VDMD_STNLCD 7
112 #define VENC_VMOD_VIE_SHIFT 1
113 #define VENC_VMOD_VDMD (7 << 12)
114 #define VENC_VMOD_ITLCL (1 << 11)
115 #define VENC_VMOD_ITLC (1 << 10)
116 #define VENC_VMOD_NSIT (1 << 9)
117 #define VENC_VMOD_HDMD (1 << 8)
118 #define VENC_VMOD_TVTYP_SHIFT 6
119 #define VENC_VMOD_TVTYP (3 << 6)
120 #define VENC_VMOD_SLAVE (1 << 5)
121 #define VENC_VMOD_VMD (1 << 4)
122 #define VENC_VMOD_BLNK (1 << 3)
123 #define VENC_VMOD_VIE (1 << 1)
124 #define VENC_VMOD_VENC (1 << 0)
126 /* VMOD TVTYP options for HDMD=0 */
127 #define SDTV_NTSC 0
128 #define SDTV_PAL 1
129 /* VMOD TVTYP options for HDMD=1 */
130 #define HDTV_525P 0
131 #define HDTV_625P 1
132 #define HDTV_1080I 2
133 #define HDTV_720P 3
135 #define VENC_VIDCTL_VCLKP (1 << 14)
136 #define VENC_VIDCTL_VCLKE_SHIFT 13
137 #define VENC_VIDCTL_VCLKE (1 << 13)
138 #define VENC_VIDCTL_VCLKZ_SHIFT 12
139 #define VENC_VIDCTL_VCLKZ (1 << 12)
140 #define VENC_VIDCTL_SYDIR_SHIFT 8
141 #define VENC_VIDCTL_SYDIR (1 << 8)
142 #define VENC_VIDCTL_DOMD_SHIFT 4
143 #define VENC_VIDCTL_DOMD (3 << 4)
144 #define VENC_VIDCTL_YCDIR_SHIFT 0
145 #define VENC_VIDCTL_YCDIR (1 << 0)
147 #define VENC_VDPRO_ATYCC_SHIFT 5
148 #define VENC_VDPRO_ATYCC (1 << 5)
149 #define VENC_VDPRO_ATCOM_SHIFT 4
150 #define VENC_VDPRO_ATCOM (1 << 4)
151 #define VENC_VDPRO_DAFRQ (1 << 3)
152 #define VENC_VDPRO_DAUPS (1 << 2)
153 #define VENC_VDPRO_CUPS (1 << 1)
154 #define VENC_VDPRO_YUPS (1 << 0)
156 #define VENC_SYNCCTL_VPL_SHIFT 3
157 #define VENC_SYNCCTL_VPL (1 << 3)
158 #define VENC_SYNCCTL_HPL_SHIFT 2
159 #define VENC_SYNCCTL_HPL (1 << 2)
160 #define VENC_SYNCCTL_SYEV_SHIFT 1
161 #define VENC_SYNCCTL_SYEV (1 << 1)
162 #define VENC_SYNCCTL_SYEH_SHIFT 0
163 #define VENC_SYNCCTL_SYEH (1 << 0)
164 #define VENC_SYNCCTL_OVD_SHIFT 14
165 #define VENC_SYNCCTL_OVD (1 << 14)
167 #define VENC_DCLKCTL_DCKEC_SHIFT 11
168 #define VENC_DCLKCTL_DCKEC (1 << 11)
169 #define VENC_DCLKCTL_DCKPW_SHIFT 0
170 #define VENC_DCLKCTL_DCKPW (0x3f << 0)
172 #define VENC_VSTAT_FIDST (1 << 4)
174 #define VENC_CMPNT_MRGB_SHIFT 14
175 #define VENC_CMPNT_MRGB (1 << 14)