2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright (C) 2013 Freescale Semiconductor, Inc.
19 #ifndef __FSL_PAMU_DOMAIN_H
20 #define __FSL_PAMU_DOMAIN_H
31 struct fsl_dma_domain
{
33 * Indicates the geometry size for the domain.
34 * This would be set when the geometry is
35 * configured for the domain.
39 * Number of windows assocaited with this domain.
40 * During domain initialization, it is set to the
41 * the maximum number of subwindows allowed for a LIODN.
42 * Minimum value for this is 1 indicating a single PAMU
43 * window, without any sub windows. Value can be set/
44 * queried by set_attr/get_attr API for DOMAIN_ATTR_WINDOWS.
45 * Value can only be set once the geometry has been configured.
49 * win_arr contains information of the configured
50 * windows for a domain. This is allocated only
51 * when the number of windows for the domain are
54 struct dma_window
*win_arr
;
55 /* list of devices associated with the domain */
56 struct list_head devices
;
58 * mapped - A particular mapping has been created
59 * within the configured geometry.
60 * enabled - DMA has been enabled for the given
61 * domain. This translates to setting of the
62 * valid bit for the primary PAACE in the PAMU
63 * PAACT table. Domain geometry should be set and
64 * it must have a valid mapping before DMA can be
70 /* stash_id obtained from the stash attribute details */
72 struct pamu_stash_attribute dma_stash
;
74 struct iommu_domain iommu_domain
;
75 spinlock_t domain_lock
;
78 /* domain-device relationship */
79 struct device_domain_info
{
80 struct list_head link
; /* link to domain siblings */
83 struct fsl_dma_domain
*domain
; /* pointer to domain */
85 #endif /* __FSL_PAMU_DOMAIN_H */