1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/m68k/kernel/sys_m68k.c
5 * This file contains various random system calls that
6 * have a non-standard calling sequence on the Linux/m68k
10 #include <linux/capability.h>
11 #include <linux/errno.h>
12 #include <linux/sched.h>
15 #include <linux/smp.h>
16 #include <linux/sem.h>
17 #include <linux/msg.h>
18 #include <linux/shm.h>
19 #include <linux/stat.h>
20 #include <linux/syscalls.h>
21 #include <linux/mman.h>
22 #include <linux/file.h>
23 #include <linux/ipc.h>
25 #include <asm/setup.h>
26 #include <linux/uaccess.h>
27 #include <asm/cachectl.h>
28 #include <asm/traps.h>
30 #include <asm/unistd.h>
31 #include <asm/cacheflush.h>
37 asmlinkage
int do_page_fault(struct pt_regs
*regs
, unsigned long address
,
38 unsigned long error_code
);
40 asmlinkage
long sys_mmap2(unsigned long addr
, unsigned long len
,
41 unsigned long prot
, unsigned long flags
,
42 unsigned long fd
, unsigned long pgoff
)
45 * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
46 * so we need to shift the argument down by 1; m68k mmap64(3)
47 * (in libc) expects the last argument of mmap2 in 4Kb units.
49 return ksys_mmap_pgoff(addr
, len
, prot
, flags
, fd
, pgoff
);
52 /* Convert virtual (user) address VADDR to physical address PADDR */
53 #define virt_to_phys_040(vaddr) \
55 unsigned long _mmusr, _paddr; \
57 __asm__ __volatile__ (".chip 68040\n\t" \
59 "movec %%mmusr,%0\n\t" \
63 _paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0; \
68 cache_flush_040 (unsigned long addr
, int scope
, int cache
, unsigned long len
)
70 unsigned long paddr
, i
;
77 case FLUSH_CACHE_DATA
:
78 /* This nop is needed for some broken versions of the 68040. */
79 __asm__
__volatile__ ("nop\n\t"
84 case FLUSH_CACHE_INSN
:
85 __asm__
__volatile__ ("nop\n\t"
91 case FLUSH_CACHE_BOTH
:
92 __asm__
__volatile__ ("nop\n\t"
100 case FLUSH_SCOPE_LINE
:
101 /* Find the physical address of the first mapped page in the
103 if ((paddr
= virt_to_phys_040(addr
))) {
104 paddr
+= addr
& ~(PAGE_MASK
| 15);
105 len
= (len
+ (addr
& 15) + 15) >> 4;
107 unsigned long tmp
= PAGE_SIZE
- (addr
& ~PAGE_MASK
);
116 if ((paddr
= virt_to_phys_040(addr
)))
123 len
= (len
+ 15) >> 4;
125 i
= (PAGE_SIZE
- (paddr
& ~PAGE_MASK
)) >> 4;
130 case FLUSH_CACHE_DATA
:
131 __asm__
__volatile__ ("nop\n\t"
133 "cpushl %%dc,(%0)\n\t"
137 case FLUSH_CACHE_INSN
:
138 __asm__
__volatile__ ("nop\n\t"
140 "cpushl %%ic,(%0)\n\t"
145 case FLUSH_CACHE_BOTH
:
146 __asm__
__volatile__ ("nop\n\t"
148 "cpushl %%bc,(%0)\n\t"
156 * No need to page align here since it is done by
157 * virt_to_phys_040().
161 /* Recompute physical address when crossing a page
165 if ((paddr
= virt_to_phys_040(addr
)))
179 case FLUSH_SCOPE_PAGE
:
180 len
+= (addr
& ~PAGE_MASK
) + (PAGE_SIZE
- 1);
181 for (len
>>= PAGE_SHIFT
; len
--; addr
+= PAGE_SIZE
)
183 if (!(paddr
= virt_to_phys_040(addr
)))
187 case FLUSH_CACHE_DATA
:
188 __asm__
__volatile__ ("nop\n\t"
190 "cpushp %%dc,(%0)\n\t"
194 case FLUSH_CACHE_INSN
:
195 __asm__
__volatile__ ("nop\n\t"
197 "cpushp %%ic,(%0)\n\t"
202 case FLUSH_CACHE_BOTH
:
203 __asm__
__volatile__ ("nop\n\t"
205 "cpushp %%bc,(%0)\n\t"
216 #define virt_to_phys_060(vaddr) \
218 unsigned long paddr; \
219 __asm__ __volatile__ (".chip 68060\n\t" \
228 cache_flush_060 (unsigned long addr
, int scope
, int cache
, unsigned long len
)
230 unsigned long paddr
, i
;
234 * cpush %dc : flush DC, remains valid (with our %cacr setup)
235 * cpush %ic : invalidate IC
236 * cpush %bc : flush DC + invalidate IC
240 case FLUSH_SCOPE_ALL
:
243 case FLUSH_CACHE_DATA
:
244 __asm__
__volatile__ (".chip 68060\n\t"
248 case FLUSH_CACHE_INSN
:
249 __asm__
__volatile__ (".chip 68060\n\t"
254 case FLUSH_CACHE_BOTH
:
255 __asm__
__volatile__ (".chip 68060\n\t"
262 case FLUSH_SCOPE_LINE
:
263 /* Find the physical address of the first mapped page in the
267 if (!(paddr
= virt_to_phys_060(addr
))) {
268 unsigned long tmp
= PAGE_SIZE
- (addr
& ~PAGE_MASK
);
277 if ((paddr
= virt_to_phys_060(addr
)))
285 len
= (len
+ 15) >> 4;
286 i
= (PAGE_SIZE
- (paddr
& ~PAGE_MASK
)) >> 4;
291 case FLUSH_CACHE_DATA
:
292 __asm__
__volatile__ (".chip 68060\n\t"
293 "cpushl %%dc,(%0)\n\t"
297 case FLUSH_CACHE_INSN
:
298 __asm__
__volatile__ (".chip 68060\n\t"
299 "cpushl %%ic,(%0)\n\t"
304 case FLUSH_CACHE_BOTH
:
305 __asm__
__volatile__ (".chip 68060\n\t"
306 "cpushl %%bc,(%0)\n\t"
315 * We just want to jump to the first cache line
322 /* Recompute physical address when crossing a page
326 if ((paddr
= virt_to_phys_060(addr
)))
340 case FLUSH_SCOPE_PAGE
:
341 len
+= (addr
& ~PAGE_MASK
) + (PAGE_SIZE
- 1);
342 addr
&= PAGE_MASK
; /* Workaround for bug in some
343 revisions of the 68060 */
344 for (len
>>= PAGE_SHIFT
; len
--; addr
+= PAGE_SIZE
)
346 if (!(paddr
= virt_to_phys_060(addr
)))
350 case FLUSH_CACHE_DATA
:
351 __asm__
__volatile__ (".chip 68060\n\t"
352 "cpushp %%dc,(%0)\n\t"
356 case FLUSH_CACHE_INSN
:
357 __asm__
__volatile__ (".chip 68060\n\t"
358 "cpushp %%ic,(%0)\n\t"
363 case FLUSH_CACHE_BOTH
:
364 __asm__
__volatile__ (".chip 68060\n\t"
365 "cpushp %%bc,(%0)\n\t"
376 /* sys_cacheflush -- flush (part of) the processor cache. */
378 sys_cacheflush (unsigned long addr
, int scope
, int cache
, unsigned long len
)
382 if (scope
< FLUSH_SCOPE_LINE
|| scope
> FLUSH_SCOPE_ALL
||
383 cache
& ~FLUSH_CACHE_BOTH
)
386 if (scope
== FLUSH_SCOPE_ALL
) {
387 /* Only the superuser may explicitly flush the whole cache. */
389 if (!capable(CAP_SYS_ADMIN
))
392 struct vm_area_struct
*vma
;
394 /* Check for overflow. */
395 if (addr
+ len
< addr
)
399 * Verify that the specified address region actually belongs
402 down_read(¤t
->mm
->mmap_sem
);
403 vma
= find_vma(current
->mm
, addr
);
404 if (!vma
|| addr
< vma
->vm_start
|| addr
+ len
> vma
->vm_end
)
408 if (CPU_IS_020_OR_030
) {
409 if (scope
== FLUSH_SCOPE_LINE
&& len
< 256) {
411 __asm__ ("movec %%cacr, %0" : "=r" (cacr
));
412 if (cache
& FLUSH_CACHE_INSN
)
414 if (cache
& FLUSH_CACHE_DATA
)
418 __asm__
__volatile__ ("movec %1, %%caar\n\t"
421 : "r" (cacr
), "r" (addr
));
425 /* Flush the whole cache, even if page granularity requested. */
427 __asm__ ("movec %%cacr, %0" : "=r" (cacr
));
428 if (cache
& FLUSH_CACHE_INSN
)
430 if (cache
& FLUSH_CACHE_DATA
)
432 __asm__
__volatile__ ("movec %0, %%cacr" : : "r" (cacr
));
438 * 040 or 060: don't blindly trust 'scope', someone could
439 * try to flush a few megs of memory.
442 if (len
>=3*PAGE_SIZE
&& scope
<FLUSH_SCOPE_PAGE
)
443 scope
=FLUSH_SCOPE_PAGE
;
444 if (len
>=10*PAGE_SIZE
&& scope
<FLUSH_SCOPE_ALL
)
445 scope
=FLUSH_SCOPE_ALL
;
447 ret
= cache_flush_040 (addr
, scope
, cache
, len
);
448 } else if (CPU_IS_060
) {
449 ret
= cache_flush_060 (addr
, scope
, cache
, len
);
453 up_read(¤t
->mm
->mmap_sem
);
458 /* This syscall gets its arguments in A0 (mem), D2 (oldval) and
461 sys_atomic_cmpxchg_32(unsigned long newval
, int oldval
, int d3
, int d4
, int d5
,
462 unsigned long __user
* mem
)
464 /* This was borrowed from ARM's implementation. */
466 struct mm_struct
*mm
= current
->mm
;
471 unsigned long mem_value
;
473 down_read(&mm
->mmap_sem
);
474 pgd
= pgd_offset(mm
, (unsigned long)mem
);
475 if (!pgd_present(*pgd
))
477 pmd
= pmd_offset(pgd
, (unsigned long)mem
);
478 if (!pmd_present(*pmd
))
480 pte
= pte_offset_map_lock(mm
, pmd
, (unsigned long)mem
, &ptl
);
481 if (!pte_present(*pte
) || !pte_dirty(*pte
)
482 || !pte_write(*pte
)) {
483 pte_unmap_unlock(pte
, ptl
);
488 * No need to check for EFAULT; we know that the page is
489 * present and writable.
491 __get_user(mem_value
, mem
);
492 if (mem_value
== oldval
)
493 __put_user(newval
, mem
);
495 pte_unmap_unlock(pte
, ptl
);
496 up_read(&mm
->mmap_sem
);
500 up_read(&mm
->mmap_sem
);
501 /* This is not necessarily a bad access, we can get here if
502 a memory we're trying to write to should be copied-on-write.
503 Make the kernel do the necessary page stuff, then re-iterate.
504 Simulate a write access fault to do that. */
506 /* The first argument of the function corresponds to
507 D1, which is the first field of struct pt_regs. */
508 struct pt_regs
*fp
= (struct pt_regs
*)&newval
;
510 /* '3' is an RMW flag. */
511 if (do_page_fault(fp
, (unsigned long)mem
, 3))
512 /* If the do_page_fault() failed, we don't
513 have anything meaningful to return.
514 There should be a SIGSEGV pending for
523 /* sys_cacheflush -- flush (part of) the processor cache. */
525 sys_cacheflush (unsigned long addr
, int scope
, int cache
, unsigned long len
)
531 /* This syscall gets its arguments in A0 (mem), D2 (oldval) and
534 sys_atomic_cmpxchg_32(unsigned long newval
, int oldval
, int d3
, int d4
, int d5
,
535 unsigned long __user
* mem
)
537 struct mm_struct
*mm
= current
->mm
;
538 unsigned long mem_value
;
540 down_read(&mm
->mmap_sem
);
543 if (mem_value
== oldval
)
546 up_read(&mm
->mmap_sem
);
550 #endif /* CONFIG_MMU */
552 asmlinkage
int sys_getpagesize(void)
557 asmlinkage
unsigned long sys_get_thread_area(void)
559 return current_thread_info()->tp_value
;
562 asmlinkage
int sys_set_thread_area(unsigned long tp
)
564 current_thread_info()->tp_value
= tp
;
568 asmlinkage
int sys_atomic_barrier(void)
570 /* no code needed for uniprocs */