2 * Programmable Real-Time Unit Sub System (PRUSS) UIO driver (uio_pruss)
4 * This driver exports PRUSS host event out interrupts and PRUSS, L3 RAM,
5 * and DDR RAM to user space for applications interacting with PRUSS firmware
7 * Copyright (C) 2010-11 Texas Instruments Incorporated - http://www.ti.com/
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 #include <linux/device.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/platform_device.h>
22 #include <linux/uio_driver.h>
23 #include <linux/platform_data/uio_pruss.h>
25 #include <linux/clk.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/sizes.h>
28 #include <linux/slab.h>
29 #include <linux/genalloc.h>
31 #define DRV_NAME "pruss_uio"
32 #define DRV_VERSION "1.0"
34 static int sram_pool_sz
= SZ_16K
;
35 module_param(sram_pool_sz
, int, 0);
36 MODULE_PARM_DESC(sram_pool_sz
, "sram pool size to allocate ");
38 static int extram_pool_sz
= SZ_256K
;
39 module_param(extram_pool_sz
, int, 0);
40 MODULE_PARM_DESC(extram_pool_sz
, "external ram pool size to allocate");
43 * Host event IRQ numbers from PRUSS - PRUSS can generate up to 8 interrupt
44 * events to AINTC of ARM host processor - which can be used for IPC b/w PRUSS
45 * firmware and user space application, async notification from PRU firmware
46 * to user space application
56 #define MAX_PRUSS_EVT 8
58 #define PINTC_HIDISR 0x0038
59 #define PINTC_HIPIR 0x0900
60 #define HIPIR_NOPEND 0x80000000
61 #define PINTC_HIER 0x1500
63 struct uio_pruss_dev
{
64 struct uio_info
*info
;
65 struct clk
*pruss_clk
;
66 dma_addr_t sram_paddr
;
68 void __iomem
*prussio_vaddr
;
69 unsigned long sram_vaddr
;
71 unsigned int hostirq_start
;
72 unsigned int pintc_base
;
73 struct gen_pool
*sram_pool
;
76 static irqreturn_t
pruss_handler(int irq
, struct uio_info
*info
)
78 struct uio_pruss_dev
*gdev
= info
->priv
;
79 int intr_bit
= (irq
- gdev
->hostirq_start
+ 2);
80 int val
, intr_mask
= (1 << intr_bit
);
81 void __iomem
*base
= gdev
->prussio_vaddr
+ gdev
->pintc_base
;
82 void __iomem
*intren_reg
= base
+ PINTC_HIER
;
83 void __iomem
*intrdis_reg
= base
+ PINTC_HIDISR
;
84 void __iomem
*intrstat_reg
= base
+ PINTC_HIPIR
+ (intr_bit
<< 2);
86 val
= ioread32(intren_reg
);
87 /* Is interrupt enabled and active ? */
88 if (!(val
& intr_mask
) && (ioread32(intrstat_reg
) & HIPIR_NOPEND
))
90 /* Disable interrupt */
91 iowrite32(intr_bit
, intrdis_reg
);
95 static void pruss_cleanup(struct device
*dev
, struct uio_pruss_dev
*gdev
)
98 struct uio_info
*p
= gdev
->info
;
100 for (cnt
= 0; cnt
< MAX_PRUSS_EVT
; cnt
++, p
++) {
101 uio_unregister_device(p
);
104 iounmap(gdev
->prussio_vaddr
);
105 if (gdev
->ddr_vaddr
) {
106 dma_free_coherent(dev
, extram_pool_sz
, gdev
->ddr_vaddr
,
109 if (gdev
->sram_vaddr
)
110 gen_pool_free(gdev
->sram_pool
,
114 clk_put(gdev
->pruss_clk
);
118 static int pruss_probe(struct platform_device
*pdev
)
121 struct uio_pruss_dev
*gdev
;
122 struct resource
*regs_prussio
;
123 struct device
*dev
= &pdev
->dev
;
124 int ret
= -ENODEV
, cnt
= 0, len
;
125 struct uio_pruss_pdata
*pdata
= dev_get_platdata(dev
);
127 gdev
= kzalloc(sizeof(struct uio_pruss_dev
), GFP_KERNEL
);
131 gdev
->info
= kzalloc(sizeof(*p
) * MAX_PRUSS_EVT
, GFP_KERNEL
);
137 /* Power on PRU in case its not done as part of boot-loader */
138 gdev
->pruss_clk
= clk_get(dev
, "pruss");
139 if (IS_ERR(gdev
->pruss_clk
)) {
140 dev_err(dev
, "Failed to get clock\n");
141 ret
= PTR_ERR(gdev
->pruss_clk
);
146 clk_enable(gdev
->pruss_clk
);
149 regs_prussio
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
151 dev_err(dev
, "No PRUSS I/O resource specified\n");
155 if (!regs_prussio
->start
) {
156 dev_err(dev
, "Invalid memory resource\n");
160 if (pdata
->sram_pool
) {
161 gdev
->sram_pool
= pdata
->sram_pool
;
163 (unsigned long)gen_pool_dma_alloc(gdev
->sram_pool
,
164 sram_pool_sz
, &gdev
->sram_paddr
);
165 if (!gdev
->sram_vaddr
) {
166 dev_err(dev
, "Could not allocate SRAM pool\n");
171 gdev
->ddr_vaddr
= dma_alloc_coherent(dev
, extram_pool_sz
,
172 &(gdev
->ddr_paddr
), GFP_KERNEL
| GFP_DMA
);
173 if (!gdev
->ddr_vaddr
) {
174 dev_err(dev
, "Could not allocate external memory\n");
178 len
= resource_size(regs_prussio
);
179 gdev
->prussio_vaddr
= ioremap(regs_prussio
->start
, len
);
180 if (!gdev
->prussio_vaddr
) {
181 dev_err(dev
, "Can't remap PRUSS I/O address range\n");
185 gdev
->pintc_base
= pdata
->pintc_base
;
186 gdev
->hostirq_start
= platform_get_irq(pdev
, 0);
188 for (cnt
= 0, p
= gdev
->info
; cnt
< MAX_PRUSS_EVT
; cnt
++, p
++) {
189 p
->mem
[0].addr
= regs_prussio
->start
;
190 p
->mem
[0].size
= resource_size(regs_prussio
);
191 p
->mem
[0].memtype
= UIO_MEM_PHYS
;
193 p
->mem
[1].addr
= gdev
->sram_paddr
;
194 p
->mem
[1].size
= sram_pool_sz
;
195 p
->mem
[1].memtype
= UIO_MEM_PHYS
;
197 p
->mem
[2].addr
= gdev
->ddr_paddr
;
198 p
->mem
[2].size
= extram_pool_sz
;
199 p
->mem
[2].memtype
= UIO_MEM_PHYS
;
201 p
->name
= kasprintf(GFP_KERNEL
, "pruss_evt%d", cnt
);
202 p
->version
= DRV_VERSION
;
204 /* Register PRUSS IRQ lines */
205 p
->irq
= gdev
->hostirq_start
+ cnt
;
206 p
->handler
= pruss_handler
;
209 ret
= uio_register_device(dev
, p
);
214 platform_set_drvdata(pdev
, gdev
);
218 pruss_cleanup(dev
, gdev
);
222 static int pruss_remove(struct platform_device
*dev
)
224 struct uio_pruss_dev
*gdev
= platform_get_drvdata(dev
);
226 pruss_cleanup(&dev
->dev
, gdev
);
230 static struct platform_driver pruss_driver
= {
231 .probe
= pruss_probe
,
232 .remove
= pruss_remove
,
238 module_platform_driver(pruss_driver
);
240 MODULE_LICENSE("GPL v2");
241 MODULE_VERSION(DRV_VERSION
);
242 MODULE_AUTHOR("Amit Chatterjee <amit.chatterjee@ti.com>");
243 MODULE_AUTHOR("Pratheesh Gangadhar <pratheesh@ti.com>");